ST LD39050PU105R, LD39050PU15R, LD39050PU18R User Manual
March 2009 Rev 1 1/24
24
LD39050xx
500 mA low quiescent current
low noise voltage regulator
Features
■ Input voltage from 1.5 to 5.5 V
■ Ultra low dropout voltage (200 mV typ. at 500
mA load)
■ Very low quiescent current (20 µA typ. at no
load, 100 µA typ. at 500 mA load, 1 µA max in
off mode)
■ Very low noise without bypass capacitor
■ Output voltage tolerance: ± 2.0 % @ 25 °C
■ 500 mA guaranteed output current
■ Wide range of output voltages available on
request: 0.8 V to 4.5 V with 100 mV step and
ADJ from 0.8 V
■ Logic-controlled electronic shutdown
■ Compatible with ceramic capacitor
C
OUT
= 1 µF
■ Internal current and thermal limit
■ Package DFN6 (3 x 3 mm)
■ Temperature range: -40 °C to 125 °C
Description
The LD39050 provides 500 mA maximum current
from an input voltage ranging from 1.5 V to 5.5 V
with a typical dropout voltage of 200 mV. Stability
is provided using ceramic capacitors. The ultra
low drop-voltage, low quiescent current and low
noise features make it suitable for low power
battery-powered applications. Power supply
rejection is 65 dB at low frequencies and starts to
roll off at 10 kHz. An Enable logic control function
puts the LD39050 in shut-down mode allowing a
total current consumption lower than 1 µA. The
device also includes short-circuit constant current
limiting and thermal protection. Typical
applications are mobile phones, personal digital
assistants (PDAs), cordless phones and similar
battery-powered systems.
DFN6 (3 x 3 mm)
Table 1. Device summary
Part numbers Order codes Output voltages
LD39050XX LD39050PUR ADJ from 0.8 V
LD39050XX10 LD39050PU10R 1.0 V
LD39050XX12 LD39050PU12R 1.2 V
LD39050XX25 LD39050PU25R 2.5 V
LD39050XX33 LD39050PU33R 3.3 V
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Contents LD39050xx
2/24
Contents
1 Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.1 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3 Power Good function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8 Different output voltage versions of the LD39050xx
available on request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
LD39050xx Diagrams
3/24
1 Diagrams
Figure 1. Schematic diagram for the LD39050PU
Current
limit
Thermal
protection
OUT
GND
OpAmp
IN
Power-good
signal
PG
Internal
enable
IN
ADJ
EN
BandGap
reference
Current
limit
Thermal
protection
OUT
GND
OpAmp
IN
Power-good
signal
PG
Internal
enable
ININ
ADJ
EN
BandGap
reference
Figure 2. Schematic diagram for the LD39050PUxx
Current
limit
Thermal
protection
OUT
GND
OpAmp
IN
Power-good
signal
PG
Internal
enable
IN
NC
EN
BandGap
reference
R
1
R
2
Current
limit
Thermal
protection
OUT
GND
OpAmp
IN
Power-good
signal
PG
Internal
enable
ININ
NC
EN
BandGap
reference
R
1
R
2
Pin configuration LD39050xx
4/24
2 Pin configuration
Figure 3. Pin connection (top view)
LD39050PUxx
EN
GND
PG
V
IN
NC
V
OUT
EN
GND
PG
V
IN
ADJ
V
OUT
LD39050PU
Table 2. Pin description
Symbol
Pin n°
Function
LD39050PU LD39050PUxx
EN 1 1 Enable pin logic input: Low=shutdown, High=active
GND 2 2 Common ground
PG 3 3 Power Good
V
OUT
4 4 Output voltage
ADJ 5 - Adjust pin
V
IN
6 6 Input voltage of the LDO
NC - 5 Not connected
GND EXP pad Exposed pad must be connected to GND
LD39050xx Maximum ratings
5/24
3 Maximum ratings
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. All values are referred to GND.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
IN
DC input voltage -0.3 to 7 V
V
OUT
DC output voltage -0.3 to V
I
+ 0.3 (7 V max) V
EN Enable pin -0.3 to V
I
+ 0.3 (7 V max) V
PG Power Good pin -0.3 to 7 V
ADJ Adjust pin 4 V
I
OUT
Output current Internally limited
P
D
Power dissipation Internally limited
T
STG
Storage temperature range - 65 to 150 °C
T
OP
Operating junction temperature range - 40 to 125 °C
Table 4. Thermal data
Symbol Parameter Value Unit
R
thJA
Thermal resistance junction-ambient 55 °C/W
R
thJC
Thermal resistance junction-case 10 °C/W
Table 5. ESD performance
Symbol Parameter Test conditions Value Unit
ESD ESD protection voltage
HBM 2 kV
MM 0.3 kV
Electrical characteristics LD39050xx
6/24
4 Electrical characteristics
T
J
= 25 °C, V
IN
= 1.8 V, C
IN
= C
OUT
= 1 µF, I
OUT
= 10 mA, V
EN
= V
IN
, unless otherwise
specified.
Table 6. Electrical characteristics for the LD39050PU
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN
Operating input voltage 1.5 5.5 V
V
ADJ
V
ADJ
accuracy
I
OUT
=10 mA, T
J
= 25°C 784 800 816
mV
I
OUT
= 10 mA, -40°C<T
J
<125°C 776 800 824
I
ADJ
Adjust pin current 1µA
ΔV
OUT
Static line regulation
V
OUT
+1 V ≤ V
IN
≤ 5.5 V,
I
OUT
= 1 mA
0.01 %/V
ΔV
OUT
Transient line regulation
(1)
ΔV
IN
=500 mV, I
OUT
=10 mA, t
R
=5
µs
10
mVpp
ΔV
IN
=500 mV, I
OUT
=10 mA, t
F
=5 µs 10
ΔV
OUT
Static load regulation I
OUT
= 10 mA to 500 mA 0.002 %/mA
ΔV
OUT
Transient load regulation
(1)
I
OUT
= 10 mA to 500 mA, t
R
=5µs 40
mVpp
I
OUT
= 10 mA to 500 mA, t
F
=5µs 40
V
DROP
Dropout voltage
(2)
I
O
= 500mA, V
OUT
fixed to 1.5V
40°C<T
J
<125°C
200 400 mV
e
N
Output noise voltage
10Hz to 100kHz, I
OUT
= 100 mA,
V
OUT
= 0.8 V
30 µV
RMS
SVR
Supply voltage rejection
V
OUT
= 0.8V
V
IN
= 1.8V+/-V
RIPPLE
V
RIPPLE
= 0.25V, freq. = 1kHz
I
OUT
= 10 mA
65
dB
V
IN
= 1.8V+/-V
RIPPLE
V
RIPPLE
= 0.25V, freq.=10 kHz
I
OUT
= 100 mA
62
I
Q
Quiescent current
I
OUT
= 0 mA 20
µA
I
OUT
= 0 mA, -40°C<T
J
<125°C 50
I
OUT
= 0 to 500mA 100
I
OUT
=0 to 500mA, -
40°C<T
J
<125°C
200
V
IN
input current in off mode:
V
EN
= GND
(3)
0.001 1
PG
Power Good output threshold
Rising edge
0.92*
V
OUT
V
Falling edge
0.8*
V
OUT
Power Good output voltage low Isink=6mA open drain output 0.4 V
I
SC
Short-circuit current R
L
=0 600 800 mA
LD39050xx Electrical characteristics
7/24
V
EN
Enable input logic low V
IN
=1.5 V to 5.5 V, 40°C<T
J
<125°C 0.4 V
Enable input logic high V
IN
=1.5 V to 5.5 V, 40°C<T
J
<125°C 0.9 V
I
EN
Enable pin input current V
EN
= V
IN
0.1 100 nA
t
ON
Turn on time
(4)
30 µs
T
SHDN
Thermal shutdown 160
°C
Hysteresis 20
C
OUT
Output capacitor
Capacitance (see typical
performance characteristics for
stability)
122µF
1. All transient values are guaranteed by design, not production tested
2. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This
specification does not apply for output voltages below 1.5 V
3. PG pin floating
4. Turn-on time is time measured between the enable input just exceeding V
EN
high value and the output voltage just
reaching 95% of its nominal value
Table 6. Electrical characteristics for the LD39050PU (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical characteristics LD39050xx
8/24
T
J
= 25 °C, V
IN
= V
OUT(NOM)
+ 1 V, C
IN
= C
OUT
= 1 µF, I
OUT
= 10 mA, V
EN
= V
IN
, unless
otherwise specified.
Table 7. Electrical characteristics for the LD39050PUxx
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN
Operating input voltage 1.5 5.5 V
V
OUT
V
OUT
accuracy
V
OUT
>1.5V, I
OUT
=10 mA,
T
J
= 25°C
-2.0 2.0
%
V
OUT
>1.5 V, I
OUT
= 10 mA,
-40°C<T
J
<125°C
-3.0 3.0
V
OUT
≤ 1.5 V, I
OUT
= 10 mA ±20
mV
V
OUT
≤ 1.5 V, I
OUT
=10 mA,
-40°C<T
J
<125°C
±30
ΔV
OUT
Static line regulation
V
OUT
+1 V ≤ V
IN
≤ 5.5 V,
I
OUT
= 1 mA
0.01 %/V
ΔV
OUT
Transient line regulation
(1)
ΔV
IN
=500 mV, I
OUT
=10 mA, t
R
=5 µs 10
mVpp
ΔV
IN
=500 mV, I
OUT
=10 mA, t
F
=5 µs 10
ΔV
OUT
Static load regulation I
OUT
= 10 mA to 500 mA 0.002 %/mA
ΔV
OUT
Transient load regulation
(1)
I
OUT
= 10 mA to 500 mA, t
R
=5µs 40
mVpp
I
OUT
= 10 mA to 500 mA, t
F
=5µs 40
V
DROP
Dropout voltage
(2)
I
OUT
= 500mA, V
OUT
> 1.5 V
-40°C<T
J
<125°C
200 400 mV
e
N
Output noise voltage 10Hz to 100kHz, I
O
= 100 mA, 30 µV
RMS
SVR
Supply voltage rejection
V
OUT
= 1.5V
V
IN
= V
OUT(NOM
)+0.5V+/-V
RIPPLE
V
RIPPLE
= 0.1V, freq. = 1kHz
I
OUT
= 10 mA
65
dB
V
IN
= V
OUT(NOM)
+0.5V+/-V
RIPPLE
V
RIPPLE
= 0.1V, freq.=10 kHz
I
OUT
= 100 mA
62
I
Q
Quiescent current
I
OUT
= 0 mA 20
µA
I
OUT
= 0 mA, -40°C<T
J
<125°C 50
I
OUT
= 0 to 500mA 100
I
OUT
= 0 to 500mA -40°C<T
J
<125°C 200
V
IN
input current in off mode:
V
EN
= GND
(3)
0.001 1
PG
Power Good output threshold
Rising edge
0.92*
V
OUT
V
Falling edge
0.8*
V
OUT
Power Good output voltage
low
Isink=6mA open drain output 0.4 V
I
SC
Short-circuit current R
L
=0 600 800 mA
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