SONY TCM3 1L Service Manual

Page 1
Colour Television Chassis
Click
LA
Click
18520_000_090309.eps
090316

Contents Page Contents Page

1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 4
4. Mechanical Instructions 8
5. Service Modes, Error Codes, and Fault Finding 12
6. Alignments 20
7. Circuit Descriptions 22
8. IC Data Sheets 25
9. Block Diagrams Wiring Diagram 32" (Click) 37 Wiring Diagram 42" (Click) 38 Block Diagram 39
10. Circuit Diagrams and PWB Layouts Drawing PWB PSU: Power Supply Unit (32") PSU: Power Supply Unit (42") (A1) 43 45-46 PSU: Power Supply Unit (42") (A2) 44 45-46 SSB: DC/DC (B01) 47 58-63 SSB: MT822x Processor (B02) 48 58-63 SSB: DDR SD-RAM (B03) 49 58-63 SSB: Tuner (B04) 50 58-63 SSB: HDMI (B05) 51 58-63 SSB: I/O - VGA, USB, S-Video (B06) 52 58-63 SSB: Digital Analog Converter, DAC (B07) 53 58-63 SSB: I/O - Connectivity YPbPr (B08) 54 58-63 SSB: MUX and DEMUX (B09) 55 58-63 SSB: Audio Amplifier (B10) 56 58-63 SSB: MCU Stand-by (B11) 57 58-63 Side Control Panel (E) 64 65 IR Panel (J) 66 67
(A1) 40 41-42
©
Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by JA/JY 0966 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18650
2009-Jun-05
Page 2
EN 2 TCM3.1L LA1.
Revision List

1. Revision List

Manual xxxx xxx xxxx.0
First release.

2. Technical Specifications and Connections

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connection Overview

2.4 Chassis Overview
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
2.1 Technical Specifications
For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started,
2.3 Connection Overview
user manuals, frequently asked questions and software & drivers.
Table 2-1 Described Model numbers
CTN Styling Published in SM
32PFL3404/77
32PFL3404/78
42PFL3604/77
42PFL3604/78
2.2 Directions for Use
Click on the hyperlinks in table above.
srotcennoc Rear
Click 3122 785 18650
Click 3122 785 18650
Click 3122 785 18650
Click 3122 785 18650
srotcennoc ediS
8
IR out

Figure 2-1 Rear and side I/O connections

1
1
2
2
3
3
4
4
5
5
18650_001_090603.eps
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Page 3
Technical Specifications and Connections
EN 3TCM3.1L LA 2.

2.3.1 Side connections

Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, and Ye= Yellow.
1 - USB2.0
1 2 3 4
E_06532_022.eps
300904
Figure 2-2 USB (type A)
1-+5V k 2 -Data (-) jk 3 -Data (+) jk 4 -Ground Gnd H
2 - HDMI: Digital Video, Digital Audio - In
19
18 2
1
E_06532_017.eps
250505
Figure 2-3 HDMI (type A) connector
1 -D2+ Data channel j 2 -Shield Gnd H 3 -D2- Data channel j 4 -D1+ Data channel j 5 -Shield Gnd H 6 -D1- Data channel j 7 -D0+ Data channel j 8 -Shield Gnd H 9 -D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - n.c. 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

2.3.2 Rear Connections

1 - HDMI 1 & 2: Digital Video, Digital Audio - In
See HDMI side connector.
2 - VGA/PC: Video RGB - In
1
5
6
11
10
15
E_06532_002.eps
171108
Figure 2-4 VGA Connector
1 -Video Red 0.7 V 2 -Video Green 0.7 V 3 -Video Blue 0.7 V 4-n.c.
/ 75 Ω j
PP
/ 75 Ω j
PP
/ 75 Ω j
PP
5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H 9-+5V 10 - Ground Sync Gnd H
+5 V j
DC
11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j
2 - PC Audio: Mini Jack: VGA Audio - In
Bk - Audio L/R 0.5 V
/ 10 kΩ jq
RMS
3 - Aerial - In
- - IEC-type (EU) Coax, 75 Ω D
4 - Mini Jack: Service Connector (UART)
1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j
5 - AV-Out: Cinch: Video CVBS - Out, Audio - Out
Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 Ω kq
PP
/10 kΩ kq
RMS
/ 10 kΩ kq
RMS
3 & 4 - Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
5 - Mini Jack: Audio Head phone - Out
Bk - Head phone 32 - 600 Ω / 10 mW ot

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.
6 - AV-1: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
7 - CVI-1&2: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
8 - IR Out (if present)
1 - Ground Gnd H 2-OIRI-IN k 3 - Ground Gnd H
2009-Jun-05
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EN 4 TCM3.1L LA3.
Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).
Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:
Route the wire trees correctly and fix them with the mounted cable clamps.
Check the insulation of the Mains/AC Power lead for external damage.
Check the strain relief of the Mains/AC Power cord for proper function.
Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any inner parts by the customer.
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).
Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10
Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.
The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction
For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
-9
), or pico-farads (p =× 10
. Select
-12
-6
),
).
3.2 Warnings
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.
Be careful during measurements in the high voltage section.
Never replace modules or other components while the unit is switched “on”.
When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3 Notes

3.3.1 General

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
2009-Jun-05
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Precautions, Notes, and Abbreviation List
EN 5TCM3.1L LA 3.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
MODEL :
PROD.NO:
32PF9968/10
AG 1A0617 000001
MADE IN BELGIUM
220-240V 50/60Hz
~
VHF+S+H+UHF
BJ3.0E LA
S
10000_024_090121.eps
Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
128W
090121

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V
board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format
AARA Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio
ACI Automatic Channel Installation:
algorithm that installs TV channels directly from a cable network by
means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control
signal used to tune to the correct
frequency AGC Automatic Gain Control: algorithm that
controls the video input of the feature
box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA ATV See Auto TV Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz BLR Board-Level Repair BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:
remote control bus on HDMI
connections CL Constant Level: audio output to
connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:
manipulates steepness of chroma
transients CVBS Composite Video Blanking and
Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra
low frequency amplification DDC See “E-DDC” D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion
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EN 6 TCM3.1L LA3.
Precautions, Notes, and Abbreviation List
DNR Digital Noise Reduction: noise
reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote
control designed for service
technicians DTCP Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display. EDID Extended Display Identification Data
(VESA standard) EEPROM Electrically Erasable and
Programmable Read Only Memory EMI Electro Magnetic Interference EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by
SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency
Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content
Protection: A “key” encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a “snow vision” mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP “software key”
decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound
2
I
C Inter IC bus
2
I
D Inter IC Data bus
2
I
S Inter IC Sound bus
carrier distance is 6.0 MHz
IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.
ITV Institutional TeleVision; TV sets for
hotels, hospitals etc.
LS Last Status; The settings last chosen
by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's
preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound
carrier distance is 4.5 MHz MIPS Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor MOP Matrix Output Processor MOSFET Metal Oxide Silicon Field Effect
Transistor, switching device MPEG Motion Pictures Experts Group MPIF Multi Platform InterFace MUTE MUTE Line NC Not Connected NICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe. NTC Negative Temperature Coefficient,
non-linear resistor NTSC National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air) NVM Non-Volatile Memory: IC containing
TV related data such as alignments O/C Open Circuit OSD On Screen Display OTC On screen display Teletext and
Control; also called Artistic (SAA5800) P50 Project 50: communication protocol
between TV and peripherals PAL Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
3.575612 MHz and PAL N= 3.582056
MHz) PCB Printed Circuit Board (same as “PWB”) PCM Pulse Code Modulation PDP Plasma Display Panel PFC Power Factor Corrector (or Pre-
conditioner) PIP Picture In Picture PLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency POD Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set) POR Power On Reset, signal to reset the uP PTC Positive Temperature Coefficient,
non-linear resistor PWB Printed Wiring Board (same as “PCB”)
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Precautions, Notes, and Abbreviation List
EN 7TCM3.1L LA 3.
PWM Pulse Width Modulation QRC Quasi Resonant Converter QTNR Quality Temporal Noise Reduction QVCP Quality Video Composition Processor RAM Random Access Memory RGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are
reproduced. RC Remote Control RC5 / RC6 Signal protocol from the remote
control receiver RESET RESET signal ROM Read Only Memory RSDS Reduced Swing Differential Signalling
data interface R-TXT Red TeleteXT SAM Service Alignment Mode S/C Short Circuit SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs SCL Serial Clock I SCL-F CLock Signal on Fast I SD Standard Definition SDA Serial Data I SDA-F DAta Signal on Fast I
2
C
2
C bus
2
C
2
C bus SDI Serial Digital Interface, see “ITU-656” SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switched Mode Power Supply SoC System on Chip SOG Sync On Green SOPS Self Oscillating Power Supply SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard S/PDIF Sony Philips Digital InterFace SRAM Static RAM SRP Service Reference Protocol SSB Small Signal Board STBY STand-BY SVGA 800 × 600 (4:3) SVHS Super Video Home System SW Software SWAN Spatial temporal Weighted Averaging
Noise reduction SXGA 1280 × 1024 TFT Thin Film Transistor THD Total Harmonic Distortion TMDS Transmission Minimized Differential
Signalling TXT TeleteXT TXT-DW Dual Window with TeleteXT UI User Interface uP Microprocessor UXGA 1 600 × 1200 (4:3) V V-sync to the module VESA Video Electronics Standards
Association VGA 640 × 480 (4:3) VL Variable Level out: processed audio
output toward external amplifier VSB Vestigial Side Band; modulation
method WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound WXGA 1280 × 768 (15:9) XTAL Quartz crystal XGA 1024 × 768 (4:3)
Y Luminance signal Y/C Luminance (Y) and Chrominance (C)
signal
YPbPr Component video. Luminance and
scaled color difference signals (B-Y and R-Y)
YUV Component video
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EN 8 TCM3.1L LA4.
Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Service Positions

4.2 Cable Dressing and Taping
4.3 Assy/Panel Removal
4.4 Set Re-assembly
Notes:
Figures below can deviate slightly from the actual situation, due to the different set executions.
4.1 Service Positions
For easy servicing of this set, there are a few possibilities created:
The buffers from the packaging.
Foam bars (created for Service).

4.1.1 Foam Bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Figure 4-1 larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By positioning the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, the screen can be monitored.
for details. Sets with a display of 42" and
Required for sets
1
42"
Figure 4-1 Foam bars
1
E_06532_018.eps
171106
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Page 9

4.2 Cable Dressing and Taping

Mechanical Instructions
EN 9TCM3.1L LA 4.

Figure 4-2 Cable dressing and taping 32" model

18520_105_090318.eps
090603

Figure 4-3 Cable dressing and taping 42" model

18520_100_090309.eps
090309
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EN 10 TCM3.1L LA4.
Mechanical Instructions

4.3 Assy/Panel Removal

Caution: It is mandatory to remount screws at their original
position during re-assembly. Failure to do so may result in damaging the SSB. Refer to Figure 4-4

4.3.1 Rear Cover

Warning/Notes:
Disconnect the mains power cord before rear cover removal.
It is not necessary to remove the stand while removing the rear cover.
Re-use the original screws when re-assembling the TV.
1. Remove all screws of the rear cover. Important: Be sure to re-use the same screws when remounting the rear cover, as these screws have a 30 degrees thread instead of the common used 45 degrees thread.
2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2 Speakers

Each speaker unit is mounted (in rubber) with two screws. When defective, replace the whole unit.
for details.

4.3.7 LCD Panel

Description below is based upon the 42" model with LG display. Disassembly method of other LCD panels is comparable to the one described below. See also “Mechanical layout” drawings.
4. Unplug and remove all cables.
5. Remove the Main Supply Panel and Small SIgnal Board as described earlier.
6. Remove all metal brackets that are mounted on the panel (be aware of the different screws used, see figure “Used screws”): – Two VESA holder brackets at the top (screw #2). – Two SSB holder brackets (screws #2 and #3). – Two central holder brackets (screw #2). – One PSU holder bracket (screw#1).
7. Remove the stand [1] (screw #5).
8. Remove the subframe of the stand [2] (screw #2).
9. Remove the brackets [3] (screw #3) that secure the LCD panel, and remove screws #4 at the bottom of the LCD.
10. The LCD panel can now be lifted from the front cabinet.

4.3.3 IR & LED Board

1. Remove the two screws that hold the assy.
2. Unplug the connector on the board (be aware of the connector lock).
When defective, replace the whole unit.

4.3.4 Key Board Control Panel

1. Remove the two screws that hold the assy.
2. Unplug the connectors on the board.
When defective, replace the whole unit.

4.3.5 Main Supply Panel

1. Unplug all connectors (be aware of the connector locks).
2. Remove the fixation screws (screw #1).
3. Take the board out.
When defective, replace the whole unit.

4.3.6 Small Signal Board (SSB)

1. Unplug all connectors on the SSB.
2. Remove all screws (screw #1) that hold the board.
3. The SSB can now be taken out of the set, together with the side connector cover.
Figure 4-4 Used screws
18520_101_090311.eps
090311
2009-Jun-05
Page 11
Mechanical Instructions
32 Mechanical layout definition
EN 11TCM3.1L LA 4.
VESA
200*200
Panel
bracket L
IPB
Button
IP B b rac ke t
IR - L en s
2 * Speaker
AC-In Bracket
Figure 4-5 Mechanical layout 32" model
Stand
SSB bracket U
Panel
bracket R
SSB
SIDE AV
bracket
SSB bracket B
18520_104_090318.eps
090318
VESA
400*400
Panel
bracket L
IPB
IPB bracket
Button
IR - L ED
2 * Speaker
42 Mechanical layout definition
AC-In Bracket
Figure 4-6 Mechanical layout 42" model
Stand
bracket
Panel
bracket R
SSB bracket U
SSB
SIDE AV
bracket
SSB bracket B
18520_102_090318.eps
090318

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.
Notes:
While re-assembling, make sure that all cables are placed and connected in their original position.
Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.
2009-Jun-05
Page 12
EN 12 TCM3.1L LA5.
Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1 Measurement Conditions

5.2 Service Modes

5.3 Service Tools
5.4 Error Codes
5.5 The Blinking LED Procedure (LAYER-2 codes)
5.6 Fault Finding and Repair Tips
5.7 Software Upgrading
5.1 Measurement Conditions
Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).
Service Default mode (SDM) and Service Alignment Mode (SAM) offer several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer. This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.3.1 ComPair

5.2.1 Service Default Mode (SDM)

Purpose
To start the blinking LED procedure where only layer 2 errors are displayed (see also section 5.4 Error Codes
How to Activate SDM
Use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).
How to Navigate
When the “MENU” (or HOME) button is pressed on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background).
How to Exit SDM
Switch the set to STAND-BY via the RC-transmitter.

5.2.2 Service Alignment Mode (SAM)

Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: key in the code “062596” directly followed by the “i+/INFO” button.
Contents of SAM (see also 6.4 Option Settings
Syst. Info. Giving overview of:
).
Op. Hours. During the life time cycle of the TV, a life
timer is kept. It counts the normal operation hours, not the Stand-by hours. The actual value of the life timer is displayed in SAM in decimal value. For every two start­ups the counter increases by one. Min. 5 digits are displayed in decimal digits. In detail:
Every 2x cold start-ups, to display a picture, increases the counter by 1 (i.e. interrupt the mains supply 2x while the set is ON).
Every 2x warm start-ups (from Stand-by), to display a picture, increases the counter by 1.
Every hour of normal operating increases the counter by 1 (i.e. if a set is continue ON for 2 hours, then increase the counter by 2).
Stand-by hours are NOT counted.
Main SW ID. Displays the loaded main SW version. – Error Code x (where “x” is 1 to 5). The most recent
error is displayed at the upper position (for an error explanation see section 5.4 Error Codes
).
Clear Codes. When “arrow right” is pressed and then the “OK” button is pressed, the error buffer is reset.
Options. Choosing the CTN will set the options, see also chapter 6.4 Option Settings
.
RGB Align. This will activate the alignments sub-menu. See chapter 6.3.2 White Point
for more details.
NVM Editor. This will give the opportunity to directly change values in the NVM by selecting the address and value. Use decimal values! See chapter 6.4 Option Settings.
NVM Copy. For easy transfer of NVM settings: – Copy to USB. To upload several settings from the TV
to an USB stick. See 5-1 USB Copy content
. To upload the settings, press “arrow right” (or the “OK button), confirm with “OK” and wait until “OK” appears. Now the settings are stored onto the USB stick can be used to download to another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them
).
into another SSB.
Copy from USB. To download several settings from
the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.
Table 5-1 USB Copy content
S/N NVM USB Copy content To be copied /Remarks
1 Display settings White Point alignment,
2 Personal settings eg. Brightness, colour,
3 Channel List Channel preset Yes
4 Options list Option code Yes
5 AGC and AFC
alignment
6 HDCP key No.
7 Model 22PFL1234D/10 Yes
8 Production serial nbr. BA1A0837123456 Yes
9 Software Version TXM21E 1.00 No. Read and display.
10 Option Code
(used display)
11 Codes 011 000 000 000 000 No. Error detection
12 SSB 996512312345 No
13 Display 996512345678 Yes
14 PSU 996512311111 Yes
):
15 NVM version Supplier to advise
RGB
hue, equalizer, band, head phone volume, child lock, time, picture for­mat...
SSB specific No.
009 yes
NVM version
Yes
Yes
No. Read and display.
2009-Jun-05
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Service Modes, Error Codes, and Fault Finding
EN 13TCM3.1L LA 5.
S/N NVM USB Copy content To be copied /Remarks
16 PQ version Supplier to advise
17 HDCP key Valid No. Are measure results
18 Signal Quality/Present Digital percentage and
19 Audio System Detect and display No. Are measure results
20 Video Format Detect and display No. Are measure results
21 Stand-by uP SW ID Detect and display No. Read and display
PQ version
analog Yes/No.
No. Read and display.
No. Are measure results
Tuner. This will activate the alignments sub-menu. See chapter 6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment) for more details.
Auto ADC. This will activate the alignments sub-menu. See chapter 6.3.3 Auto ADC for more details.
How to Navigate
In SAM, the menu items can be selected with the “Arrow up/down” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “Arrow up/down” key to display the next/previous menu items.
With the “Arrow Left/Right” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.
With the “OK” key, it is possible to activate the selected action.
With the “Menu/Home” key, it is possible to go back to the previous selection.
How to Exit SAM
Switch the set to STAND-BY via the RC-transmitter.

5.2.3 Customer Service Mode (CSM)

Purpose
When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer The CSM is a read only mode; therefore, modifications in this mode are not possible
When CSM is activated:
A test pattern will be displayed during 3 s. This test pattern is generated by the MT822x video processor. So if this test pattern is shown, it could be determined that the back end video chain (MT822x, LVDS, and display) of the SSB is working.
The LAYER 1 error is displayed via the blinking front LED. Only the latest error is displayed. See also section 5.4 Error Codes.
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
How to Navigate
By means of the “Arrow up/down” button on the RC-transmitter, one can navigate through the menus.
Contents of CSM
The contents are displayed on two pages:
S/N Description Explanation
1 Model Number NVM read/write (max. 16 characters)
2 Production Serial Nbr. NVM read/write (max. 16 characters)
3 Software Version Detect and Display SW version
4 Option Code Store in NVM (panel code)
5 Codes Layer-2 error code.
6 SSB 12NC NVM read/write (12 characters)
7 Display 12NC NVM read/write (12 characters)
8 PSU 12NC NVM read/write (12 characters)
9 NVM version Detect and Display NVM version
10 HDCP key Detect and display (valid/invalid)
11 Signal Quality/Present Present / No signal
12 Audio System Detect and display:
13 Video Format Detect and display: signal dependent
14 Stand-by uP SW ID Detect and display.
Mono, Stereo, Nicam (signal dependent)
Model Number. This information is very helpful for a helpdesk/workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialised after corruption, this model type has to be re­written to NVM. ComPair will foresee in a possibility to do this.
Production Serial Number. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.
Software Version. Displays the current main software version. In case of field problems that are related to software, this software can be upgraded. As it is consumer upgradeable, it will also be published on the Internet.
Option Code. Gives the display codes as set in SAM. See also section 6.4 Option Settings
.
Codes. Gives the error code overview. See also table 5-3
Layer-2 code overview.
SSB. Gives an identification of the SSB order code as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this.
Display. Shows the 12NC of the display.
PSU. Shows the 12NC of the Power Supply Unit.
NVM version. Displays the SW-version that is used in the NVM.
HDCP key. Indicates of the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the consumer wants to make use of the HDMI functionality, the SSB has to be replaced.
Signal Quality/Present. Displays the received signal quality or its presence.
Audio System. Displays the received audio system.
Video Format. Displays the received video format.
Stand-by uP SW ID. Displays the current Stand-by Processor software version.
How to Exit CSM
By pressing the “MENU/HOME” key, the OSD (i+) key, the Stand-by key or the power down button.
2009-Jun-05
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EN 14 TCM3.1L LA5.
Service Modes, Error Codes, and Fault Finding

5.3 Service Tools

5.3.1 ComPair

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.
3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.
How to Connect
This is described in the chassis fault finding database in ComPair.
ComPair II
RC in
Optional
Switch
Power ModeLink/
Activity
HDMI I
RC out
2
C only
Figure 5-1 ComPair II interface connection
TO
UART SERVICE
CONNECTOR
2
C or UART commands is necessary,
TO TV
TO
TO
UART SERVICE
I2C SERVICE
CONNECTOR
CONNECTOR
Multi
function
2
C
I
RS232 /UART
PC
ComPair II Developed by Philips Brugge
Optional power
5V DC
E_06532_036.eps
150208

5.4 Error Codes

5.4.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from top to bottom (or left to right), new errors are logged at the top/left side, and all other errors shift one position to the bottom/right. When an error occurs, it is added to the list of errors, provided the list is not full. When the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation/
There is a simple blinking LED procedure for board level repair (home repair) the so called LAYER 1 errors, next to the existing errors which are LAYER 2 errors:
LAYER 1 errors are one digit errors
LAYER 2 errors are two digit errors.
When is LAYER 1 or 2 available:
In CSM mode: When entering CSM: error LAYER 1 will be displayed by blinking LED. Only the latest error is shown.
In SDM mode: When SDM is entered via Remote Control code, LAYER 2 is displayed via blinking LED.
Error display on screen:
In CSM, no error codes are displayed on screen.
In SAM, the complete error list is shown.
If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present.

5.4.2 How to Read the Error Buffer

Use one of the following methods:
On screen via SAM (only when a picture is visible). E.g.: – 000 000 000 000 000: No errors detected – 017 000 000 000 000: Error code 17 is the last and only
detected error.
015 017 000 000 000: Error code 17 was first detected
and error code 15 is the last detected error.
Via the Blinking LED procedure.
•Via ComPair.
Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair serial interface cable (using 3.5 mm Mini Jack connectors): 3138 188 75051.
Note: When having problems, please contact the local support desk.
2009-Jun-05

5.4.3 How to Clear the Error Buffer

Use one of the following methods:
By activation of the “Clear Codes” command in the SAM menu.
With a normal RC, key in sequence “062599” followed by “OK”.
Page 15
Service Modes, Error Codes, and Fault Finding
EN 15TCM3.1L LA 5.

5.4.4 Error Codes

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.
Table 5-2 Layer 1 code overview
Code Board
2SSB
3 Platform supply (12V detection)
Table 5-3 Layer-2 code overview
Layer 2 error code
0 No Error N/A N/A N/A
14 General I2CI2C Bus Spontaneous
15 Tuner I2C Bus Error Log
16 Demodulator I2C Bus Error Log
17 Audio amplifier I2C Bus Error Log
18 NVM EEPROM I
Error Description
Detection Method
Type Remarks
blinking
+ blinking in SDM
+ blinking in SDM
+ blinking in SDM
2
C Bus Spontaneous
blinking
Communication Error on I2C bus
Communication Error with Tuner
Communication Error with TDA9886T
Communication Error with Audio amplifier
Communication Error with EEPROM

5.5 The Blinking LED Procedure (LAYER-2 codes)

5.5.1 Introduction

The software is capable of identifying different kinds of errors. Because it is possible that more than one error can occur over time, an error buffer is available that is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly.
Errors can also be displayed by the blinking LED procedure. The method is to repeatedly let the LED pulse with as many pulses as the error code number, followed by a time period of
1.5 seconds in which the LED is “off”. Then this sequence is repeated. E.g. error code 4 will result in four times the sequence LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After this sequence the LED will be “off” for 1.5 seconds. Any RC command terminates this sequence.
Displaying the entire error buffer The entire error buffer can be displayed when service mode “SDM” is entered (by remote control command 062596<MENU>). When in protection, this sequence will not work, but than LAYER-1 error code should suffice. In order to avoid confusion with RC signal reception blinking, this blinking procedure is terminated when a RC command is received.

5.5.2 How to Activate

Use one of the following methods:
Activate the CSM. The blinking front LED will show only the latest LAYER-1 error.
Activate the SDM. The blinking front LED will show the entire contents of the LAYER-2 error buffer.
2009-Jun-05
Page 16
EN 16 TCM3.1L LA5.

5.6 Fault Finding and Repair Tips

5.6.1 Fault Finding Flow Charts

No Picture, no sound, no Back light, Fuse Broken
Service Modes, Error Codes, and Fault Finding
For P22 ,Pin 7~8
is 3.3V, OK?
NO
Check IPB
YES YES YES
For P22,pin10 is
3.3V , OK?
NO NO
Check Q10,
For P22,pin1 is
24V , OK?
Check IPB
X5,IR_MCU,KEY,
Check main board DDRV & AV12, OK?
Check main board DV10
&+3.3V OK?
MCU_RESET,U8.
Check main board
short_protect ,
oreset#,pwr_detect
18520_204_090313.eps
Figure 5-2 No picture, no sound, no backlight. Fuse broken.
No Picture, Back light & Sound OK
YES
YES
090313
2009-Jun-05
Check the 5V-IF
voltage of . is it
OK?
No
Check the
voltage
of R48,U6
Yes
Yes
Check 33V is
OK?
check the
U2,Q13
No
Is Q14,C184,C197 ,L54 shorted to
No
check
D2,R184,R178
earth?
Figure 5-3 No picture. Backlight and sound okay.
Yes
Replace R48 &
U6
18520_205_090313.eps
090313
Page 17
Service Modes, Error Codes, and Fault Finding
Picture OK, No sound
EN 17TCM3.1L LA 5.
Check the voltage of
U17.8~11,it 24v?
Yes
Check the voltage of
U17.31 & U17.23,is it OK?
Yes
Check the wave of
I2C&I2S OK?
Yes
Check
No
U17.24,U17.21,
U17.36 is 3.3V?
Yes
No
Check
R & L speaker
No
Check
L139,L140
No
No
Change the
software of U10
Check the
L103,L101,R361,R362
Change the U17
Figure 5-4 Picture okay, no sound.
Check the Q24
&,is it OK?
Yes
Change the
software of U10 &
U8
18520_206_090313.eps
090313
Colour system is
Right & another
chann el colo ur is
right ?
No
Reset
To
Local system
Yes
No colour
Dose the TV
signal too weak?
YES
Check
Tuner Input
cable & antenna
NO
Check the
voltag e of
Z1.1 OK?
YES
Check E2PROM
U21
YES
Fine Frequency
NO
Check
U2 & I2C
18520_207_090313.eps
090313
Figure 5-5 No colour.
2009-Jun-05
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EN 18 TCM3.1L LA5.
Service Modes, Error Codes, and Fault Finding

5.7 Software Upgrading

5.7.1 Introduction

It is possible for the user to upgrade the main software via the USB port. A description on how to upgrade the main software can be found in the DFU and below.

5.7.2 Main Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “upgrade.bin”. This can also be done by the consumers themselves via the Software Update Assistant in the user menu (see DFU), but they will have to download their software from the commercial Philips website.
How to upgrade (see also figure 5-9 User SW upgrade flowchart):
1. Copy the “upgrade.bin” file to the root of the USB stick.
2. Power “off” the TV and remove all memory devices.
3. Insert the USB stick that contains the downloaded software upgrade.
4. Switch “on” the TV, and activate the Main menu with the “Menu/House” key on the remote control.
5. In the Main menu, go to the “Software update” item.
6. Press “OK” key to go to the submenu.
7. Select “Local updates” in the submenu and press the “OK” key to enter the Software Update application.
8. You will be prompted to cancel or to proceed with the software updating.
9. To proceed, select “Update” and press the “OK” key to enter the next menu. In the next menu select “Start” and press “OK” key to start the software update.
10. Upgrading will now begin and the progress of the updating will be displayed. After the software updating is completed, the TV will automatically restart.

5.7.4 Upgrade HDMI EDID NVM

To upgrade the HDMI EDID, pin 7 of the EDID NVM [1] has to be short circuited to ground. See ComPair for further instructions.
1
18520_208_090313.eps
Figure 5-6 HDMI-1 EDID NVM
1
090313

5.7.3 Stand-by Software Upgrade

In this chassis it is not possible to upgrade the Stand-by software via a USB stick or ComPair. Please order a pre­programmed device via the Philips Spare Part web portal.
18520_210_090313.eps
090313
Figure 5-7 HDMI-side EDID NVM

5.7.5 Upgrade VGA EDID NVM

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has to be short circuited to ground. See ComPair for further instructions.
2
2009-Jun-05
18520_209_090313.eps
090313
Figure 5-8 VGA EDID NVM
Page 19
Service Modes, Error Codes, and Fault Finding

5.7.6 Main SW upgrade flowchart.

EN 19TCM3.1L LA 5.
Power off the set
A newer version of software is deceted.
Do you want to update?
UpgradeCancel
Layout 1
An equal/older version of software is
detected .
Do you want to proceed?
Note: Should be done only if necessary.
UpgradeCancel
Layout 2
Please donÿt shut off the power
The software update may takes 3 to 5
minutes
Erasing...
Layout 3
Please donÿt shut off power
The software update may takes 3 to 5
minutes
Upgrading...18%
Layout 4
Software update
failed! Would you
like to try again
Layout 5
Plug-in the USB stick
Power on the set
De tect U SB þbreak inÿand
check a utorun file
Enter into Setup Menu and active
local upgrades
Valid auto-run file?
Is US B file ver sion >
set SW
Display U SB sw
newer than the TV
sw.P ro mpt use r to
com firm
See Layout 1
N
Proceed?
Y
Y
N
Y
N
Y
TV auto erase
and upgrade
softw ar e
See Layout 3 See Layout 4
Is US B file ver sion <=
set SW
Y
Display U SB sw
equal/older than the
TV sw.Prom pt u ser to
com firm
See Layout 2
Y
N
End
N
Va lid a u to - run
file
Display
upgrade
progress
TV auto restar t the set, prompt user to r em ove
USB
END
Figure 5-9 User SW upgrade flowchart
If power drop
Set process with
sw upgrade
YN
Succe ssful ?
See Layout 5
N
dur ing th e
upgrade
procedure,don’t rem ove the U SB portable memory
Prompt user to
try again
Retry?
Y
TV will
continu e the
upgrade as
soon as power
com es back .
18520_215_090325.eps
Power on TV
090325
2009-Jun-05
Page 20
EN 20 TCM3.1L LA6.

6. Alignments

Alignments
Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings
6.5 Reset of Repaired SSB
6.1 General Alignment Conditions
Perform all electrical adjustments under the following conditions:
Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V
/ 50 Hz (± 10%).
AC
LATAM-NTSC: 120 - 230 V – US: 120 V
/ 60 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
Connect the set to the mains via an isolation transformer with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.
Test probe: Ri > 10 MΩ, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

First, set the correct options: see also section Option codes
Warming up (>15 minutes).
Start the alignments.
6.2 Hardware Alignments
Not applicable.
6.3 Software Alignments

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input
signal amplitude varies.
The AGC alignment is done automatically (standard value: “12”). Store settings and exit SAM

6.3.2 White Point

Press the “Menu/Home” button on the RC, and then select “Picture”. Set the picture settings as follows:
Picture Setting
Smart Picture Personal
Colour Temperature Cool
Dynamic Contrast Off
Dynamic Backlight Off
Colour Enhancement Off
Light Sensor Off
Activate SAM mode and select “RGB Align”.
White point alignment LCD screens:
Use a 100% white screen on HDMI-1 as input signal and set the following values: – “Colour temperature”: “Cool”. – All “R/G/B_Gain” values to: “127”. – All “R/G/B_Offset” values to: “240”.
In case colour analyser can be used:
Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.
Adjust the correct x,y coordinates by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1
). Tolerance dx, dy: ± 0.004.
Only the “Cool” colour temperature needs to adjust.
When finished, select “Store” in the “RGB Align” sub menu, and press “OK” on the RC to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Put the set in SAM mode (see chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select the appropriate alignment and go to one of the sub menus with the “arrow right” button. The alignments are explained below. The following items can be aligned:
Tuner AGC.
White point.
ADC calibration of VGA and YPbPr inputs.
To store the data:
When displayed, select “Store” in the related sub menu and press the “OK” button on the RC. Screen text will change from “DO” to “OK”
Press the MENU/House button on the RC.
Switch the set to Stand-by mode.
For the next alignments, supply the following test signals via a video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
Table 6-1 White D alignment values
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.278 0.289 0.314
y 0.278 0.291 0.319
In case no colour analyser is available, the default values can be used. This is the next best solution. The default values are average values coming from production.
Select the “Cool” colour temperature.
Set the RED, GREEN and BLUE default values according to the values in the “White tone default settings” table.
When finished, select “Store” in the “RGB Align” sub menu, and press “OK” on the RC to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-2 White tone default settings
White Tone 32" 42"
Colour Temp R G B R G B
Normal auto adjusted
Cool
Warm auto adjusted
175 151 168 176 150 170
(*) Default values were not available at the time of publishing. They will be published as soon as they become available.
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Page 21
Alignments
EN 21TCM3.1L LA 6.

6.3.3 Auto ADC

Purpose: For correct gray- and colour scale values of the VGA
and YPbPr inputs.
How to align the VGA/PC input:
1. Provide a 1024 × 768 @ 60 Hz test signal with White/ Black squares to the VGA input.
2. Select “Auto ADC” in the SAM menu.
3. Press the “Arrow right” button on the RC.
4. Press “OK” on the RC.
5. Wait until OSD shows “Auto ADC - OK”.
How to align the YPbPr inputs (CVI-1 and CVI-2):
1. Provide a 1024 × 768 @ 60 Hz test signal with 100% 8 step colour bar to the YPbPr input.
2. Rest is the same as for the VGA input.

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address, and what brand and type of display is used.
The new option setting is only active after the TV is switched “off/on” with the mains switch (the NVM is then read again).

6.5 Reset of Repaired SSB

When a repaired SSB will be used in an other TV, it is very important that the correct info is written into the NVM w.r.t. 12NC of the SSB, production serial number of the TV, 12NC of display and PSU, etc. To set all this, the ComPair tool can be used, or the NVM can be edited directly via the NVM editor (in SAM). Find below the addresses of these items. Use the decimal values. In case of a display replacement, reset the “Operation hours” to “0”, or to the operation hours of the replacement display.
Table 6-3 NVM addresses of “reset items”
Item NVM Address (decimal)
Display code 3195
Production serial number 3196 - 3211 (16 bytes)
SSB 12NC 3212 - 3225 (16 bytes)
2
C
Display 12NC 3228 - 3243 (16 bytes)
PSU 12NC 3244 - 3259 (16 bytes)
Model Number 3260 - 3275 (16 bytes)
Operational hours not available at the time of publishing

6.4.2 Display code

Changing the display option code via a standard RC
Key in the code “0 6 2 5 9 8 MENU x x x” (where x x x is the 3 digit decimal display code of the used display *).
Tips:
Keep the RC close to the IR receiver, and make sure the LED blinks when entering a code.
Key in all codes in one sequence, without pauses.
If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.
Display Option
Code
39mm
040
PHILIPS
MODEL:
32PF9968/10
27mm
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
E_06532_038.eps
240108
Figure 6-1 Location of Display Option Code sticker
(*) This display code can be found on the side sticker (see figure above) and/or on the rear sticker.

6.4.3 Option codes

Select this sub menu to set all options at once by selecting the correct model number. The so-called “Project ID” represents a number of different options, all related to that model number. By toggling the “arrow left/right” buttons on the RC, the correct model number can be selected.
After changing the option (or Project ID), save it by leaving the sub menu via the “Menu/House” button on the RC.
2009-Jun-05
Page 22
EN 22 TCM3.1L LA7.
˖
ˈ

7. Circuit Descriptions

Circuit Descriptions
Index of this chapter:

7.1 Introduction

7.3 Power Supply

7.2 Video and Audio Processing - MT822x

Notes:
•Only new circuits (circuits that are not published recently) are described.
Figures can deviate slightly from the actual situation, due to different set executions.
For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter
9. Block Diagrams
10. Circuit Diagrams and PWB Layouts
) and circuit diagrams (see chapter
). Where
necessary, a separate drawing for clarification is given.
DC-DC
12V to 5V
VCC
R08C11
KEY POWER ON
STANDBY IR
KEY BOARD
FLASH
64Mbit
DDR1
HDMI1
EDID
OFFON
TX,RX
RX
TX
KEY
IR
MEMOFR
Y IF
DDR IF
CRYSTAL
HDMI_Rx I2C
POWER
SUPPLY CONNECTOR
EEPROM
M24C64MN
I2C
MT8221/22R
ADC CVBS DECODER 3D COMB FILTER SCALER LVDS TRANSIMITER HDMI RECEIVER AUDIO DECODER Media player AV I Game
SCL
SDA
Mp3,JpegˈRM
SPDIF
OUT
TUNER
TDQG4-601A
Mpeg2/4ˈDivx
CVBS
IN
RGB
VSYNC
HSYNC
SAW-D94
53D
SAW-K72
70M
TUNER I2C
Y
Pb
Pr
7.1 Introduction
Key components of this chassis are:
MT8221 Mediatek Scaler IC.
R8C11Renesas Stand-by microprocessor.
TEDE8 Tuner.
TDA9886 IF Demodulator.
WM8501 D/A Converter.
STA333BW Audio Amplifier.

7.1.1 Architecture Overview

For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the MT8221 architecture can be found in Figure 7-1
SIF
TDA9
886T
VIF
ATV CVBS
TV_CVBS
CVBS IN
RGB IN
FS
FB
SIF
CVBS IN
Y/C IN
MONITOR OUT
LVDS OUT
VIDEO
OUT
R0/L0 OUT
R1/L1 OUT
R2/L2 OUT
I2S IN
I2S
USB
IF
LVD S
VIDEO
SWITCH
TV CVBS OUT
AUDIO IN BUS
ADC
DAC
AUDIO
SWITCH
MT22 BLOCK DIAGRAM_V0.2
CLASS D
AMP
AUDIO
SWTICH
Audio
Amp
.
AUDIO
AMP for
19”
AUDIO
AMP for
19”
PANEL
R
L
CVBS
CEC
EDID
HDM2
EDID
HDM3
Figure 7-1 Block diagram of MT822x
7.2 Video and Audio Processing - MT822x
The MediaTek MT822x is an ultra high integrated single chip for flat panel TV. It supports multimedia video/audio input and output format up to full HDTV. It includes an advanced 3D comb filter/TV decoder to retrieve the best image from popular composite signals and embedded HDTV/VGA decoders for high bandwidth input signals. The new 4th generation advanced motion adaptive and motion estimation de-interlacer converts accordingly the interlaced video into a progressive one with overlay of a 2D graphic processor.
2009-Jun-05
VGA
RGB
YPbPr
EDID
CVBS
RGB
YPbPr SCART1 AV IN SPDIF
CVBS
Y/C
SCART2
PC AUDIO
AV O UT
USB
HEAD PHONE
18520_200_090311.eps
090311
Independent two flexible scalers provide wide adoption to various LCD panels for two different video sources at the same time. The on-chip audio processor decodes the analogue signals from the tuner with lip sync control, delivering high quality post­processed sound effects to the audio amplifier stage. An on-chip microprocessor reduces the system BOM and shortens the schedule of UI design by high level C programming.
Page 23
Circuit Descriptions
EN 23TCM3.1L LA 7.

7.3 Power Supply

All power supplies used in this chassis are a “black box” for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.
Consult the Service Spare Part portal for the order codes of these boards.
Below some background info on the PSUs is given, to ease the troubleshooting process in case of power supply problems

7.3.1 Diversity

The only type of power supply used in this platform is the Integrated Power Board (IPB) - incl. LCD backlight inverters.
Below find an overview of the different PSUs that are used:
Table 7-1 Supply diversity
Supplier PSU Model Input Voltage Range
TCL
IPL32L 32" LG display
IPL42A IPL42L
42" AUO display 42" LG display
100 - 240 Vac

7.3.2 IPL32L PSU

Block Diagram
VCC
395V
St andby
circuit
IC3 / T2
PWM
Circuit
IC2
T1
AC IN
EMC
Filter circu it
Bridge rectifier Filter circu it
Bridge rectifier Filter circu it
12V Relay K 1
PFC Circu it
IC1
L1
T4
HV tran sform er
High Voltage AC ou tp ut
Figure 7-2 Block diagram IPL32L PSU
Key Components
The key component ICs are:
Stand-by power supply IC: FSQ510 (Fairchild).
PFC control IC: L6563 (ST).
24V PWM control IC: FA5571N (FUJI).
Inverter high voltage control IC: OZ9976 (O2).
3.3 V
Opto cou pler
24V
12V op erating volta ge
INVERTER Control a nd drive circu it
Feedback circuit
Protection circuit
BL- ON
PDIM
PS-ON
St artup Sig nal
18520_211_090319.eps
MCU
Circuit
090319
It should be noted that for different display manufacturers, different PSUs can be used. When ordering a new PSU, always check which LCD panel is used in the set, and order the correct PSU!
Control Signals
Table 7-2 Control signals
Control signal Comments Output
PS-ON 3.3V >= ON >= 2.0V AC power output ON
0.7V >= OFF >= 0V AC power output OFF
BL_ON 5.0V >= ON >= 2.0V The inverter is working
1.0V >= OFF >= 0V The inverter is switched OFF
DIMP High level: 2V ~ 5.0V HD: OPC dimming, 140Hz
Low level: 0V ~ 0.7V FHD: PWM, 103.4Hz
Output Characteristics
Table 7-3 Output characteristics
Output Voltage Tolerance Min. current Max. current Load regulation
+3V3(STB) +/- 3% 5 mA 200 mA +/- 5%
24V +/- 5% 0.2 A 2.0 A +/- 5%
Fault Finding
S witch “on”
3. 3V normal?
Y
P S_ON no rmal?
Y
Relay is closed ?
Y
PFC voltage
norma l?
Y
BL_ON a nd
DIMP normal?
Y
HV pa rt f ailu re (IC protection circuit).
N
CB1 voltage
norma l?
Check S tand b y IC, feed back, trans former fa ilure s, etc.
N
Fault movement
N
Relay power supply p art (QB 1) fault
N
N
Fault movement
Y
PFC_VCC
norma l?
Y PFC IC, feedback, drive f ailure, e tc.
N
Fus e is open
Whether the
b ridg e rec tifier
circuit
Attention : als o check
the PFC a ndP WM co ntrol,
such as whether the MOS sho rt-circuit in order to
rep lace the Fuse and
PWM IC, feedback,
trans former fa ilure s, etc.
N
24V norm al?
PFC po wer supply part (Q W11 ) fault
18520_212_090319.eps
Y
Bridge.
N
Y
090319
Figure 7-3 Fault finding diagram IPL32L PSU
2009-Jun-05
Page 24
EN 24 TCM3.1L LA7.

7.3.3 IPL42L PSU

Block Diagram
Circuit Descriptions
DIM
PFC outpu t
AC
Inp u t
Relay
PFC IC
L6562A
395V
(ST)
BL-ON
P S -O N
Figure 7-4 Block diagram IPL42L PSU
Key Components
The key component ICs are:
Stand-by power supply IC: FSQ510 (Fairchild).
PFC control IC: L6562 (ST).
24V PWM control IC: FA5571N (FUJI).
Inverter high voltage control IC: OZ9926 (O2).
Control Signals
INVERTER
IC OZ9926A
(O2)
ENABLE
S witch control Voltage Detect
PWM Power
Supp ly IC
FA5571
(FUJI)
S TB Power
Supp ly IC
F S Q510
(FAIRCHILD
18520_214_090319.eps
+HV
HV
-
24V
3 .3 V
090319
Table 7-4 Control signals
Control signal Comments Output
PS-ON 5.0V >= ON >= 2.0V AC power output ON
BL_ON 5.0V >= ON >= 2.0V The inverter is working
Burst dimming freq. / duty 100 - 200 Hz / 10 - 100%
PWM Dimming High level: 2V ~ 5.0V
1.0V >= OFF >= 0V AC power output OFF
1.0V >= OFF >= 0V The inverter is switched OFF
Low level: 0V ~ 0.7V
Output Characteristics
Table 7-5 Output characteristics
Output Voltage Tolerance Min. current Max. current Load regulation
+3V3 +/- 5% 5 mA 300 mA +/- 5%
24V +/- 5% 0 .5 A 2.5 A +/- 5%
Fault Finding
Normal PSU working order:
Connect the 220V AC power plug.
The 3.3V Stand-by power supply (Stand-by uP U801) will start. This is a “single-ended flyback regulator”. For a good functioning of this part, check the availability of 1.25V on U803 (TL431).
On connector P802, signal line “PS_ON” will go “high” (3V3) and relay K801 will be activated.
Also capacitors C811/C812 will be charged, supplying IC806 with electricity. This will start the PFC circuit and generate the +24 V control.
Now, IC805 will start, and will generated the 24V output.
On connector P802, signal “DIM” sets the PWM dimming status.
On connector P802, when signal “BL-ON” goes “high”, the high voltage Inverter (IC901, OZ9926A) will start.
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Page 25

8. IC Data Sheets

IC Data Sheets
EN 25TCM3.1L LA 8.
Index of this chapter:

8.1 Diagram B01, LD1117 (IC U4)

8.2 Diagram B01, RT8110 (IC U13)
8.3 Diagram B01, MP1593 (IC U14)
8.4 Diagram B01, PQ1CX41 (IC U20)
8.5 Diagram B02, MX25L3205 (IC U10)
8.6 Diagram B02, MT8221 (IC U11)
8.7 Diagram B03, RT9199 (IC U1)
8.8 Diagram B04, TDA9885 (IC U2)
8.9 Diagram B07, WM8501 (IC U9)
8.10 Diagram B09, RC4558 (IC U26/U37)
8.11 Diagram B09, LM833D (IC U27)
8.12 Diagram B10, STA333BW (IC U17)
This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs).
8.1 Diagram B01, LD1117 (IC U4)
Block Diagram Pin Configuration
LD1117DT

Figure 8-1 Internal block diagram and pin configuration

DPAK
F_15710_166.eps
230905
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Page 26
EN 26 TCM3.1L LA8.

8.2 Diagram B01, RT8110 (IC U13)

Block Diagram
IC Data Sheets
0.8V
REF
SSE
+
Gm
FB
+
-
Pin Configuration
Regulator
0.5V
EO
DRIVE
V
CC
SS
Oscillator
-
+
+ +
-
PWM
VCC
UVP
Power-
On Reset
POR
Soft-Start and Fault
Logic
S1L
Gate
Control
Logic
I
OC
OC
PH_M
VCC
R
+
-
-
+
OC
PHASE
1.5V
UGATE
VCC
BOOT LGATE
GND
(TOP VIEW)
PHASE
7
1
2
UGATE
GND
68
34
FB
BOOT

Figure 8-2 Internal block diagram and pin configuration

DRIVE
LGATE
5
VCC
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8.3 Diagram B01, MP1593 (IC U14)

Block Diagram
2
IN
INTERNAL
REGULATORS
+
SHUTDOWN
--
EN
0.7V
7
COMPARATOR
COMPARATOR
--
LOCKOUT
OSCILLATOR
40/385KHz
SLOPE
COMP
CLK
IC Data Sheets
CURRENT
SENSE
AMPLIFIER
+
CURRENT
-­COMPARATOR
+
--
SRQ
EN 27TCM3.1L LA 8.
5V
1
BS
M1
Q
1.8V
M2
3
SW
2.3V/
FREQUENCY
FOLDBACK
COMPARATOR
2.6V
+
+
--
Pin Configuration
BS
IN
SW
GND
EXPOSED PAD
ON BACKSIDE
CONNECT TO PIN 4
1
2
3
4
1.22V0.7V
5
FB
TOP VIEW
--
+
AMPLIFIER
8
7
6
5
ERROR
SS
EN
COMP
FB
6
COMP
4
GND
8
SS
18520_307_090325.eps
090325

Figure 8-3 Internal block diagram and pin configuration

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EN 28 TCM3.1L LA8.

8.4 Diagram B01, PQ1CX41 (IC U20)

Block Diagram
IC Data Sheets
Pin Configuration
18520_313_090327.eps
090327

Figure 8-4 Internal block diagram and pin configuration

2009-Jun-05
Page 29

8.5 Diagram B02, MX25L3205 (IC U10)

Block Diagram
Address
Generator
IC Data Sheets
X-Decoder
Memory Array
EN 29TCM3.1L LA 8.
additional 4Kb
SI
Data
Register
Mode
CS#, ACC,
Logic
WP#,HOLD#
SCLK Clock Generator
Pin Configuration
16-PIN SOP (300 mil)
HOLD#
VCC
NC PO2 PO1 PO0
CS#
SO/PO7
1 2
3
4 5 6 7
8
16 15 14 13 12 11 10
9
SRAM
Buffer
Machine
SCLK SI
PO6 PO5 PO4 PO3 GND WP#/ACC
State
Y-Decoder
Sense
Amplifier
Output
Buffer
HV
Generator
SO
PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
SI Serial Data Input SO/PO7(1) Serial Data Output or Parallel Data
output/input
SCLK Clock Input
HOLD#(2) Hold, to pause the serial communication
(HOLD# is not for parallel mode)
WP#/ACC Write Protection: connect to GND;
12V for program/erase acceleration:
connect to 12V
VCC + 3.3V Power Supply
GND Ground PO0~PO6 Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC No Internal Connection
Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during parallel mode.

Figure 8-5 Internal block diagram and pin configuration

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EN 30 TCM3.1L LA8.
Y
S

8.6 Diagram B02, MT8221 (IC U11)

IC Data Sheets
CVBS / SV
(x8)
(Customer)
External
PbPr
(x2)
Switches
VGA
HDMI x3
Control Signal (GPIO, …)
LVD
Analog Front End
ADC
ADC
3D TVD
HDTVD
ADC
VGAD
ADC
Digital Path
LVDS Tx
Dithering
Mer ge
Gamma
MUX
8032
Main Path
MDD i
PIP Path
MDD i
OSD
Color
Color
DSP
DS
DRAM
DS
US
US
2009-Jun-05

Figure 8-6 Internal block diagram and pin configuration

18520_300_090311.eps
090311
Page 31

8.7 Diagram B03, RT9199 (IC U1)

Block Diagram
Current Limit
Thermal Protection
VCNTL
IC Data Sheets
VIN
EN 31TCM3.1L LA 8.
REFEN
Pin Configuration
(TOP VIEW)
VIN
GND
+
EA
-
GND
8
2
7
VCNTL
VCNTL
VOUT
REFEN
VOUT
3
4
SOP-8
VIN
GND
2
GND
REFEN
VOUT
3
4
SOP-8 (Exposed Pad)

Figure 8-7 Internal block diagram and pin configuration

6
5
8
7
6
5
VCNTL
VCNTL
NC
NC
VCNTL
NC
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EN 32 TCM3.1L LA8.
_
)
p

8.8 Diagram B04, TDA9885 (IC U2)

Block Diagram
VIF-PLL
C
VAGC pos
TOP
9
TAGC
14 16
C
AGC neg
(1)
VAGC VPLL
C
BL
IC Data Sheets
filter
19
external
reference
crystal
4 MHz
or
REF
15
AFC
21
TUNER AGC
VIF2
2
1
VIF1
24
SIF2
23
SIF1
SUPPLY
V
(1) Not connected for TDA9885.
VIF-AGC
1820
AGND
P
Pin Configuration
VIF-PLL
SINGLE REFERENCE QSS MIXER/
INTERCARRIER MIXER AND
AM-DEMODULATOR
SIF-AGC
C
AGC
13
n.c.
RC VCO
OUTPUT
PORTS
3
O
P
DIGITAL VCO CONTROL
TDA9885 TDA9886
MAD
2
C-BUS TRANSCEIVER
I
22
2P
O1
LCS
10
7 11
12
ISDNGDADS
DAMO
sound intercarrier output and MAD select
AFC DETECTOR
VIDEO TRAPS
4.5 to 6.5 MHz
AUDIO PROCESSING
AND SWITCHES
NARROW-BAND FM-PLL
DETECTOR
4
FM-PLL filter
CVBS
17
LLPMF
[1.1 V (p-p) without tra
AUD
8
DEEM
5
de-emphasis network
6
AFD
C
AF
video output 2 V (p-p
2009-Jun-05
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
1
2
3
4
5
6
7
8
9
10
11
12
TDA9885 TDA9886
SIF2
24
SIF1
23
OP2
22
AFC
21
V
20
P
VPLL
19
AGND
18
CVBS
17
(1)
VAGC
16
REF
15
TAGC
14
n.c.
13

Figure 8-8 Internal block diagram and pin configuration

G_16510
Page 33

8.9 Diagram B07, WM8501 (IC U9)

Block Diagram
IC Data Sheets
EN 33TCM3.1L LA 8.
Pin Configuration
18520_311_090325.eps
090325

Figure 8-9 Internal block diagram and pin configuration

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EN 34 TCM3.1L LA8.

8.10 Diagram B09, RC4558 (IC U26/U37)

Block Diagram
V
CC+
IN−
IN+
IC Data Sheets
SCHEMATIC (EACH AMPLIFIER)
OUT
V
CC−
Pin Configuration
1OUT
1IN−
1IN+
V
CC
(TOP VIEW)
1
2
3
4
8
7
6
5
V
CC
+ 2OUT 2IN− 2IN+
2009-Jun-05
18520_309_090325.eps
090326

Figure 8-10 Internal block diagram and pin configuration

Page 35

8.11 Diagram B09, LM833D (IC U27)

Pin Configuration
Output 1
1
IC Data Sheets
V
8
CC
EN 35TCM3.1L LA 8.
Inputs 1
V
EE
2
3
4
1
2
7
6
5
Output 2
Inputs 2
(Top View)
18520_306_090325.eps

Figure 8-11 Internal block diagram and pin configuration

090225
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EN 36 TCM3.1L LA8.

8.12 Diagram B10, STA333BW (IC U17)

Block Diagram
SCL SDA
SCL SDA
SA
SA
SDI
SDI
LRCKI
LRCKI
BICKI
BICKI
RESET
RESET
INT LINE
INT LINE
PWDN
PWDN
Serial Data Input
Serial Data Input
Channel mapping
Channel mapping
Processor
Processor
I2C
I2C
EQ, Tone,
EQ, Tone,
Volumes
Volumes
IC Data Sheets
CONTROL
CONTROL
STATUS
STATUS
CONFIG
CONFIG
POWER
POWER
DDX3A
DDX3A
DDX3B
DDX3B
DDX4A/TWARNEXT
DDX4A/TWARNEXT
DDX4B/EAPD
DDX4B/EAPD
OUT1A
OUT1A
OUT1B
OUT1B
OUT2A
OUT2A
OUT2B
OUT2B
XTI
XTI
PLL
PLL
PLL_FILTER
PLL_FILTER
Pin Configuration
GND_SUB
SA
TEST MODE
VSS
VCC_REG
OUT2B
GND2
V
CC2
OUT1B
V
1
CC
GND1
OUT1A
GND_REG
Vdd
CONFIG
11
12
14
15
16
17
18
1
2
3
4
5
6
7
8
9
36
35
34
33
32
31
30
29
28
26
25
23
22
21
20
19 A4TUO/DPAEA3XDD/A3TUO
V
dd_DIG
GND_DIG
SCL
SDA
INT_LINE
RESET
SDI
LRCKI
IKCIBA2TUO
7201
4231
XTI
PLL_GND
PLL_FILTER
PLL_Vdd
POWRDN
GND_DIG
VDD_DIG
B4TUO/NRAWTB3XDD/B3TUO
18520_310_090325.eps
090325
2009-Jun-05

Figure 8-12 Internal block diagram and pin configuration

Page 37

9. Block Diagrams

Wiring Diagram 32" (Click)

WIRING DIAGRAM 32" (CLICK)
Block Diagrams
EN 37TCM3.1L LA 9.
LCD DISPLAY
B
SSB
2. LVDSVDD
4. LVDSVDD
6. GND
8. GND
10. E4N
12. E3N
14. ECKN
16. E2N
18. E1N
20. E0N
35. O3P
21. O1N
38. O0N
29. O4N
40. GND
33. O3N
P15 (B11)
7. ADIN1
6. KEY
5. GPIO_11
4. LED_RED
3. GND
2. OIRI_IN
1. 5VSB
22. SEL LVDS
24. BIT SEL
27. VBR OUT
P602
1. ADIN1
2. GPIO_11
3. LED-RED
4. GND
5. IR_IN
6. 3.3V
P601
1. 3.3V
2. IR_IN
3. GND
4. LED-RED
5. GPIO_11
6. KEY
7. ADIN1
KEYBOARD CONTROL
E
P3
2. HV1
MAIN POWER SUPPLY
A
08-IPL32L-PW1
1. HV1
12. PB-ON/OFF
10. PW-ON
8. 3.3/5VSB
6. GND
4. +24/12V
2. +24/12V
P22 (B01)
11. BP-ADJ
9. GND
7. 3.3/5VSB
5. GND
3. GND
P4
2. HV2
1. HV2
P2
11. DIM
9. GND
7. +3.3VSB
5. GND
3. GND 1 +24V
12. BL_ON
10. P_ON
8. N.C .
6. GND
4. +24V
2. +24V
1. +24/12V
P17 (B10)
1. LVDSVDD
3. LVDSVDD
5. GND
7. GND
9. E4P
11. E3P
13. ECKP
15. E2P
17. E1P
19. EOP
21. DCR
23. NC
25. VBR EX
27. O4P
31. O3P
33. O2P
35. O1P
37. O0P
39. GND
F1 T3.15A
P25 (B10)
1. NC/OUT_L-
2. OUTL+/OUT_L+
3. OUTL-/OUT_R+
P1
3. N
1. L
4. NC/OUT_R-
IR LED PANEL
J
TO
BACKLIGHT
P1
1. GPIO_11
2. LED_RED
3. GND
4. IR_IN
TO
BACKLIGHT
INLET
5. +3.3V
RIGHT SPEAKER
LEFT SPEAKER
18650_400_090603.eps
090603
2009-Jun-05
Page 38

Wiring Diagram 42" (Click)

WIRING DIAGRAM 42" (CLICK)
Block Diagrams
EN 38TCM3.1L LA 9.
LCD DISPLAY
B
SSB
2. LVDSVDD
4. LVDSVDD
6. GND
8. GND
10. E4N
12. E3N
14. ECKN
16. E2N
18. E1N
20. E0N
22. SEL LVDS
24. BIT SEL
27. VBR OUT
29. O4N
33. O3N
35. O3P
21. O1N
38. O0N
40. GND
P15 (B11)
7. ADIN1
6. KEY
5. GPIO_11
4. LED_RED
3. GND
2. OIRI_IN
1. 5VSB
P602
1. ADIN1
2. GPIO_11
3. LED-RED
4. GND
5. IR_IN
6. 3.3V
P601
1. 3.3V
2. IR_IN
3. GND
4. LED-RED
5. GPIO_11
6. KEY
7. ADIN1
KEYBOARD CONTROL
E
P902
2. HV2
1. HV2
MAIN POWER SUPPLY
A
IPL42L
P901
2. HV1
1. HV1
P802
11. DIM
9. GND
7. +3.3VSB
5. GND
3. GND 1 +24V
P801
3. N
1. L
12. BL_ON
10. P_ON
8. N.C .
6. GND
4. +24V
2. +24V
F801 T5.0A
12. PB-ON/OFF
10. PW-ON
P22 (B01)
11. BP-ADJ
9. GND
8. 3.3/5VSB
7. 3.3/5VSB
6. GND
4. +24/12V
5. GND
3. GND
2. +24/12V
1. +24/12V
P17 (B10)
1. LVDSVDD
3. LVDSVDD
5. GND
7. GND
9. E4P
11. E3P
13. ECKP
15. E2P
17. E1P
19. EOP
21. DCR
23. NC
25. VBR EX
27. O4P
31. O3P
33. O2P
35. O1P
37. O0P
39. GND
P25 (B10)
1. NC/OUT_L-
2. OUTL+/OUT_L+
3. OUTL-/OUT_R+
4. NC/OUT_R-
IR LED PANEL
J
TO
BACKLIGHT
P1
1. GPIO_11
2. LED_RED
3. GND
4. IR_IN
TO
BACKLIGHT
INLET
5. +3.3V
RIGHT SPEAKER
LEFT SPEAKER
18650_401_090603.eps
090603
2009-Jun-05
Page 39

Block Diagram

YPBPR2
Block Diagrams
EN 39TCM3.1L LA 9.
BASS
Y/C
GAME PORT
YPBPR1
AV3
AV4
switch
RF IN
I2C
DDR
CVBSOUT
RT9199
SDRAM
ADDRESS
DATA
MT8222/21
SCART2-OPTION
I2S
RESET
EN25B32
24C32
CEC RESET MUTE
POWER/ON
SERVICE
POWER_PROTECK
12V/5VPANEL-
LED
VGA H/V
R8C/11
1~2A
IR
KEY
MODE
SHORT_PROTECK
CPU
RT916
6
STA335BW
3.3VSB
12V-
SPEAKER
52"6A
AC~220V
SCART1
HDMI1
ESD
HDMI2
HDMI3
edid
edid
edid
RC4558
RC4558
EDID
5VRF-200mA
5VUSB-2A
1.2V-200mA
LD1117
CONFINE
2.6VDDR-500mA
3.3V-
LD1117
LD1117
500mA
LD1117
1.1V-500mA
5.2VM- 4A
DC-DC
RT8110+
MOS
DELAY
PQ1CX41
inductance
12V
HV AC2KV
5.2VM
3.3V
SHORT_PROTECK
1.1V
LCD PANEL
1.2V
12VM
2.6VDDR
5VRF
AVOUT
HEADPHONE
USB1
2009-Jun-05
USB2
VGA
18520_403_090313.eps
090324
Page 40
Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

PSU: Power Supply Unit (32")

8 76554 3 21
EN 40TCM3.1L LA 10.
A1
F
E
D
Power Supply Unit (32" Full HD)
F
E
D
C
B
A
4678
3 21
18520_541_090313.eps
C
B
A
090313
2009-Jun-05
Page 41

Layout 32" PSU (Top)

Circuit Diagrams and PWB Layouts
EN 41TCM3.1L LA 10.
2009-Jun-05
18520_550_090313.eps
090313
Page 42

Layout 32" PSU (Bottom)

Circuit Diagrams and PWB Layouts
EN 42TCM3.1L LA 10.
2009-Jun-05
18520_551_090313.eps
090313
Page 43
Circuit Diagrams and PWB Layouts

PSU: Power Supply Unit (42")

8 76554 3 21
EN 43TCM3.1L LA 10.
A1
F
E
D
C
B
A
Power Supply Unit (42")
Z128
I
P801
N
3
2
1
!
!
L
F801
!
5.0A
Z2
I
250VAC
!
L809
2
V
R830 560V
4700UH
D808
1N4007
D815
1N4007
LIF-JLB1359
134
L807
D811
D812
RL255
RL255
3A/600V
Z125
I
PGND
!
4
3
L808
C828
!
0.22U
2
Z44
I
2
1
2
1
K801
3
4
3V
4
3
D822
4148WS
C823
0.47U
1
1
1
3
3
!
2
2
K801A
4
4
C845
!
470P
AGND
C843
!
470P
!
3
4
!
L804
2
R836
NC
1
!
!
1N4007
C824 1000P
PGND
R822
4R7
D816
R863
0R
C826
R858
0.022U
NC
47K
Z126
I
D810 RL255
Q803
P7NK80
R866 27K
R859
R856
NC
0.33R
PGND
PGND
R819
R862
C841
22K
390K
1500P
Z110
R803
I
22K
D813
HER108
I I
R867
1K
C819
0.1U
PGND PGND
PGND
C801
47P
PGND
Z118
I
R888 39K
R827 4K7
PGND
R826 4K7
I
Z119
U805
FA5571N
8
1
VH
ZCD
7
2
NC
FB
6
3
VCC
IS
5
4
OUT
GND
Z73
PGND
Z129
I
C832
470P
I
R870 1K
R887
27K
Z120
I
D829 FR104
C802
C835
10U
0.1U 25V
PGND
PGND
R871 68R
D828
4148WS
Z117
I
Z116
I
C806
4U7
!
450V
PGND
PGND
C818
D801
5V6
0.022U
PGND
PGND
Z121
I
C847
PGND
Z122
I
R849
10R
D805 18V
PGND
Z4
I
I
Z115
U801
1
2
3
4
8
VSS
GND1
7
D
GND2
6
VFB
5
VCC
SYNC
FSQ510
D803
20V
PGND
Z25
I
Z1
I
+
Z26
I
Z27
I
!
D804
~~ -
US10KB80R
PGND
C808
C809
0.47U
0.47U
PGND
PGND
L801
6
7
5
N1
8
4
N2
9
3
10
2
11
12
1
PGND
Z43
I
R814
R815
510K
510K
R812 1M
R811
1M
R810 1M
Z127
I
VC
L802
Z130
I
VAL?
C807 330P
C822
0.1U
E
C
Q811
B
2907AL
R885 4K7
PGND
Z123
Z124
I
I
4
R868
10K
3
PGND
PS2561
C844
1000P
PGND
R873 47R
Z131
I
T801
6
ND
5
4
3
NP2
2
NP1
1
PGND
4
3
PS2561
PGND
C825
0.1U
400V 510K R813
R861
470K
R847
12K7
PGND
Z28
I
!
1
Z29
I
1U
C816
C814
0.1U R848 12K
Z30
I
C817
R840 22K
PGND
C815
0.01U 50V
PGNDPGND
2
U802
AGND
R835 10M
! !
AGND
7
8
9
NS
10
11
NS'
12
!
R877
1
2
U803
!
Z52
I
2
D806
Z48
YG902C
I
L803
R808
C827
1000P
100R
C804
C805
1000U
1000U
35V
35V
D824
FR104
1K
Z51
I
R843
4K7
R845
C813
1K
0.1U
3
Z53
I
1
U808
TL431
AGND
PGND
!
C842 220P
AGND
T802
5
GND
ND
4
16V
3
DRAIN
2
NS
NP
1
VC+
!
U804
4
2
3
PS2561
!
D809
SR160
6
7
8
9
10
AGND
1
Z111
I
C838
470U
16V
AGND
Z112
Z114
R838
I
1K2
I
U807
TL431_1V25
R825
2R7
R809 10R
R801
2R7
Z67
Z109
I
VC
D814 FR104
Z105Z106
C803
22U 50V
R880 6K8
R864 6K8
4148WS
PGND
I
!
R865
Z108
4R7
I
PGND
R855
27K
Z107
I
D820
PGND
PGND
U806
L6562A
1
INV
VCC
GDCOMP
3 6
MULT GND
4
ZCD
CS
Z31
I
680P
123
AGND
R842 10K
R846A
AGNDAGND
L805
NC
R850 200R
R854
10K
3
1
2
AGND
R841
39K
8
72
5
C811
1U
I
Z42
Z35
I
Z34
I
D802
18V
PGND
PGND
R886 1K
Z45
I
R829 100R
AGND
R821
R823
3K3
3K3
Z49
AGND
I
C836
0.47U 160V
R844 20K
AGND
R846
4K74K7
C839
NC
VOL?
AGND
R
853
R853A
5K1
240K
C820
0.15U
Z113
I
R852
3K
3A/600V
Z3
Z5
Z11Z12Z6
I
I II
I
PGND
Z7
Z8 Z10Z9
I II
I
R804
Z38
Z36
C812
R817 4R7
1U
C
Z40
PGNDPGND
I
B
E
Q805
2222AL
Q809
2907AL
E
B
R872 100R
C
PGND
PGND
Z33
I
I
10R
I
R807
Z37
47R
I
R806
Z39
47R
I
R805
10R
R839
27K
Z41
I
VBUS
D818
BYV29-600
I
Z32
PGND
0.047U
R860
5R
T
C830
VBUS
!
C840
C840A
120U
120U
450V
!
450V
F
PGND
Q802 SK3568 12A/500V
E
C833
Q801 SK3568
220P
12A/500V
R837
0.15R
PGND
HOT
Q808
R820
BC847A
75R
E
C
B
R881 470R
Z46
I
C837
0.01U
AGND
L806
Z19Z20
I I
R824
3K3
R802 220K
D807
4V7
2.2UH +24V/2A
Z50 I
D819
C821
4148WS
0.1U
AGND
AGND
Z15
I
AGND
COLD
R876 10K
Z13
Z22 Z21
I
AGND
D
Z18
P_ON
I
Z47
I
R875
R874
4K7
47K
AGND
Z14
I
C829
470U
C
35V
Q807
B
BC847A
E
AGND
II
+3.3VSB/0.2A
AGND
Z16
I
Z17
DIM
I
P802
11 12
10
9
7 8
56
3 4
1
2
BL_ON
AGND
C
AGNDAGND
B
A
AGND
2009-Jun-05
4678
3 21
18520_542_090313.eps
090313
Page 44
Circuit Diagrams and PWB Layouts

PSU: Power Supply Unit (42")

8 76554 3 21
EN 44TCM3.1L LA 10.
A2
F
E
D
C
R977
75K
B
A
Power Supply Unit (42")
R902
C903
0.47U
AGND
AGND
3
C917A
47P
AGND
AGNDAGND
C924
0.01U
4R7
AGND
C908
1U
AGND
Z63
I
R934
33K
R930
NC
+24V/2A
C907
1U
2
RW977
2K
1
R957
75K
(56K For AUO)
C917 220P
DIM
R882
1K
HDR2
LDR1
R956
Z69
I
LDR2
47K
R928
10K
Z54
I
R904
R907
1
AGND
2
I
Z64
3
Z65
I
4
Z66
I
5
6
AGND
7
8
I
Z68
9
10
11
12
AGND
R915
Z70 Z71
2K2
R924 100K
2K2
R926
R925 100R
Q920
2N7002
HDR2
2K2
R908
R909 100R
Q915
2N7002
LDR2
2K2
R905 100R
Q913
2N7002
HDR1
2K2
R906
Z58
100R
Q914
2N7002
LDR1
U901
LDR1
LDR2
RPT
CT
SYNC
LCT
PDIM
VSEN_POL
OZ9926A
C920
0.022U
Z55
I
Z56
I
B
Z57
I
B
B
I
B
AGND
SSTCMP
C
Q908
B
BT3904
E
E
Q911
BT3906
B
C
AGND
C
B
E
E
B
C
AGND
C
Q905 BT3904
E
E
Q909
BT3906
C
AGND
C
Q906 BT3904
E
E
Q912
BT3906
C
LX1LX2
HDR1HDR2
BST1BST2
VREF
VIN
ENAGNDA
ADIM
UVLS
OVPT
TIMER
ISEN
II
Q907 BT3904
Q910
BT3906
R941
Z94
I
B
B
Z100
E
B
C
Z103
E
B
C
Z82
I
0R
R948 10R
E
Q916
BT3906
C
R947
Z96 Z97
10R
E
Q919
BT3906
C
R951 10R
I
Q917 BT3906
R952
I
10R
Q918 BT3906
+24V/2A
BL_ON
Z93
I
SK3561
Z101
I
Q903
SK3561
Z104
I
Q901
SK3561
Q902
II
PGND
II
PGND
Q904
SK3561
0.47U C912
Y3
1
2
HOT
COLD
Z79
I
AGND
R927
4K7
C
E
2
2
B
Q923
BT3904
!
D905
4148WS
R903
4K7
!
D902
4148WS
T904
T903
Z78
P901
R945
10K
2
1
P902
2
1
Z24
Z90
R942 100R
I
AGND
I
C901 33P
C906
0.022U
Z86
I
C905
0.022U
Z88
I
C902 33P
Z23
I
D916
BAV70L
2
3
R944
10K
I
Z89
R954 100R
Z87
I
C930
0.022U
C931
0.022U
1
AGND
3
Z84
41
Z85
3
I
I
C913
470P
AGND
41
R975
R973 200R200R
R938
R935
200R
200R
R939
R937
200R200R
R940
R936
200R
200R
R916
R920 200R200R
R921
R919
220R
220R
R971
R970
200R
200R
R974
200R
R959
200R
R960
200R
R972
R963 200R
R961
200R
200R
D901
4148WS
R964
2K2
AGND
AGND
D913
BAV70L
21
3
C921
1000P
AGND
I
VREF
C927
R968
4700P
47K
Q924
BT3906
R918
E
B
C
4K7
AGND
10K
R967
Z80
I
AGND
Q922
BT3904
C
B
E
R966 4K7
Z81
I
AGND
R976
4K7
VBUS
Z95
R917 10K
I
R910
10K
4148WS
R950
1K
R953
D904
R949
1K
D903
4148WS
R946
4148WS
4148WS
1K
1K
D907
D908
R912 100R
Z61
I
6
7
8
9
GND
10
C911
1U
Z62
I
Z60
I
6
7
8
9
GND
NS
10
C910
T902
1U
Z59
I
5
GND1
ND
4
VCC
3
DRAIN
2
NP
NS
1
VC+
T901
R923 100R
!
R913 100R
5
GND1
ND
4
VCC
3
DRAIN
2
NP
1
VC+
R922 100R
!
Z92
I
R911
Z91
10K
I
Z98
I
R914
10K
Z99
I
Z102
I
24
Z72
AGND
23
22
21
20
19
18
17
16
15
14
13
C918
4700P
AGND
I
C914
1U
HDR1
VREF
C909
0.47U
Z74
I
R901
56R
AGND
AGND
Z75
I
R969
47K
(39K For AUO)
Z76 Z77
R931
10K
AGND
R962
750K
D909
4148WS
C916
0.047U
Z83
I
AGND
R932
56K
C922
0.01U
R958
(2k4 For AUO)
C915A
0.47U
1K8
AGND
AGND
2
RW978
C915
1U
470R
R978
C923
0.1U
AGND
AGND
3
1
1K8
F
E
D
C
B
A
AGND
AGND
2009-Jun-05
4678
3 21
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090313
Page 45

Layout 42" PSU (Top)

Circuit Diagrams and PWB Layouts
EN 45TCM3.1L LA 10.
2009-Jun-05
15820_552_090313.eps
090313
Page 46

Layout 42" PSU (Bottom)

Circuit Diagrams and PWB Layouts
EN 46TCM3.1L LA 10.
2009-Jun-05
15820_553_090313.eps
090313
Page 47

SSB: DC/DC

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 47TCM3.1L LA 10.
B01
DC - DC
12_M
GND
C131
0.1U
R124
1K2
R129
220R
C101
1000U
C100 1000U
16V
D13
LL4148
D11
LL4148
C7
4U7
GND
C168
0.1U
D12
LL4148
L25
200R
L24 200R
5V_OUTSIDE
R11
0R
NC
GND
GND
GND
GND
C165
0.1U
R131
R130 2K2
1K
R133 4K7
R136 3K9
R105
4K7
R135 2K7
L23 200R
L22 200R
5V_M
12_IF
+3V3
5V_M
F
Z15
T
E
D
C
B
12_M
R7
NC
0R
R2 0R
NC
R103
0R
D8
LL4148
GND
VBR_OUT
C143
1U
R114
4K7
Q8
BT3904
R110
5V_M
1K
GND
+3V3
VBR_EXT
R8
10K
NC
R109
C
22K
B
E
C4
470P
R111
0R
100R
C269 33P
R249
PWM0
R104 22K
BT3904
D9
LL4148
C
B
E
Q3
C163
1U
GND
C164
0.1U
U13
RT8110
1
BOOT
PHASE
2
DRIVE
UGATE
3 6
FB GND
4
LGATE
VCC
C6
C167
4U7
about 1mm
G2
4
S2
3
G1
2
S1
1
Q1
D13N03LT
8
7
5
0.1U 16V
D2B
5
L15
D2A
15UH
6
D1B
7
D1A
C166
8
0.01U
GND
R126
10R
GND
GND
R6 0R
C132
1000P
T
Z7
12/24V_AUDIO
R708
0R
L60
120R
C555
47U
6V3
F
Z159
T
+3V3+3V3
R452 4K7
R128 1K
UP34
C268
1000P
E
GND
4K7
R451
5V_M15V_M1
R453
1K
NC
R115 100R
C
B
E
Q9 BT3904
L59
120R
GND
R106
100R
Z4
SW
T
C144
0.1U
GND
C137
1000P
BL-ON/OFF
GND
12_M1
L58
120R
5VSB
Z8
GND
PB-ON/OFF
Z5
C135 1000P
T
3.3/5VSB
T
GND
+24/12V
PW-ON
GND
GND
4
6
8
10
12
C543 1000P
P22
12
3
5
7
9
11
Z143
+24/12V+24/12V
GND
GND
3.3/5VSB
GND
PB-ADJ
T
12_M1
5VSB
GND
T
Z243
GND
BL-ADJUST
C139
0.1U
GND
12_M
L21
220R
C152 100P
C151
0.1U C150
0.1U
C105 100U
16V
GND GND GND GND
D
R752
5V_M
C556 4U7
Q4
BT3904
0R
A03401A
S
B
GND
5V_M1
Q57
D
R697
470K
C541
0.1U
D33
LL4148
G
R119
4K7
C
E
5V_M
R120
22K
R731
47K
C
PQ1CX41H2ZPQ
1
VOUT
2
VIN
3
OADJ
4
CONTROL
C147 100P
U4
LD1117S33
C155
0.1U
U20
GND2
GND1
COMP
13-PQ1CX4-1HB
C149
GND
3900P
4
4
OUT
GND/ADJ
123
GND
VB
R118
10K
VIN
C106 100U 16V
5VSB
C159
1U
12_M
C157
0.1U
8
7
6
GND
5
C148
0.01U
L16 33UH
R117
10K
C145 220P
C146
0.1U
GND
R116
D5
12K
SR23
GND
GND
Z13
GND
DV10
T
DV10
C104 470U
10V
12/24V_AUDIO
L137 200R
L138
200R
C472
470U
35V
C158
0.1U
GND
C161
0.01U
1
BS
2
IN
3 6
SWCOMP
4
GND
GND
U14
MP1593DN
GND
R123
12K4
GND
C87 470U 16V
GND
L1
15UH
R121 110K
D4
SR34
R122
C156
5K6
8
SS
7
EN
5
FB
C160 8200P
C162 100P
0.1U
GND
GND
GND
5VSB
R96
GND
C
E
10K
Q6
BT3904
B
R97 10K
R98 10K
5V_DDR
+3V3+3V3
Z14
T
C154
0.1U
C102
100U
16V
R143
10K
BT3904
Q10
R144
10K
SW
C
E
GND
NC
POWERON/OFF
B
R710
10K
SHORT_PROTECT
GND
Z244
T
C524
D7
LL4148
10U
C5
1000P
GND
NC
12_M
R134
R102
100K
47K
Q7
BT3904
R101
C
10K
B
E
12_M
R100
8K2 R99 680R
D10
GND
LL4148
R137
3K9
R132 1K8
GND
GND
R698
R3
NC
0R
C129
NC
0.1U
NC
D34
LL4148
NC
1
S2
2
G2
3
S1
4
G1
Q2
A04803
NC
8
D2A
7
D2B
6
D1A
5
D1B
C170
5V_OUTSIDE
C127
12_M
1U
NC
C126
0.1U NC
1U
NC
GND
GND
C128
0.1U NC
C140
0.1U
C142
+3V3
GND
0.1U
3
2
OUT
VIN
4
4
U5
LD1117S12
R9
120R
1
GND/ADJ
GND
C3
10U
T
Z12
AV12AV12
5V_M
R5
R4
2R7
2R7
S-NC
S-NC
R107 910R
S-200
GND
R108
820R
S-120
5V_DDR
C103 100U
R10 2R7
S-0
B
C133
0.22U
U3
LD1117S
R138
4K7
470K
NC
4
4
DDRV
Z9
OUT
VIN
GND/ADJ
123
C93 47U
C134
6V3
0.1U
C141
0.1U
16V
GND
L14
220R
C94 47U
T
C345
6V3
0.1U
GND
5VSB
12_M1
R139
22K
SW
NC
A
4678
3 21
18520_500_090312.eps
A
090312
2009-Jun-05
Page 48

SSB: MT822x Processor

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 48TCM3.1L LA 10.
GND
U0RX
R466
C174
+3V3
C13 10U
R465
100R
U0TX
1K
NC
1K
GND
GND
GND
33P
AV33_DAC
DDRV
GND
R311
AV33_DAC
C42 4U7
C399
0.1U
L26
220R
C352
0.1U
C88
470U 10V
+3V3
GND
AV33_HDMI
C10 4U7
GND
4U7
C34 4U7
AV12
GND
AV12
GND
C40
DV10
GND
+3V3
C349
0.1U
+3V3
GND
AV12
GND
GND
L44
220R
C109 100U
16V
C125
220U
6V3
C384
0.1U
DV33
C376
3300P
C385
0.1U
C124 470U
10V
C396
0.1U
C386
3300P
C402
0.1U
C379
3300P
C387
0.1U
C35 4U7
C378
0.1U
C373
0.1U
C388
0.1U
C389
4700P
AV12
C375
3300P
C390
0.1U
L42
220R
C377
0.1U
AV12_PLLAV12
L41
C110 100U
16V
4U7
C31
220R
C30 4U7
C369
0.1U
C
0.1U
370
C368
3300P
GND
C528
10U 16V
L45
220R
AV12_LVDS
C37
10U
C359
0.1U
C364
0.1U
AV12 AV12_MEMPLL
L36
220R
C24
C525
10U
10U 16V
C363
0.1U
GND
10U 16V
L38
220R
AV12_HDMI
C26 4U7
C361
0.1U
L47
220R
10U
C23
AV12_LVDS
PLL
C365
0.1U
AV12
C529
GND
C527 10U
16V
L28
220R
AV33_USB
C36 10U
C353
0.1U
4U7
C39
+3V3
L31
220R
AV33_CVBS
C16 10U
C354
0.1U
GND
AV
+3V3 +3V3
C9 4U7
L27
220R
C8 4U7
33_VGA
C350
0.1U
4U7
C19
L32
220R
C18 10U
AV33_SIF
GND GND GND
C41 4U7
L46
220R
AV33_LVDS
C11
10U
C400
0.1U
C351
0.1U
L34
220R
4U7
AV33_SIFDIG+3V3
C21
C392
C391
0.1U
4700P
AV12_PLLSYS
C371
C33
3300P
4U7
GND
C380
C381
4700P
0.1U
AV12 AV12D_RGB
L40
220R
GND
AV12 AV12_USB
C526
10U
16V
GND
AV12
220R
C29 4U7
GND
GND
+3V3
C355
0.1U
+3V3
C401
0.1U
GND
AV12
C27 4U7
L37
220R
L39
C28 10U
C20
4U7
C393
0.1U
L43
220R
C374
3300P
C25 10U
AV12A_RGBB
220R
C14 4U7
L33
220R
L35
220R
C394
0.1U
AV12_PLLADC
C32 10U
C382
0.1U
C367
0.1U
C360
0.1U
AV33_XTL+3V3
L30
C15
10U
AV33_ADC
C17 10U
AV33_ADCREF
C22 4U7
C362
0.1U
GND
C395
0.1U
C372
3300P
C383
0.1U
C366 3300P
C356
0.1U
C357
0.1U
C358
0.1U
+3V3
GND
+3V3
GND
C107 100U
16V
C108
100U
16V
F
E
D
C
B
A
B02
F
MT822x Processor
EPAD_GND
257
GPIO_11
GPIO_10
127
128
GPIO10
GPIO11
GPIO_9
GPIO_8
126
125
GPIO8
GPIO9
GPIO_7
GPIO_6
124
GPIO6
GPIO7
123
GPIO_5
122
GPIO5
GPIO_4
GPIO_3
121
GPIO3
GPIO4
120
GPIO_2
GPIO_1
118
119
GPIO1
GPIO2
DV33
GPIO_0
117
VDD33_2_1
GPIO0
DV10
O1N
O2N
O2P
O3N
O1P
O0P
O0N
112
113
114
116
110
111
115
O1P
O1N
O0P
O0N
DVDD10_3_1
DVDD10_3_2
O3P
OCKN
OCKP
E0N
O4P
O4N
106
OCKN
105
OCKP
AV12_LVDS
101
102
104
100
103
99
AVDD12_LVDS
E0N
O4P
O4N
O3P
O3N
AV33_LVDS
109
107
108
O2P
O2N
AVDD33_LVDSA
R462
100R
GND
NC
E0P
E2P
ECKP
E3P
E1P
E2N
E1N
E2N
E1P
E1N
E0P
E4N
AV33_LVDS
E3N
ECKN
E4P
LVDS_TPPIN
91
92
90
93
9495969798
E2P
AVDD33_LVDSB
ECKN
ECKP
TP
E4P
E4N
E3P
E3N
DV10
DV33
UP35
AV12_LVDSPLL
82
84
8586878889
83
AVDD12_VPLL
UP35
VDD33_1_1
DVDD10_4
UP31
UP34
UP34
INT
UP30
U0TX
U0RX
UP33
UP33
SPI_CS1#
OIRI
76
77
73
74
75
78
798081
IR_
INT0_
RXD0
TXD0
UP30
UP31
SPI_CS1
GND
DV10
DDRV
RDQ0 RDQ1
RDQ2 RDQ3 RDQ4
RDQ5 RDQ6 RDQ7
RDQS0
AV12_MEMPLL
C398
GND
MEM_VREF
RDQM0
DV10
RDQM1
RDQS1
RDQ8 RDQ9
RDQ10 RDQ11 RDQ12
RDQ13
RDQ14 RDQ15
RCLK0# RCLK0
RCKE RA12 RA11
RA9 RA8 RA7 RA6 RA5 RA4 RWE# RCAS# RRAS# RCS# RBA0 RBA1 RA10 RA0 RA1 DV10 RA2 RA3 DDRV
MEM_VREF_1
DV10 DV33 VGASDA VGASCL
C397
0.1U
R456
NC
0R
E
D
DDRV
R458 1K
R457
C
1K
GND
1000P
+3V3
L141
120R
B
116
3V3_F
C406
0.1U
2
3
4
GND
SPI_CS#
SPI_SI
5
6
7
8
USB_DM0_1
A
USB_DP0_1
USB_DM1_2
USB_DP1_2
DVDD10_2_3
129
DVDD10_2_2
130
RDQ0
131
RDQ1
132
VCC2IO_2_8
133
RDQ2
134
RDQ3
135
RDQ4
136
VCC2IO_2_7
137
RDQ5
138
RDQ6
139
RDQ7
140
VCC2IO_3
141
RDQS0
142
VCC2IO_2_6
143
RDQM0
144
DVDD10_2_1
145
RDQM1
146
VCC2IO_2_5
147
RDQS1
148
VCC2IO_2_4
149
RDQ8
150
RDQ9
151
VCC2IO_2_3
152
RDQ10
153
RDQ11
154
RDQ12
155
VCC2IO_2_2
156
RDQ13
157
RDQ14
158
RDQ15
159
AVDD12_MEMPLL_1
160
VCC2IO_1_1
161
RCLK0#
162
RCLK0
163
VCC2IO_2_1
164
RCKE
165
RA12
166
RA11
167
VCC2IO_2
168
RA9
169
RA8
170
RA7
171
RA6
172
RA5
173
RA4
174
RWE#
175
RCAS#
176
RRAS#
177
RCS#
178
RBA0
179
RBA1
180
RA10
181
RA0
182
RA1
183
DVDD10
184
RA2
185
RA3
186
VCC2IO_1
187
RVREF0
188
DVDD10_2
189
VDD33_2
190
VGA_SDA
191
VGA_SCL
192
MEM_VREF_1
U10
MX25L3205
HOLD# SCLK
VCC
22R
22R
R744 22R
R745
22R
R746
R747
PO6
PO5
PO4
PO3
GND
WP#/ACC
NC
NC
NC
PO2
PO1
PO0
CS#
SO
15
SI
14
13
12
11
10
9
USB_DM0
USB_DP0
USB_DM1_1
USB_DP1_1
USB_DM0
USB_DP0
193
USB_DM0_1
USB_DP0_1
C405
33P
NC
SPI_SCK_1
SPI_SO
194
GND
AVDD33_USB
USB_VRT
196
195
USBVRT
AV33_USB
5K1
GND
R480
1K
FRESET#
AVDD12_USB
197
AV12_USB
R463
GND
USB_DM1
USB_DP1
199
198
USB_DM1_2
USB_DP1_2
3V3_F
HDMI_CEC
DVDD10_1
PWR5V_2
201
200
202
DV10
CEC
OPWR2_5V
1%
PWM2
HDMI_SDA2
HDMI_SCL2
RX2_CB
RX2_0B
RX2_C
207
206
205
204
203
RX2_CB
RX2_0B
RX2_C
HDMIDDCSDA_2
HDMIDDCSCL_2
R472
10K
R473
10K
OSCL0
R468 100R
OSDA0
R469
R470
10K
C297
1000P
VGAHSYNC#_1
SPI_SCK_1
RX2_0
208
RX2_0
RX2_1B
209
RX2_1B
GND
RX2_1
210
RX2_1
+3V3
RX2_2B
RX2_2
212
211
RX2_2B
RX2_2
R474
10K
R467 100R
13-MT8222-ARB;13-MT8221-AMB
AVDD33_HDMI
HDMI_SDA1
HDMI_SCL1
PWR5V_1
RX1_CB
RX1_1B
RX1_0B
RX1_C
RX1_0
218
214
213
OPWR1_5V
HDMIDDCSDA_1
215
HDMIDDCSCL_1
Z24
216
AV33_HDMI
217
RX1_CB
RX1_C
T
RX1_0B
Z23
219
Z22
220
RX1_0
TT
221
RX1_1B
Z25
T
100R
C
B
Q11
E
BT3904
GND
R733
1K
VGAVSYNC#VGAVSYNC#_1
R734
1K
VGAHSYNC#
R739
47R
MT8222
RX1_2B
RX1_2
RX1_1
222
223
224
RX1_2
RX1_2B
RX1_1
8
VCC
7
WC
6
SCL
5
SDA
IIC ADRESS "A0"
SPI_SCK
U11
HDMI_SDA0
HDMI_SCL0
PWR5V_0
227
226
225
OPWR0_5V
HDMIDDCSDA_0
HDMIDDCSCL_0
U21
M24C32MN
RX0_CB
RX0_C
229
228
RX0_C
RX0_CB
RX0_0B
RX0_0
230
RX0_0
RX0_0B
E0/NC
E1/NC
E2/NC
RX0_1B
231
RX0_1B
VSS
232
RX0_1
233
RX0_1
1
2
3
4
RX0_2B
RX0_2
234
RX0_2B
RX0_2
AVDD12_HDMI_3
VSYNC
237
235
236
AV12_HDMI
VGAVSYNC#_1
+3V3
GND
HSYNC
BP
239
238
BLUP
VGAHSYNC#_1
C404
0.1U
Z18
T
RESET
ORESET#
Z136
AVDD33_VGA
COM1
SOY1
PB1P
COM
SOG
Y1P
GP
RP
247
244
243
248
246
245
242
241
240
GRNP
VGAGND
VGASOG
REDP
Y1P
PB1P
SOY1
AV33_VGA
YPBPR1_GND
CVBS0P_1
CVBS0N_1
C171
1U
R397
10K
T
C507
0.1U
GND
GND
SPI_SCK
SPI_SCK
PR1P
PR1P
SPI_SI
72
SPI_SI
SOY0
249
250
SOY0
S#
ICE
SPI_C
ORESET#
SPI_SO
67
68
697071
SPI_SO
ICE
PRST#
SPI_CS0
AVDD33_REFP_AADC
COM0
PR0P
PB0P
Y0P
252
254
253
251
PB0P
PR0P
Y0P
YPBPR0_GND
GND
R464
10K
GND
PWM2
PWM3
66
65
PWM2
PWM3
PWM1 PWM0
SPDIF_OUT
RXD1 HW_SCL HW_SDA
GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20
I2S_ADIN
I2S_AOSDATA0
I2S_AOBCLK I2S_AOLRCK I2S_AOMCLK
VDD33_1
DVDD10_3
AVICM2
AVDD33_ADAC
AIN_R
AIN_L
AVDD33_AADC
AVDD12_APLL AVDD12_SYSPLL AVDD12_ADCPLL
AVDD12_PSPLL
AVDD12_DMPLL
XTALI
XTALO
AVDD33_XTAL
ADIN5 ADIN4 ADIN3 ADIN2 ADIN1 ADIN0
AVDD33_DIG
MPX1 MPX2_N MPX2_P
AVDD33_SIF
AVDD33_CVBS CVBS_BYPASS1 CVBS_BYPASS0
CVBS0N CVBS0P CVBS1P CVBS2P CVBS3P
CVBS_SY0
CVBS_SC0
CVBS_SY1
CVBS_SC1
AVDD12_DIG_RGB
AVDD12_RGB
256
255
AV12D_RGB
AV12A_RGBB
C347
0.047U
C346
0.047U
NC
TXD1
VMID
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45
AR1
44
AL1
43 42
AR2
41
AL2
40
AR3
39
AL3
38 37 36 35 34 33 32 31 30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7 6 5 4
3
2 1
Z27
R482
NC
10K
R481
NC
10K
P10
4
3
2
1
T
Z100
PWM1
PWM0 SPDIFOUT U1TX U1RX OSCL0 OSDA0 GPIO_25 GPIO_24 GPIO_23 GPIO_22 GPIO_21 GPIO_20
AOSDATA0 AOBCK AOLRCK
AOMCLK
DV33 DV10 AR0 AL0
AR2
AL2 AR3 AL3
AV33_DAC AV33_ADCREF AUD_R AUD_L AUD_VMID AV33_ADC
AV12_PLLSYS AV12_PLLADC
AV12_PLL XTALI XTALO AV33_XTL ADIN5 ADIN4_1
ADIN3_1
ADIN2
ADIN1 ADIN0
AV33_SIFDIG MPX1 MPX2_N MPX2_P AV33_SIF
AV33_CVBS CVBS_BYPASS
CVBS_TP CVBS0P_1 CVBS0N_1 CVBS1 CVBS2 CVBS3 CVBS4 CVBS5 CVBS6 CVBS7
GND
+3V3
C403
1U
VSCL_T
T
Z101
VSDA_R
T
Z102
C565
C566
10P
10P
GNDGND
R286
100R
+3V3
T
Z16
T
Z17
C348
GND
NC
1U
NC
C38 4U7
GND
R459
0R
R145
820K
XTALI XTALO
X4
C173
27M
33P
GND
CVBS0P
CVBS0N
T
C12 4U7
+3V3
L29
220R
GND GND
2009-Jun-05
4678
3 21
18520_501_090312.eps
090312
Page 49

SSB: DDR SD-RAM

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 49TCM3.1L LA 10.
B03
F
E
D
C
B
DDR SD-RAM
MEM_ADDR0 MEM_ADDR1 MEM_ADDR2
MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9
MEM_ADDR10 MEM_ADDR11
MEM_CLK0
MEM_CLKEN
MEM_CS#
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_DQM0 MEM_DQM1
MEM_BA0
MEM_BA1
MEM_VREF
DDRV
(DDR SD-RAM with termination)
U18
M12L64164A
C114
47U 6V3
C430
0.1U
GND
DDRV
GND
23 24 25 26 29
30 31 32 33 34
22
35
38
19 18 17 16
15 39
20 21
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11
CLK
CS RAS CAS WE
LDQM UDQM
A13 A12
SDRAM ADD
1
VIN
2
GND
3 6
REFEN VCNTL
4
VOUT
SDRAM NC
U1
RT9199
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD VDD1 VDD2
VDDQ VDDQ1 VDDQ2 VDDQ3
VSS1 VSS2
VSSQ VSSQ1 VSSQ2 VSSQ3
NC3
NC2
NC1
2
MEM_DQ0
DQ0
4
MEM_DQ1
DQ1
5
MEM_DQ2
DQ2
7
MEM_DQ3
DQ3
8
MEM_DQ4
DQ4
10
MEM_DQ5
DQ5
11
MEM_DQ6
DQ6
13
MEM_DQ7
DQ7
42
MEM_DQ8
DQ8
44
MEM_DQ9
DQ9
45
MEM_DQ10
47
MEM_DQ11
48
MEM_DQ12
50
MEM_DQ13
51
MEM_DQ14
53
MEM_DQ15
3637
NC1CKE
40
NC2
1 14 27
3
9 43 49
54
VSS
28 41 52 6 12 46
DDRV
GND
+3V3
C80
GND
4U7
C47
47U 6V3
R719
NC
0R
8
R721
7
NC
0R
5
R720
NC
0R
GND
VTT
C111
47U 6V3
MEM_VREF
MEM_VREF
MEM_ADDR0 MEM_ADDR1 MEM_ADDR2
MEM_ADDR3 MEM_ADDR4 MEM_ADDR5 MEM_ADDR6 MEM_ADDR7 MEM_ADDR8 MEM_ADDR9
MEM_ADDR10 MEM_ADDR11
MEM_CLK0 MEM_CLK0# MEM_CLKEN
MEM_CS#
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_DQS0 MEM_DQS1
MEM_DQM0 MEM_DQM1
MEM_BA0
MEM_BA1
C415
0.1U
VTT
49
VREF
29
A0
30
A1
31
A2
32
A3
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
28
A10/AP
41
A11
45
CK
46
CK
44
CKE
24
CS
23
RAS
22
CAS
21
WE
16
LDQS
51
UDQS
20
LDM
47
UDM
26
BA0
27
BA1
HY5DU281622FT
L80
220R
SDRAM ADD
C412
1000P
U33
MEM_VREF
VDDQ1 VDDQ2 VDDQ3 VDDQ4
VSSQ1 VSSQ2
VSSQ3 VSSQ4
C413
0.1U
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD1 VDD2
VDDQ
VSS2 VSS1
VSSQ
VTT
F
R671 150R
C420
C113 100U
16V
C46 4U7
C44 4U7
0.1U
C421
3300P
C429
0.1U
C428
3300P
C422
0.1U
C423
3300P
GND
GND
GND
GND
GND
2
MEM_DQ0
DQ0
4
MEM_DQ1
DQ1
5
MEM_DQ2
DQ2
7
MEM_DQ3
DQ3
8
MEM_DQ4
DQ4
10
MEM_DQ5
DQ5
11
MEM_DQ6
DQ6
13
MEM_DQ7
DQ7
54
MEM_DQ8
DQ8
56
MEM_DQ9
DQ9
57
MEM_DQ10
59
MEM_DQ11
60
MEM_DQ12
62
MEM_DQ13
63
MEM_DQ14
65
MEM_DQ15
14
NC
17
NC1
19
NC2
25
NC3
MEM_ADDR12
42
NC7
43
NC4
50
NC5
53
NC6
1
VDD
18
33 3
9 15 55 61
34
VSS
48 66 6 12 52 58 64
DDRV
GND
GND
C425
0.1U
GND
C575 10U NC
DDRV
GND
R487
1K
SDRAM 75R
R499
1K
SDRAM 75R
MEM_CLK0
R483
100R
SDEAM NC
MEM_CLK0#
MEM_CLKEN
R484
22R
R485
22R
SDRAM NC
R486
22R
RCLK0
RCLK0#
RCKE
C424
3300P
C426
0.1U
GND
GND
GND
C427
C45
3300P
4U7
54
72
8
54
72
8
R497 150R R496 150R R491 150R R495 150R R498 150R R492 150R
54
72
8
54
72
8
54
72
8
54
72
8
8
72
54
8
72
54
54
72
R669
150R
R662 150R
R665 150R
R661 150R
R660 150R
R664 150R
R663 150R
R670 150R
8
36
1
MEM_DQ4
MEM_DQ5
36
MEM_DQ6
MEM_DQ7
1
MEM_DQS0 MEM_DQM0 MEM_DQM1 MEM_DQS1 MEM_DQ0 MEM_DQ8
MEM_DQ9
MEM_DQ10
36
MEM_DQ11
MEM_DQ12
1
MEM_DQ13
36
MEM_DQ14
MEM_DQ15
1
MEM_WE#
MEM_CAS#
36
MEM_RAS#
1
MEM_CS#
MEM_BA0
36
MEM_BA1
MEM_ADDR10
1
1
MEM_ADDR7
MEM_ADDR6
36
MEM_ADDR5
MEM_ADDR4
1
MEM_ADDR12
MEM_ADDR11
36
MEM_ADDR9
MEM_ADDR8
MEM_ADDR0
MEM_ADDR1
36
MEM_ADDR2
MEM_ADDR3
1
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
R668
22R
54
72
8
R654
54
72
8
RDQS0 RDQM0 RDQM1 RDQS1
R667
22R
54
72
8
R666
22R
54
72
8
R655
22R
54
72
8
R656
22R
54
72
8
R657
22R
54
72
8
R658
22R
54
72
8
R659
22R
54
72
8
36
1
22R
36
1
R493 R490 R48922R R488 22R
36
1
36
1
36
1
36
1
36
1
36
1
36
1
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
RWE#
RCAS#
RRAS#
RCS#
RBA0
RBA1
RA10
RA7
RA6
RA5
RA4
RA12
RA11
RA9
RA8
RA0
RA1
RA2
RA3
22R 22R
E
D
C
B
GND
C89
470U
10V
C112 100U
16V
C43
4U7
C414
0.1U
C417
0.1U
C416
0.1U
C418
0.1U
C419 3300P
C408 3300P
C409 3300P
C410 3300P
C411
0.1U
GND
A
4678
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A
090312
2009-Jun-05
Page 50

SSB: Tuner

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 50TCM3.1L LA 10.
B04
F
TUNER
Z1
Z2
F
5VOUT5VOUT
C
R162 220R
B
E
R160
R161
12K
C
Q15
BC846B
R507 330R
22K
TV-RF-AGC
E
C194
47P
5VOUT
C182
0.01U
TV-CVBS
Q13
BC857C
GND
GND
5VOUT
C189
0.01U
GND
C208
0.01U
GND
L50
1000UR
C117 100U
16V
R190
75R
LATAM NC AP-ADD
C199
0.01U
Z32
R191
100R
R157
100R
C181
47P
C62
0.01U
C61
0.01U
TV1-V
TV_AUDIO
Z31
TT
SCL_TV
SDA_TV
MPX2_P
MPX2_N
5V-IF
MPX2
E
D
C
B
APLS EU
AS
SCL
AGC
NC1
SDA
1
234
6
5
GND
E
12_M
D
RF-AGC
C
C175
0.1U
R48 22R
C118
47U
6V3
LD1117S50
2W
C116 100U
16V
GND
5V-IF
U6
12_IF
R150
C213
Z160
C49 10U
C212
1U
0.1U
GND
5V-IF
T
C193
0.1U
L48
1000UR
GND
C198
0.1U
33V
D2 33V
R178
47K
D28
0BAV99
2
1
L52
1000UR
C211
0.1U
GND
4
4
GND/ADJ
OUT
VIN
1
3
2
C176
0.1U GND
12K
TV-RF-AGC
D14
LL4148
C115
47U 6V3
MB1
C214
3300P
BT
NC4
MB2
7
8
IF-OUT
NC3
9
11
C179
47P
10
C206
0.01U
GND
R184
22K
R154 100R
R155 100R
C180
47P
SDA_TV
SCL_TV
C202
0.1U
L51 1UH
NC
Z39
R180
T
T
Z38
GND
33R
L62
0R
5V-IF
C183
4700P
L55
1000UH
R179
L54
1000UH
100K
C197
C192
3
0.1U
200P
C184 270P
GND
Q14 BC846B
C
B
E
GND
Far from signal
5V-IF
R510
100R
+3V3
GND
R175
L49
C195
220P
C119
47U
6V3
2.2UH
C196
220P
TV1-V
4K7
C207
0.1U
TV_AUDIO
R177
4K7
SDA_TV
SCL_TV
B
12-UM6K1N-0BX
UM6K1N
U30
OSCL0
C434
33P
R176
3
6
4K7
5
2
GND GND
41
C433
33P
R511
100R
OSDA0
GND
R512
39K
C439
22P
R171
82R
CVBS0N
5VOUT
R513
R503
10R
CVBS0P
C120
47U
39K
C435
22P
6V3
GND
AGC
1
GND
Z33
R189
0R
NC
C432 1000P
D17
BA277
Q16
C124ET
AS
3
RF-AGC
MPX1
SCL
4
T T
C431
1000P
GND
5
Z34
2
L61
0.56UH
C
E
TCL AP
SDANCBP
679
Z35
T
Z36
5VOUT
C438
0.01U
R181
GND
R152
GND
B
GND
TV-CVBS
OP2
T
2K2
2K2
C205
0.01U
BT
C440 1000P
IF
11
R174
4K7
R185
1K
R192
150R L-ADD
5VOUT
R500
4K7
L-ADD
NC
R186
R167
4K7
R756
0R
NC
R755
GND
0R
NC
Z37
T
D6
BA277
BA277
D15
R727
0R
NC
R170
0R
NC
GND
2K2
R187
5K6
R151
0R
NC
R182
GND
X7
0R
NC
R166
4K7
Q12
BT3904
NC
R168
C
B
E
R169
10K
NC
GND
GND
312 45
IN
GND
IN/GND
SAW-D9453D
L-45-SAW937-0M0
X2
SAW-3953D/K7270M
IN
GND
IN/GND
GND
R153
4K7
D16
BA277
10K
NC
C201
0.01U NC
OUT1
OUT2
U2
OUT1
OUT2
54321
L-45-SAWM39-530
R188 5K6
OP2
C187
1500P
R158 330R
C177
0.22U
22
21
23
24
OP2
SIF1
SIF2
VIF2
VIF1
OP1
4
1
2
3
C178
0.01U
C209
0.01U
20
AFC
FMPLL
567
VP
DEEM
C210
390P
19
VPLL
AFD
R172 10K
GND
9885 NC
18
AGND
DGND
C185
0.47U
C188
17
8
0.47U
AUD CVBS
CVBS
16
VAGC
TOP
9
X3
4M
15
14
REF
TAGC
SDA
SCL
101112
C191 1000P
NC
1000P
C204
20P
C190
NC
C186
0.1U
13
R159
R165 470R
NC
SIOMAD
TDA9885T
R173
12K
22K
GND
R156 100K
R163
GND
2K2
GND
5VOUT
R509
C203
22K
L-ADD
R516
10K
L-ADD
4M5
5VOUT
L63
12UH
L-ADD
R193
X1
B
GND
150R
3
1
L-ADD
R195
1K
2
L-ADD
C
Q18
E
BC846B L-NC
R196
0R
L-ADD
GND
R501 0R
L-ADD(NC)
L-ADD
Q17
BC846B
C215
0.1U
L-ADD
C
B
GND
E
R514
100R
L-ADD
R515
220R
L-ADD
GND
TV1-V
0.1U
GND
GND
R518
22K
MPX2
GND
R383
0R
B
NC
GND
J1
NC
0R
J2
NC
0R
J3
NC
0R
J4
NC
0R
A
4678
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2009-Jun-05
Page 51

SSB: HDMI

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 51TCM3.1L LA 10.
B05
F
E
D
C
B
HDMI
RX2+
RX2-
GND2
RX0+
RX0-
GND4
NC1
DDCCLK
GND5
HPD
RX2+
RX2-
GND2
RX0+
RX0-
GND4
NC1
DDCCLK
GND5
HPD
P16
GND1
RX1+
RX1-
GND3
RXC+
RXC-
NC2
DDCDA
VCC
P14
GND1
RX1+
RX1-
GND3
RXC+
RXC-
NC2
DDCDA
VCC
NC20
NC21
P5
MNT-HOLE2
5V_M
MNT-HOLE1
RX2_2
1
2
RX2_2B
3
RX2_1
4
5
RX2_1B
6
RX2_0
7
8
RX2_0B
9
RX2_C
10
11
RX2_CB
12
13
14
15
16
17
18
19
20
21
GND
R112 100R
Q5
2N7002
CEC1CEC
GND
RX0_2
1
2
RX0_2B
3
RX0_1
4
5
RX0_1B
6
RX0_0
7
8
RX0_0B
9
RX0_C
10
11
RX0_CB
12
21
13
14
T
15
Z103
GND
R52
R540 100R
RX0_2
RX0_2B
RX0_1
RX0_1B
HDMI_CEC_3V3
16
17
18
19
HDMICAB0
R542 100K
T
Z104
R561 1K
GND
R57
R562
10K
21
R53
GND
GND
RX1_2
1
2
RX1_2B
3
RX1_1
4
5
RX1_1B
6
RX1_0
7
8
RX1_0B
9
RX1_C
10
21
GND
R56
RX1_2
RX1_2B
RX1_1
RX1_1B
11
RX1_CB
12
13
14
15
R529 100R
T
Z105
HDMI_CEC_3V3
16
17
18
R532
1K
19
20
21
GND
GND
R531 100K
T
Z106
1
R87
R520
2
10K
R58
GND
GND
1
2
21
R563 100R
R521 100R
GND
R45
21
R35
R36
R34
21
21
21
RX0_0
RX0_0B
RX0_C
RX0_CB
GND
R541
10K
GND
OPWR0_5V
HDMISCL_0
HDMISDA_0
HDMISCL_0
HDMISDA_0
Q20
GND
BT3904
GND
R564 100R
R538
47K
R54
21
R25
21
R28
21
R29
21
R44
21
C
E
R530
B
10K
C298
1000P
RX1_0
RX1_0B
RX1_C
RX1_CB
OPWR1_5V
R148
1K
47K
Z43
T
Z42
Z46
Z44
GND
HDMISCL_1 HDMISDA_1
HDMISCL_1
HDMISDA_1
Q19
GND
BT3904
C
B
C337
E
1000P
R527
47K
R528
47K
Z40
Z52
Z54
Z53
GND
R526
1
100R
R59
2
R539
R149
1K
T
R31
21
R33
21
R30
21
R32
21
GND
100R
R537
100RR536
C444
10P
GND
U22
AT24C02
R27
R23
R24
R26
GND
1
A0
2
A1
3
A2
4
GND
21
21
21
21
100R
R525
8
T
VCC
7
WP
6
SCL
5
SDA
T
T
100RR524
C449
10P
U24
AT24C02
GND
1
A0
2
A1
3
A2
4
GND
8
T
VCC
7
WP
6
SCL
5
SDA
T
T
GND
C443
0.1U
Z45
T
Z41
T
C441
0.1U
UP33
HDMIDDCSCL_0 HDMIDDCSDA_0
C445
10P
HDMIDDCSCL_1 HDMIDDCSDA_1
UP30
C442
10P
DDCCLK
+3V3
RX2+
RX2-
GND2
RX0+
RX0-
GND4
NC1
GND5
HPD
R113
33K
P13
GND1
RX1+
RX1-
GND3
RXC+
RXC-
NC2
DDCDA
VCC
NC20
NC21
DPOS-1
DNEG-1
VCC-1
GND-1
GND
GND
R558 100K
R47
6
5
GND
4
3
2
1
2
1
GND
GND
R51
21
R556 100R
T
Z107
T
Z108
R94
R22
GND
2
1
RX2_2
RX2_2B
RX2_1
RX2_1B
21
USB_DP0
USB_DM0
F1
F2
HDMI_CEC_3V3
R559
1K
R544 10K
R55
R545 100R
1
2
C91
100U
16V
GND
C217
1
2
0.1U
R50
R46
R42
R43
R41
120R
C90
47U
6V3
+3V3
21
21
21
21
HDMISCL_2
BT3904
R550 100R
L65
R200 100K
R713 10K
R557
HDMISDA_2
Q21
C
E
GND
R551
47K
C219
0.1U
GND
10K
OPWR2_5V
GND
B
C452
1000P
RX2_0
RX2_0B
RX2_C
RX2_CB
HDMISCL_2 HDMISDA_2
1000P
R552
47K
Z47
C469
1K
R254
Z51
R198 100R
GND
Z48
T
Z49
L64
120R
NC
TPS2550
6
OUT
5
ILIMENGND
4
FAULT
13-TPS255-0DB
PWM3
8
T
VCC
7
WP
6
SCL
5
SDA
T
T
U12
GND
R38
R40
R37
U23
AT24C02
IN
R202
R39
GND
1
2
3
R197
0R
NC
24K
GND
21
21
21
21
R549 100R
100RR548
C447
10P
1
A0
2
A1
3
A2
4
GND
+3V3
GND
GND
Z50
T
5V_M
R201 10K
C446
0.1U
R199 100R
C218
0.1U
HDMIDDCSCL_2
HDMIDDCSDA_2
UP35
C448
10P
PWM1
F
E
D
C
GND GND
R566 100R
+3V3SB
R565 33K
HDMI_CEC_3V3
RX0_2
P11
19
RX0_2B
17
RX0_1
15
RX0_1B
13
GND
11
RX0_0
9
RX0_0B
7
GND
5
RX0_C
3
12
RX0_CB
20
18
16
14
12
10
8
6
4
OSCL0
OSDA0
GND
HDMICAB0
OPWR0_5V
HDMI_CEC_3V3
HDMISCL_0
HDMISDA_0
GND
+3V3
B
NC
GNDGND
A
A
2009-Jun-05
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Page 52
Circuit Diagrams and PWB Layouts

SSB: I/O - VGA, USB, S-Video

8 76554 3 21
EN 52TCM3.1L LA 10.
B06
F
E
D
C
B
I/O - VGA, USB, S-video
BLUE
GREEN
RED
VGAHSYNC#
VGAVSYNC#
R567 2K2
GND
C225
C223
4700P
C226
0.01U
C70 2U2
C71 2U2
C229
0.01U
0.01U
REDP
VGAGND
BLUP
VGASOG
GRNP
AV1R_IN
AV1L_IN
R231
C224
0.01U
75R
R577 560R
R578 560R
R222
R221
R571
2K2
8K2
8K2
R217
GND
R64
R62
R63
1
NC
NC
21
2
L71
120R
0
L69
120R
0
L70
120R
0
R229
75R
R230
75R
GND
R225
0R
R227
68R
22K
R226
68R
R228
68R
GND
GND
GND
GND
C221
10P
C228
10P
GND
L72
120R
L66
120R
C227
10P
BLUE
GREEN
AV1_R
AV1_L
R218
22K
RED
F7F8
R68
21
NC
GND
YPBPR2_R
YPBPR2_L
NC
1
2
1
R61
NC
2
YPBPR1_R
YPBPR1_L
AV2R_IN
AV2L_IN
F3
L133
120R
L131
120R
C548 470P
BAV70
F4
12
D32
R572
5V_M5V_M
GNDGND
C66 2U2
C63 2U2
C68
2U2
R223
C69
8K2
2U2
F5F6
GND
3
100R
470P
R214
R213
R224
8K2
21
C550
8K2
8K2
R67
2U2
NC
C55
C57 2U2
R211
R219
22K
22K
F10
R210
8K2
R209
8K2
F9
100R
C230
0.1U
VSYNC0
VGA5V_EXT0
BLUE0
HSYNC0
GREEN0
RED0
R66
R65
R568
R207
R575
100R
R574 100R
VGASCL0_IN
VGASDA0_IN
NC
Z65
GND
VGASDA0 VGASCL0
22K
Y1_R
Y1_L
GNDGND
AV2_R
AV2_L
R220
GNDGND
NC
21
21
GND
T
R212
22K
22K
VGASCL
VGASDA
Z75
Z74
VGA_PLUGPWR0
U25
AT24C02
1
A0
VCC
2
A1
WP
3
A2
SCL
4
GND
SDA
Y2_R
Y2_L
R208
22K
GNDGND
T
Z73
8
7
6
5
T
Z72
T
T
Z71
Z70
VGAROMWP0
T
T
T
Z69
Z68
Z64
T
T
T
Z62
Z63
RXD0_EXT
TXD0_EXT
T
T
T
Z67
T
Z66
R570
10K
Z61
VGAVSYNC#
VGAHSYNC#
GND
GND
USB_DP1
USB_DM1
VCC_1
R576
10K
16
5
15
10
4
14
9
3
13
8
2
12
7
1
11
6
17
R569
22K
P6
47-VGA019-XX0
C222
10P
GND
C234
10P
GND
P39
1
2
3
4
NC
R321
10K
CVBS6
CVBS7
NC
C231
0.047U
NC-13-RT9701-PBB
5
4 3
5
4 3
NC-13-RT9701-PBB
C220
0.047U
R232
100R
U34
RT9701
VOUT2
VOUT1
GND
CE VIN
VOUT2
VOUT1
GND
CE VIN
U35
RT9701
USB_DP1_1
HPOUTL1
USB_DM1_1
HPOUTR1
R216
100R
C232
47P
1
2
1
2
100R
GND
GND
NC
NC
NC
R326 100R
R725 100R
R505
R726 100R
NC
R307
0R
VGA_L
VGA_R
R204
22K
C233
NC
C2 47U 16V NC
R305
NC
0R
USB_DP1
USB_DM1
47P
GND
5V_M5V_M
C200
0.1U NC
C279
GND
0.1U
NC
GNDGND
VSCL_T
VSDA_R
R233
75R
L68 120R
L67
22K
R203
GND
R215
75R
C329
R206
8K2
8K2
R312
100R
220U
16V
NC
R205
R319 100R
120R
C50 47U 16V
F
GND
P12
10
NC
2
4
6
8
GND
12
8
4 7
3
6 2 5 1
9 11
VCC_1
USB_DM1
USB_DP1
GND
E
Z19
Z20
TT
Z21
T T
Z26
NC
C291
0.1U
NC
USB_DP1
USB_DM1
21
R49
NC
R304 NC
VCC_0
T
Z3
USB_DM0
Z6
T
USB_DP0
T
Z10
GND
T
Z11
USB_DP0
USB_DM0
VCC_0 VCC_1
F13
F14
12
GND
P36
1
3
5
7
NC
D
Z57
T
L123 120R
Z56
T
L124 120R
T
Z55
TXD0_EXT
RXD0_EXT
21
F39
GND
12
F12
R60
GND
GND
Z59
Z58
GND
T
T
T
Z60
P7
2
3
1 47-MIC012-XX0
6
2
5
7
1
3
4
C
P9
B
C58
2U2
C551
470P
F11
R147
SY1_IN
SC1_IN
C56 2U2
GND
GND
C544
470P
GND
R194
2
F38
1
1
R69
2
A
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Page 53
Circuit Diagrams and PWB Layouts

SSB: Digital Analog Converter, DAC

8 76554 3 21
EN 53TCM3.1L LA 10.
B07
F
E
D
C
B
A
Digital Analog Converter, DAC
Z155
Z154
P1
11
SHIELD
1
12
2
13
3
14
4
15
5
16
6
17
7
18
8
19
9
20
10
21
SCT1_AV_IN
F18
12 11
10
9
8
7
6
5
4
3
2
1
SCT1_AV_IN
SCT1_AV_OUT
SCT1_FB_IN
PR1/R_IN
Y1/G_IN
SCT1_FS_IN
PB1/B_IN
YPBPR2_L
SCT1_AUL_OUT
YPBPR2_R
SCT1_AUR_OUT
T
Z148
Z149
GND
VIN
VOUT
BLNKGND
VGND
BLNK
R
DATAGND
RGND
DATA
G
CLKOUT
GGND
SWITCH
B
AIL
BGND
AGND
AOL
AIR
AOR
NC 47-SCA014-XX0G
P19
GREEN
BLUE
RED
WHITE
RED
Z156
TTT
Z152
T T
Z153
Z151
T
Z144
T T T
Z146
Z145
GND
T
T
Z150
L76
120R
NC
21
C247
22P
NC
R71
NC
GND
GND
2
GND
R76 NC
T
Z82
Z79
R350
NC
1
T
Z81
T
Z80
T
Z163
T
Z188
0R
NC
T
Z147
R77
L136 120R
T
2
NC
1
L134
120R
R78
C546 470P
R255
10R
2
1
NC
R258
F19
75R
NC
F20
YPBPR1_L
YPBPR1_R
GNDGND
C553 470P
GND
F21
GREEN
5V_M
C249
RED
WHITE
RED
BLUE
R257 100R
47P NC
120R
NC
NC
L81
C243
NC
R506
NC
0R
ADIN3
10K
R252
NC
NC
75R
R242
R235 10K
R253 0R
NC
10K
DA_AUL
DA_AUR
R247 10K
ADIN3_1
NC
SOY1
+3V3
NC
+3V3
NC
P28
4
2
3
6
8
9
1 7
5
ADCVA
1U
GND
C248
0.047U
NC
R267
0R
R268
GND
75R
L75
120R
L74
120R
R262
75R
R261
75R
L73
120R
SCT1_FS_IN
GND
ADCVA
C244
0.1U
CVBS3
15P
C250
Z76
T
C256
NC
15P
YPBPR2_R
F17
YPBPR2_L
F15
F16
R260
0R
R264
68R
C251
15P
R263
68R
GND
1
R72
2
R265 100R
NC
+3V3
1
NC
2
R74
C245
1U NC
R266
C254 4700P
C253
0.01U
C252
0.01U
68R
R714
21
0R
NC
C255
0.01U
R73
L82
120R
NC
GND
YPBPR0_GND
C266
0.01U
PR1/R_IN
PB1/B_IN
Y1/G_IN
DACVL
C265
1U
NC
SOY0
PB0P
PR0P
Y0P
120R
GND
L78
R270
75R
L77
120R
L83
120R
75R
R277
R276
R271
75R
0R
GPIO_3
GPIO_6
GPIO_5
C257
15P
C264
15P
TV-CVBS
R272
C258
15P
R238
47K
68R
R273
R269
NC
68R
0R
R274 100R
+3V3
C130
33P NC
39 33R
R2
R240 33R
R234 33R
C236
0.1U NC
GND
C259
0.01U
C260
0.01U
4700P
R275 68R
R743
UP31
C261
1K
NC
NC
NC
NC
C262
0.01U
C136
5V_M
R740
1K
33P
NC
NC
C237 1U NC
R279
1K
NC
C470
1000P
NC
GND
C263
0.01U
YPBPR1_GND
R236 10K
NC
C138 33P
NC
C235
0.1U NC
C52
1U
NC
C436
47U 6V3
NC
GND
R278
NC
C238
0.1U
BT3904
NC
NC
SCT1_FB_IN
F23
R241
33R
NC
NC
ADCVA
R280
R282 220R
75R
GND
NC
1
2
GND
33K
R75
NC
R70 NC
GPIO_2
DACVL
R243 10K
NC
SCT1_AV_OUT
GND
1
2
C239
1U
NC
R259
SCT1_FS_IN
MCLK
DVDD
LOUT
AVDD
NC
GND
C153
33P NC
14
13
12
11
10
9
8
R375
10K
F22
C241
1U NC
NC
C
Q26
B
E
GND
PR1P
PB1P
SOY1
Y1P
GND
U9
WM8501
1
LRCLK
2
DIN
FORMAT
3
BCLK
DEEMPH
4
ENABLE
5
VMID
DGND
6
ROUT
7
AGND
NC
C240
0.1U NC
C242
0.1U NC
GND
R376
C
15K
B
Q27
BT3904
E
GND
F
E
D
C
B
A
2009-Jun-05
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Page 54
Circuit Diagrams and PWB Layouts

SSB: I/O - Connectivity YPbPr

8 76554 3 21
EN 54TCM3.1L LA 10.
B08
F
E
D
C
B
I/O - Connectivity YPbPr
Z182
11
1
12
2
13
3
14
4
15
5
16
6
17
7
18
8
19
9
20
10
21
Z245
Z91
1
T
2
Z90
3
T
4
Z92
5
T
6
GND
6
5
Z164
T
4
3
2
1
GND
RED
WHITE
YELLOW
YELLOW
WHITE
RED
VIN
VOUT
BLNKGND
VGND
BLNK
DATAGND
DATA
CLKOUT
GGND
SWITCH
AGND
AIR
P38
P30
P2
SHIELD
R
RGND
G
B
AIL
BGND
AOL
AOR
NC
T
SCT2_AV_OUT
SCT2_R/C_IN
SCT2_FS_IN
T
T
Z246
AUR_OUT0_1
AUL_OUT0_1
SCT2_AV_OUT
Z169
T
Z170
T
AV2_IN
Z196
T
AV2L_IN_1
AV2R_IN_1
GND
F25
R86
21
NC
L87
120R
L91
120R
C549 470P
Z178
T
R753
1K
R754
1K
R325
75R
GND
AV1L_IN
AV1R_IN
GND GND
C585
2200P
NC
C281
C552
470P
F
E
D
C
B
C289 2200P
L89
2.2UH
2.2UH
GND
L90
C271
2200P
R735 100R
R736 100R
NC
R737
100R
R738 100R
NC
SCT1_AUL_OUT
C451
2200P
NC
SCT1_AUR_OUT
2200P
GND
GND
NC
NC
C450
NC
HPOUTR1
HPOUTL1
C270
2200P
GPIO_22
GPIO_24
GPIO_25
GPIO_23
4K7
C276
NC
GND
C288
2200P
Z191
Z175
T
T
Z173
T
Z177
T
C290
0.1U
R315
GND
100R
R299
R300
4K7
4K7
NC
NC
NC
C274
C277 4700P
4700P
NC
NC
R741 100R
NC
C583
2200P
NC
R742
GND
100R
NC C584 2200P
NC
GND
Z88
T
P31
10K
AUL_OUT0_1
R317
15K
GND
1
3
2
5
4
AUR_OUT0_1
C588
2200P
NC
C284
0.1U
C282
47P
BLACK
Z86
Z87
Z89
T
GND
GND
C54
1U
C437
47U
GND
6V3
R309 100R
Z85Z84
2
1
P18
NC 47-RCA276-XX0G
RED
WHITE
YELLOW
GND
L142
2.2UH NC
L143
2.2UH
NC
C586
2200P
NC
C587
2200P
NC
GND
AUR_OUT0
AUL_OUT0
Q30
BT3904
R318 220R
22P
R302
10R
C
E
B
AV1_IN
R308
75R
GND
R310
GND
T
T
SCT2_R/C_IN
2
R84
NC
1
5V_M
C283
0.047U
CVBS1
TT
21
GND
F26
AV2R_IN_1
AV2L_IN_1
F24
CVBS_BYPASS
R85
SCT2_FS_IN
NC
GND
F27
HPDET#
HPOUTL1
HPOUTR1
C286
0.1U NC
C285
33P NC
AV2L_IN_1
AV2R_IN_1
1
2
GND
GND
R83 NC
R294
33K
NC
SCT2_R/C_IN
L132
120R
L135
120R
C547
470P
1
3
5
7
R295
10K
NC
R313 100R
NC
R314
100R
NC
P35
NC
GND
GND
R519
0R
ADIN4
SPDIFOUT
470P
2
4
6
8
NC
AV2L_IN
AV2R_IN
C545
GND
L88
120R
NC
R1 0R
AV1L_IN
AV1R_IN
AV1_IN
ADIN4_1
R297
75R
AV2_IN
R316
C273
0.047U
100R
NC
C287
47P
75R
L85 120R
GND
C530
10U
16V
NC
P4
NC
C531
10U
16V
NC
NC
R296
100R
C267
47P
GND
10
1
6
2
7
3
8
4
9
5
11
R293
47K
NC
R290
47K
NC
NC
R287
AL0
AR0
NC
C272
0.047U
Z165
T
GAME_DA2
GAME_DA1
GAME_LOAD
GAME_CLK
F28
GND
GND
GND
CVBS5
6 5
CVBS4
Z172
T
C1
100U
16V
NC
Z166
T
GND
Z181
T
Z171
T
Z186
T
R81
R79
F30
F29
F31
R288
470R
R289
470R
2
2
NC
NC
1
1
21
R80 NC
GND
NC
A_MUTE
A_MUTE
NC
4
HPDET#
R579
1K
+3V3
5V_M
C278
0.1U NC
L92
120R
NC
L93
120R
NC
L94
120R
NC
L95
120R
NC
21
R82
NC
DA_AUL
R291
1K
NC
Q28
BT3904
NC
DA_AUR
R292
1K
NC
Q29
BT3904
NC
1
P27
2
3
9
8
7
GND
T
Z176
GPIO_10
R301
R298
4K7
NC
C275
4700P
4700P
NC
GND
R758
1K
C
B
B
NC
E
R759 1K
C
NC
E
A
4678
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Page 55

SSB: MUX and DEMUX

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 55TCM3.1L LA 10.
B09
F
E
D
C
B
A
MUX and DEMUX
R608
100R
AL3
C296
0.022U
R607
100R
AR3
C295
0.022U
12_M
C466
0.1U
GND
R590
22K
Y1_L VGA_L
AV2_L Y2_L
Y1_R
VGA_R
AV2_R
Y2_R
R637
10K
GPIO_1
C493
1000P
R589
22K
GND
GND
R588
R338
GND
R337
GND
22K
R587
MUX_CTLC0
R582
10K
C535
10U
16V
13K
C537
10U
16V
13K
C122 100U
16V
R586
22K
22K
MUX_CTLC1
+12V
B
GND
R585
C
E
22K
R609
1000P
R610
1000P
GND
R584
22K
MUX1-L
MUX_CTLC1
Q38
BT3904
10K
C459
10K
C458
R749 10R
C538 10U 16V
R632 100R
GND
R583
C533
R603
C539 100U
16V
R599
12_M
GND
GND
AUD_LOUT
AUD_ROUT
1K
GPIO_20
100U
16V
1K
C581
4U7
C580
4U7
R580
R602
10R
C
Q36
B
BT3904
E
R597
10R
GND
C
B
Q33
BT3904
E
GND
R336
4K7
GND
R335
4K7
HPOUTL1
HPOUTR1
GND
R396
MICOUT_L
1K
R404
MICOUT_R
1K
R418
R417
22K
22K
GNDGND
+12V
R581
10K
MUX_CTL2
10K
C494 1000P
C
Q32
B
BT3904
E
GND
GND
C67
R341
10U
1K2
AUD_L
1K2
AUD_R
C60 10U
R332
0R
GND
C536
10U 16V
12_M
R594
R593
GND
1K
R595 100K
+3V3
1K
12_M
C540 10U 16V
C492 220U
R142 100K
LL4148
MCU_M
R246
MCU_M
16V
D20
R604 10R
1K8
AUL_OUT0
AUR_OUT0
AR2
R600
15K
1000P
15K
C456
C455
1000PR333
33K
C463
100P
GND
C468
0.1U
C532
R340
AL21
AR21
GND
10U 16V
C534 10U
16V
R334
13K
R339
R617
100R
AL2
0.022U C294
R598
100R
C293
0.022U
13K
GND
U27
13-LM833
1
1OUT
2
1IN-
3
1IN+
45
GND 2IN+
LM358
C96 22U 16V
GND
D-00B
VCC
2OUT
2IN-
GND
12_MA
8
7
6
C457
0.1U
C462 100P
R616
33K
R627
33K
R628
33K
A_MUTE
GND
A_MUTE
GND
D19
LL4148
GND
R303
47K
D21 BAV70
1
C92
330U
16V
Q53
E
BT3906
B
C
OFF_MUTE
GND
2
+3V3SB
3
A_MUTE
R306 100K
GND
A_MUTE
R365
C502
0.1U
B
10K
Q100
BT3904
C
GND
R390
10K
R389 100R
Q43
BT3904
PWDN
C
B
E
GND
R141
22K
12_MA
E
B
C216
10U
C
Q101
BT3904
E
MUX1-L
AV1_L
MUX1-R
AV1_R
MICOUT_R
MICOUT_L
GND
R244
0R
GND
D100
LL4148
NC
GND
R127
4K7
R146
22K
AV1R_IN
R624
MUX_CTL2
MUX_CTL3
AV1L_IN
R140
820R
R95
820R
22K
GND
GND
+12V
GND
R620
22K
AUD_LOUT
R426 100R
C123
0.1U
R633 100R
NC
C576
C577
4U7
4U7
R348
+12V
R346
1K
C564
1000P
1K
C568 1000P
R748 0R
R347 33K
C563 120P
R384
5K1
1
1OUT
2
1IN-
3
1IN+
4
VCC-
GND
GND
C53
10U
GND
GND
R432
R435
NC
10K
GPIO_8
C574 1000P NC
GND
U16
HEF4052B
16
VDD
15
Y2A
14
Y1A
13
ZA
12
Y0A
11
Y3A
10
A0
Y0B
Y2B
Y3B
Y1B
VEE
VSSA1
1
2
3
ZB
4
5
6
E
C75
10U
7
89
U37
RC4558
VCC+
2OUT
C330
0.1U
+12V
10K
NC
B
GND
AUD_ROUT
+12V
GND
2IN-
2IN+
C
E
R387 100R
8
7
6
5
R345
GND
MUX_CTL3
Q24
BT3904
NC
C454
0.1U
C562
0.1U
120P
C572
5K1
R386
33K
R373 33K
R366 33K
GND
R606
R630
33K
C460
0.1U
33K
R629 33K
100P
12_M
GND
GND
R611
33K
C465 100P
GND
C95 22U 16V
R612
100R
U26
RC4558
C467
0.1U
VCC+
2OUT
2IN-
2IN+
8
7
C464
6
5
1
1OUT
2
1IN-
3
1IN+
4
VCC-
GND GND
12/24V_AUDIO
5V-IF+12V
C461
0.1U
+12V
C121 10U 16V
22K
R728
0R
NC
GPIO_21
R715 100R
D25
LL4148
C59 10U
R349
R385
100R
R729
10K
C495
1000P
GND
+12V
R631 100R
16
VDD
15
Y2A
14
Y1A
13
ZA
12
Y0A
11
Y3A
10
A0
U15
HEF4052B
VEE
VSSA1
Y0B
Y2B
Y3B
Y1B
1
2
MUX1-R
3
ZB
4
5
6
E
7
89
10U
C76
+12V
C453
0.1U
GND
+12V
R635
10K
MUX_CTLC0
C
Q39
B
BT3904
E
GND
GPIO_7
R638
10K
C471
1000P
F
E
D
C
B
A
GND
2009-Jun-05
4678
3 21
18520_508_090312.eps
090312
Page 56

SSB: Audio Amplifier

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 56TCM3.1L LA 10.
B10
F
E
D
C
B
Audio Amplifier
INT
5V_M
12_M
ADIN5
P25
1
2
3
4
R250 100R
C521
220U
35V
C520 220U 35V
1000P
T
C505
R732
1K
Z115
Z112
T
T
AMP_12/24V
GND
OSCL0
OSDA0
GND
R12
0R
R21
0R
R20
0R
R382
10K
Z113
Z114
T
NC/OUT_L-
OUTL+/OUT_L+
OUTL-/OUT_R+
NC/OUT_R-
C518 220U 35V
C519 220U 35V
C500 33P
C501
C499
C498
C496
33P
R372
100R
R723 100R
B
Q42 BT3904
NC
GND
NC
NC
+3V3
R380
22K
R391
4K7
GND
R371 100R
GND
B
C
E
L105
120R
R359
R358
3K3
GND
+3V3
C
GND
3K3
33P
33P
33P
LL4148
E
GND
D101
GND
C497
C473
4U7
16V
R381
4K7
Q45
BT3904
R356
3K3
33P
R357 3K3
AMP_3V3
C308
4700P
L103 120R
R353
R352
10K
680P C305
2K2
R374 470K
C314
1000P
C315
1000P
NC
C307
1000P
D27
LL4148
D26
LL4148
GND
R643 100R
R644 100R
AMP_SCL
AMP_SDA
Z109
T
R368 33R
R364 33R
R355
0R
S2
G2
3
S1
4
G1
L104 120R
1
2
C79 10U
U28
A04803
C83
0.47U
C81
0.47U
R642 100R
R641 100R
R367
100K
AMP_3V3
C86
0.22U
R363 33R
C309
0.1U
C78 10U
D2A
D2B
D1A
D1B
C310
0.1U
C304
0.1U
R369 33R
C326
0.1U
8
7
6
5
AOBCK AOLRCK AOMCLK
AOSDATA0
C3
01
1000P
GND
GND
LVDSVDD
C303
0.1U
C311
0.1U
Z116
PWDN
C302
GND
3R3
0.1U
T
3R3
L18
22UH
L19
22UH
R362
R361
R18 6R8
R19 6R8
NC
R757 100R
GND
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
C313 330P
R13 22R
R14 22R
C312
330P
STA333BW
VDD_DIG2
GND_DIG
SCL
SDA
INT_LINE
RESET
SDI
LRCKL
BICKL
XT1
PLLGND
PLL_FILTER
PLL_VDD
POWERDN
VSS_DIG
VDD_DIG
OUT4B
OUT4A
OUT1A
R354 0R
OUT1B
U17
STA335
TESTMODE
E4P_1
E3P_1
ECKP_1
E2P_1
E1P_1
E0P_1
E4N_1
E3N_1
ECKN_1
E2N_1
E1N_1
E0N_1
GND
R712
GND_SUB
VCC_REG
OUT2B
GND2
VCC2
OUT2A
OUT1B
VCC1
GND1
OUT1A
GND_REG
CONFIG
OUT3B
OUT3A
0R
NC
1
2
SA
3
4
VSS
5
6
7
8
9
10
11
12
13
14
15
VDD
16
AMP_CF
17
18
C169
C246
C327
C280
C475
C407
C336
C328
C479 10P
C478 10P
C477 10P
C476 10P
OUT2A
AMP_SA
GND
C300
0.1U
OUT2B
OUT2A
OUT1B
OUT1A
C322
0.1U R360
R351
GND
10P
10P
10P
10P
10P
10P
10P
10P
3
P2
CLICK&32"PS NC
LVDSVDD
LVDS CONNECTOR
C323
0.1U
R378
NC
0R
R379
0R
GND
C85
1U
C324
0.1U
C84
1U
C325
0.1U
NC
0R
0R
O4P_1
O3P_1
OCKP_1
O2P_1
O1P_1
O0P_1
O4N_1
O3N_1
OCKN_1
O2N_1
O1N_1
O0N_1
Z110
T
3
2
1
T
Z111
AMP_12/24V
C522
220U
35V
GND
AMP_3V3
C491 10P
C490 10P
C489 10P
C488 10P
C487 10P
C486 10P
C485 10P
C484 10P
C483 10P
C482 10P
C481 10P
C480 10P
OUTR+/SUBW+
OUTR-/SUBW-
AMP_3V3
CLICK NC
C306
1000P
CLICK NC
CLICK NC
C320
1000P
C523 220U
35V
12/24V_AUDIO
GND
C321
1000P
C569
1U NC
GNDGND
GND
C82
0.47U
CLICK NC
C570
0.1U
CLICK NC
R164
0.22R
L139 200R
L140 200R
E4P_1
E4N_1
E3P_1
E3N_1
ECKP_1
ECKN_1
E2P_1
E2N_1
E1P_1
E1N_1
E0P_1
E0N_1
CLICK NC
C318
0.1U
CLICK NC
C317
0.1U
CLICK NC
C319
C299
0.1U
0.1U
AMP_12/24V
NC
L12
33R
L10
33R
L8
33R
22UH
CLICK NC
CLICK NC
GND
CLICK NC
CLICK NC
GPIO_9
Z117
T
L13
33R
3
2
41
3
2
41
L11
33R
3
2
41
3
2
41
L9
33R
3
2
41
3
2
41
L17
OUT2A
R16 6R8
C316 330P
CLICK NC
R15
R17
22R
6R8
CLICK NC
L20
22UH
OUT2B
R696
1K
NC
C504
0.1U
GND
GND
Z130
T
Z135
E4P
E4N
E3P
E3N
ECKP
ECKN
E2P
E2N
E1P
E1N
E0P
E0N
GND
T
GND
1
3
GND
56
Z118
T
7 8
E4P_1
9
E3P_1
11 12
ECKP_1
13 14
E2P_1
15 16
E1P_1
17 18
E0P_1
19
ROT/DCR
21 22
ODSEL
23 24
VBR_EXT
25 26
O4P_1
27 28
O3P_1
29
OCKP_1
31 32
O2P_1
33 34
O1P_1
35 36
O0P_1 O0N_1
37 38
39
T
Z93
O0N_1
OFF_MUTE
2
Z187
T
4
GND
E4N_1
10
E3N_1
ECKN_1
E2N_1
E1N_1
E0N_1
20
SEL_LVDS
BIT_SEL
T
Z133
VBR_OUT
O4N_1
O3N_1
30
OCKN_1
O2N_1
O1N_1
40
P17
O4N_1
O4P_1
O3P_1
O3N_1 O3N
OCKP_1
OCKN_1
O2P_1
O2N_1
O1N_1
O0P_1
GND
T
Z128
L3
33R
3
41
3
41
L2
L5
33R
33R
3
41
3
41
L4
L7
33R
33R
3
41
3
41
L6
33R
Z132
T
2
2
2
2
2
2
Z131
R370
3K3
C573
0.1U
R377
T
R647
10K
R652 100R
OCKP
OCKN
Audio VMID control
R653 200R
AUD_VMID
R639
10K
NC
NC
C
B
Q40
BT3904
E
NC
GND
GND
10U
C77
GND
C503
0.1U
LVDSVDD
1K2
O4P
O4N
O3P
O2P
O2N
O1PO1P_1
O1N
O0P
O0N
GND
GND
+3V3
C571
1000P
F
E
D
C
B
FOR 2.1 CONFIG:
R13 --- 22R ,R354 --- 0R , C312 --- 330P; C81 --- 0.47U ,R355 --- 0R; C518/C519/C520/C521 --- 330U/16;
R356/R357/R358/R359 --- 3K3;
A
C317/C318/C319/C299/R16/R17 --- NC
A
2009-Jun-05
4678
3 21
18520_509_090312.eps
090312
Page 57

SSB: MCU Stand-by

8 76554 3 21
Circuit Diagrams and PWB Layouts
EN 57TCM3.1L LA 10.
B11
F
E
D
C
B
MCU Stand-by
Q49
BT3904
R444 1K
OIRI
R445
4K7
Z203
+3V3SB
T
C344
1U
GND
+3V3SB
PBS_SDA
PBS_SCL
+3V3SB
OIRI_IN
LED_RED
GPIO_11
KEY
ADIN1
R283
100R
+3V3SB
C
E
GND
L122 120R
R423
6K8
100R
R281
100R
R251
C542
1000P
B
L113
120R
R398
1K
R724 100R
C558
1000P
C332
0.1U
R428
10K
1000P
NC
NC
C557
OIRI_IS
C99 47U 6V3
Z200
L112
120R
L114
120R
C512
0.1U
R429 10K
NC
R434 10K
L115 120R
C560
1000P
R446 100R
IR_MCU
R450
0R
U32
RT9166-33
NC
2
GND
1
Z199
Z198
C510 10P
C509
10P
5VSB
L117 120R
L116
R91
21
GND
+3V3SB
Q47
BT3904
NC
R393
4K7
NC
3
INOUT
C331
0.1U NC
Z197
TTTT
1
2
3
4
5
GND
GND GND
C342
100P
L118 120R
L121
120R
120R
F34
GND
C333 100P
GND
C
E
P32
C343
100P
C335 100P
LED
C582
B
1000P
Z202
T
C334 100P
R392
1K
NC
C559
1000P
Z211
C98 47U
6V3
Z204
NC
Z205
Z210
OIRI_IS
R711 100R
5VSB
R449
10K
P8
47-MIC012-XX0
Z206
Z207
T
TTT
P15
1
2
Z209
T
3
GND
4
T
5
T
6
7
F100
21
R125
GND
Z216
T
ADIN2
+3V3SB
Z214
2
3
1
GND
R448
T
GND
10K
F35
R420 5K1
R443 47K
F36
C561
1000P
Z215
T
1
R93
2
1
A0
2
A1
3
A2
4
GND
R92
R285 47K
GND
U29
AT24C02
NC
VCC
WP
SCL
SDA
5VSB
R433
10K
MCU_M
SHORT_PROTECT
MODE
KEY
ADIN4
ADIN3
TXD_PBS
RXD_PBS
L111
120R
C516
10P
12
Z226Z225
Z227
Z222
E
C
Z219
P21
1
2
3
4
5
6
7
T
R704 100R
NC
Q58 BT3906 NC
P34
4
3
2
1
T
NC
P29
T
T T
T
T
Z223
5V_M
B
Z220
T
GND
P3
R410 100R
R284
1K
NC
D3
8V2
R400
10K
VGAVSYNC#
LED_RED
12_M
R399
GND
PWR_DETECT
PBS_SDA
PBS_SCL
U1RX
U1TX
+3V3SB
MODE
TXD_PBS
+3V3SB
E
Q54
BT3906
B
C
PWR_DETECT
22K
GND
+3V3SB
R415 10K
C508
0.1U
L108 120R
GND
Z234
T
R401 10K
GPIO_4
GND
C506 10P
R394
0R
R416
F37
NC
10K
R89
NC
OIRI_IN
R422
10K
OIRI_IS
RXD_PBS
CWSS
MCU_RESET
Z221
T
R705
5K6
R706
10K
0R
NC
Q59
BT3904
NC
C554 1000P
NC
GND
IR PASSTHROUGH
Z229
Z230
T
T
R90 NC
21
TO_STB
T
R88 NC
2
21
F32
1
GND
R707
10K
R718
NC
Z231
GND
Z224
NC
NC
C
B
E
3
2
1
IR LINK
2
4
5
3
1
F33
KEY
+3V3SB
GND
+3V3SB
Z218
8
7
6
5
C514
10P
R412 100R
L110 120R
PBS_SCL
PBS_SDA
R414
100R
T
T
Z217
R751 0R
R405 1K
R406
100R
TXD_PBS
RXD_PBS
GND
C338
22P
NC
NC
R402 100R
R413 100R
R403 10K
R419
10K NC
GND
C339
22P
D1
LL4148
C515
0.1U
POWERON/OFF
R421 4K7
NC
U8
P06/AN1
P05/AN2
P04/AN3
MODE
P03/AN4
P02/AN5
P01/AN6
P00/AN7/TXD11
R427
5K1
GND
+3V3SB
R438
4K7
C474
4U7 16V
GND
24
P07/AN0
P37/RXD10/RXD1
1
CWSS
MCU_RESET
MCU_RESET
25
26
27
28
29
30
31
32
R8C11
R447 100R
C513
0.1U
R424 100R
23
IVCC
CWSS
CEC1
CEC_OUT
222120
2
R430
100R
ORESET#
AVSS
P31/TZOUT/CMP11
P30/CNTR0#/CMP10
XOUT/P47
RESET
VSS
4
5
3
R440
1M
X5
16M
C340
10P
U36
MAX809
NC
RESETVCC
GND
1
GND
C72
0.1U
CEC1
VGAHSYNC#
R425 100R
CEC_IN
PC_H
19
17
18
AVCC/VREF
P33/INT3#/TCIN
P32/INT2/CNTR1/CMP12
P10/KI0#/AN8/CMPO0
P11/KI1#/AN9/CMPO1
P12/KI2#/AN10/CMPO2
P13/KI3#/AN11
P17/INT1#/CNTR0
XIN/P46
VCC
7
8
6
+3V3SB
C341
10P
23
GND
R431
100R
P45/INT0#
P14/TXD0
P15/RXD0
P16/CLK0
IR_MCU
C511
0.1U
C517
0.1U
R695
10K
R694
16
15
14
13
12
11
10
9
+3V3SB
10K
PC_V
12/24V_AUDIO
R183
+3V3SB
R716 100R
R407
100R
R409 100R
R717
100R
33K
R411 4K7
R408
100R
F
E
D
C
B
A
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Layout Small Signal Board (Top)

EN 58TCM3.1L LA 10.
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Layout Small Signal Board (Top, Part1)

EN 59TCM3.1L LA 10.
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Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Top, Part 2)

EN 60TCM3.1L LA 10.
PART 2
2009-Jun-05
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Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Bottom)

EN 61TCM3.1L LA 10.
PART 1
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PART 2
18520_557b_090313.eps
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Layout Small Signal Board (Bottom, Part1)

EN 62TCM3.1L LA 10.
PART 1
2009-Jun-05
18520_557a_090313
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Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Bottom, Part 2)

EN 63TCM3.1L LA 10.
PART 2
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Side Control Panel

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EN 64TCM3.1L LA 10.
E
F
E
D
Side Control Panel
P601
F
E
R602
22K
vol+
7
KEY
6
5
4
3
2
1
C1
0.1U
R605 9K1
R601
3K3
R606
0R
R604
1.2K
R603
5K6
vol-
menu
ch+
ch-
POWER
12 11
10
8
6
4
K1
9
7
5
3
12
D
C
+3.3V
IR_IN
GND
LED_RED
GPIO_11
ADIN1
B
A
P602
6
C
5
4
3
2
1
B
A
2009-Jun-05
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Layout Side Control Panel

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IR Panel

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Circuit Diagrams and PWB Layouts
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EN 66TCM3.1L LA 10.
IR Panel
F
IR
E
R6
100R
R9
4K7
R5
100R
C1
10U
VCC
GND
P1
5
+3.3V
4
D
IR_IN
3
GND
LED_RED
2
GPIO_11
1
R1
4K7
C3
47U
6V3
C2
10U
1K
R10
1K
R3
Q2
Q1
C
B
C
B
1K
G1
22K
R4
R7
F
E
D
C
BT3904
R11
4K7
R52
B
4K7
BT3904
A
C
Q5
B
E
E
RW
E
BT3904
13
D1
2
C
B
A
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EN 67TCM3.1L LA 10.

Layout IR Panel

ersonal Notes:
40-T8222M-IRE1XG
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090121
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