Sony MBX-165, MS90 Schematics
5
4
3
2
1
D D
20
CPU_RST#
CPU
19
PLT_RST#
18
CPU_PWRGD
PWROK
Crestline
NB
PWROK
VRMPWRGD
SLP_S4#
SLP_S3#
ICH8
SB
SLP_S5#
CK_PWRGD
PM_RSMRST#
PWRBTN#
15-1
CLK_PWRGD
VRMPWRGD
5678
C C
16
14
15
EC_CLK_EN#
11/17:
Check if it's ok to use IMVP_OK to replace
EC_CLK_EN#, it can save one inverter
IMVP6
17
IMVP_PWRGD
IMVP_OK
IMVP_VR_ON
99ms
99ms
RUN_ON2
1_8VRUN
13-1
RUN_ON1
PEX_VDD
NV_VDD
RUN_PWRGD
1_5VRUN
4
2_5VRUN
1_05VRUN
1_25VRUN
EC SW
PWRSW#
12
RUN_ON
3/5VRUN
1011
913-2 13
SUS_PWRGD_10MS
SUS_ON
DDR2_PWRGD
0_9VSUS
1_8VSUS
1_25VSUS
3/5VSUS
1_05VSUS
12
ALW_ON
ALW_PWRGD
3/5VALW
3
CK505
B B
CK_PWRGD/PD#
TI 8402's GRST#
A A
5
4
3
2
1
5
4
3
2
1
PLT_RST#
SLP_S3#
SLP_S4#
D D
SLP_S5#
IMVP_PWRGD
NB to CPU
SB to EC
SB to EC
SB to EC
EC to SB and NB
T01(Min=1RTC Max=2RTC refer 21762 T287 Page 328)
T02(Min=1RTC Max=2RTC refer 21762 T291 Page 328)
T03(Min=1RTC Max=2RTC refer 21762 T295 Page 328)
T04(Min=0ms refer 21762 T288 page 328)
BCLK, SRCCLK, PCICLK Running
IMVP_VR_ON
IMVP_OK
VRMPWRGD
EC to IMVP6
IMVP6 to EC
IMVP6 to SB
T05(Min=1ms 1ms is EC KB3910 at least response time)
T06(Min=0ms refer 21762 T288 page 328)
T07(Min=20ns refer 21762 T290 page 328)
VHCORE
C C
RUN_ON2
EC output
+1_8VRUN
EC output
RUN_ON1
T08(Min=5ms )
T09(Min=15ms )
T10(Min=10ms )
PEX_VDD/NV_VDD
RUN_ON
RUN_PWRGD
EC output
Input EC
T11(Min=10ms )
+3VRUN/ +5VRUN/ +1_5VRUN/+1_25VRUN/+1_05VRUN
SUS_PWRGD_10MS
SUS_ON
B B
DDR2_PWRGD
EC output
EC output
Input EC
T12(Min=10ms )
T13(Min=10ms )
+3VSUS/ +5VSUS/+1_8VSUS/+0.9VSUS
(S5 to G3)
DC_IN
DCBATOUT
ALW_PWRGD
PM_RSMRST#
+5VALW/ +3VALW
T14: RSMRST# falling edge must transition to 0.8V or less before VccSus3_3 drops to 2.1V (Please refer 21762 T312 page 317)
ALW_ON
+ECVCC
A A
5
PWRSW#
+ECRST#
1 - 2
RTCCLK
1 - 2
RTCCLK
Min.
0ms
1 - 2
RTCCLK
*1 RSMRST# falling edge must transition to 0.8V or less before VccSus3_3 drops to 2.1V
T04
Min.
15ms
T06T01
Min.
0ms
4
Min.
20ns
T08 T09
Min.
5ms
Min.
15ms
T10
Min.
10ms
Min.
10ms
T12T11T02 T07T03 T05
Min.
10ms
T13 T14
Min.
10ms
*1
3
2
1
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