Sony DVD 02 Schematic

S®

Digital Video Player

Training Manual

Circuit Description and Troubleshooting

Course: D VD-02

Course Description and Troubleshooting:

Model: DVP-S530D

Prepared by: National Training Department

Sony Service Company A Division of Sony Electronics Inc.

Course presented by______________________________________ Date___________________________________________________ Student Name ___________________________________________

Sony Service Company

Printed in U.S.A.

“DTS” is a trademark of Digital Theater Systems, Inc. “AC-3” is a trademark of Dolby Laboratories Licensing Corporation. “Dolby” and “Dolby Surround” are trademarks of Dolby Laboratories

Licensing Corporation. “Sony” and “Digital Cinema Sound” are trademarks of Sony . “THX” is a trademark of Lucasfilm, Ltd.

Table of Contents

Introduction to the DTS Audio Format 1

What is DTS? 2 What do I need to play the DTS surround format? 2 What do I need to play both the AC-3 and

DTS surround formats? 2 Will a 5.1 channel DTS CD play in my CD player? 2 Why won’t my older DVD player play DTS DVDs? 3 Can DVD movies contain both DTS and AC-3

audio tracks? 3 How does DTS work? 3

Board Layout 5 DVD Features 6 Block Diagram 7

Power Supply 7 Communications 7 Servo Control 7 Video and Audio Processing 9

Power Supply Block 11

Standby Power Supply 11 Main Power Supply 11 Power Consumption 11

Oscillator Frequencies 11

Standby Oscillator 13

Start 13 Run 13

Regulation Concept 13 Regulation Circuitry 13

Main Oscillator 15

Enable 15 Start 15 Run 15 Regulation 15

Power Control 17

Plug In 17

Communications Block 21

Serial Data 21 Parallel Data 21

Serial Data Communications 23

Serial Bus 0 23 Serial Bus 1 25

Parallel Data Communications 27

Communications from IC202 to Other ICs 29 Communications from a Destination IC to IC202 29

Mechanism 31

Disc Tray and Laser Platform Position 31 Tilt Motor 32 Power ON Mechanical Sequence - No Disc 34 Power ON Mechanical Sequence - DVD Disc 35

Tray Motor Drive 37

Initial Sled Motor Drive 41

Manually Driving the Tilt Motor 71

Initial Sled Movement 41 Home Position Detection 45

Laser Servo 47 KHM-220A DVD Optical Block 49

DVD Focus 49 CD Focus 49 Three Laser Beams from One Laser 50 Photo Detectors 51

Disc Identification 53

Operation 5 3 SACD Disc Type 53

Focus 55

Search 55 Servo 55 Focus Drive 57 Focus Search Communications 57

A/V Processing Block 73 A/V Processing 75 Test Mode 81

Test Mode Access 81 Tests 81 Additional Test Mode 83 Self-Diagnostic Function (Customer Error Codes) 83

Troubleshooting 85

General Problems and Troubleshooting Guide 85

Spindle Motor 61

Kick Mode 61 CLV PB Mode 63

Tracking Servo 65

Tracking Counting in Pause or Picture Jump 65

Sled Motor Drive - PB 67

Following the Track 59

Tilt Servo 69

Operation 6 9

Introduction to the DTS Audio Format

Several major consumer audio formats that exist today are listed in this table:

Audio Formats

Format (note 1)

1. Stereo 1933 2 Analog linear FM, VHS, CD, LD, etc.

2. PCM (digital version of stereo)

3. Dolby Surround

4. Dolby Prologic

5. Dolby Digital

6. DTS

7. THX



Year

Used

1982 3 Analog None VHS



1987 4 Analog None



1991 6 Digital 20 bits /

1993 6 Digital

1982 2-6 Either Theaters, DVD, LD, VHS

Chan

-nels

2 Digital 16 bits /

Class

Typical sample

sample.

sample 20 bits /

sample

Typical Data Rate

(note 2)

705kbit/sec (44.1kHz sample)

384 Kbytes/sec (44.1kHz sample) 1,411kbits/sec (44.1kHz sample)

Compression

(Approx.)

None DVD, LD

90%

75%

Test Disc Signal Source (note 3)

Prologic test CD Dolby DVD-TEST1 Dolby DVD-TEST1

DTS Test CD DTS Test DVD

VHS, theaters DVD, LD, DTV

DVD, LD, CD

Note 1 - All formats require decoders, except Stereo and THX. THX is not a processing system but an audio/video quality control approval system.

Its certification stamp means that the video and audio quality at theaters and CD/DVD discs meet uniform standards. This means the same movie viewed at one theater will not be different when viewing it at another theater.

Note 2 - Data rate = bits sampled X sample rate. A CD player (44.1kHz) rate was chosen for comparison. The DVD sample rate of 48kHz would

make its data rate higher than shown.

Note 3 - LD = Laser Discs; DVD = Digital videodiscs; DTV = Digital TV; theaters = Movie theaters; VHS = Videotape format. Test discs can be purchased from different distributors:

Prologic test CD #SSTCD

· Sony parts distributors. Call 1-800-222-Sony for a distributor

Dolby DVD – TEST 1 # 22707 $45.

· USC Products Marketing Co.; 1 800 983 6529

DTS Test CD (digital output only)

· Digital Sound Systems Entertainment

DTS Test DVD #DTS-DVD 98061

5171 Clareton Drive, Agoura Hills, Calif. 91301 1-818-706-3525 part #DTS-CD 96091

· Sony parts distributors. Call 1-800-222-Sony for a distributor CD part # J2501-154-A $7.76 list price

· Digital Sound Systems Entertainment

Agoura Hills, Calif. 91301 1-818-706-3525 part #DTS- DVD 98061

What is DTS?

Digital Theater Systems has developed a digital audio compression method similar to Dolby Digital AC-3. DTS processed audio is not as compressed as Dolby AC-3. Therefore it is said to have more surround detail (separation), envelopment and better bass because of less compression (losses).

What do I need to play the DTS surround format?

The DTS source can be a DVD movie or CD. The DTS decoder is commonly found in the receiver.

5 Speakers

CD/DVD Player 6 Channel Receiver

With DTS Decoder

Digital output preamp out to

Sub Woofer

AC-3 decoder in the Receiver:

5 Speakers

CD/DVD Player 6 Channel Receiver

With DTS Decoder And AC-3 Decoder

Digital output preamp out to

Sub Woofer

Will a 5.1 channel DTS CD play in my CD player?

Only digital noise will appear from the L/R analog outputs if not automatically muted. There will be digital output from the coaxial and optical ports. Either digital output can be fed to a DTS stand-alone decoder or a receiver with a DTS internal decoder. The DTS receiver will produce the six channels (“5.1”) or be downmixed into two (front L/R) channels depending upon the user menu.

What do I need to play both the AC-3 and DTS surround formats?

The AC-3 source can be DVD or HDTV (future). The decoder can be found in the player or receiver.

AC-3 decoder in the Player:

5 Speakers

CD/DVD Player 6 Channel Receiver With AC-3 decoder With DTS Decoder

preamp out to

Digital Output Sub Woofer

A DTS CD compresses the six channels of audio into the space originally occupied by the two-channel uncompressed CD audio. In order for six compressed channels to fit on a CD, the data rate must be equal to or less than the rate of a normal uncompressed CD.

Data rate of an uncompressed CD per channel = 16 bits/sample x 44, 100 samples/second = 706 Kbytes/sec. There are two channels so the rate is doubled. Therefore the data rate of

a normal stereo CD = 1,412kbit/sec. This is just about the same data rate as a DTS compressed CD. The DTS

data rate is 1,411kbits, so no analog sound will be output from a DTS CD. For comparison, CD, DTS, and AC-3 data rates are shown:

Data Rate Comparison (44.1 kHz sample rate)

Format Output Data Rate CD Not compressed 1,412 Kbytes/sec. DTS Compressed 1,411 Kbytes/sec. Dolby Digital AC-3 Compressed 384 Kbytes/sec.

Why won’t my older DVD player play DTS DVDs?

The DVD DTS flag was not established until Nov 1998. This flag must be inserted into the DVD’s digital coax or optical output for the receiver to recognize and decode DTS. Therefore DVD units that are not marked “DTS ready” will not play DTS even though they have digital outputs.

Can DVD movies contain both DTS and AC-3 audio tracks?

Yes they can. Currently the DVD audio choices are:

· PCM – Producing the conventional analog L/R sound

· Dolby Digital or AC-3 – Compressed 5.1 channel surround sound

· DTS – Compressed 5.1 channel surround sound

How does DTS work?

The DTS and AC-3 encoding formats are generally similar. DTS and AC3 can accept digital (PCM) audio with word lengths from 16 to 24 bits. Both encoders can accept the common 32, 44.1 and 48kHz PCM sampling frequencies, but DTS has 12 more optional frequencies.

The general encoding of the DTS compression system will be explained. DTS has four blocks used to compress the PCM input audio into a single bit stream:

PCM audio Time to 6 Channels Frequency Compression

Conversion

6 lines

DTS

Multiplexer Packer Compressed

Bit Stream

Sync

MDCT Time to Frequency Conversion

Each single channel PCM source signal is grouped and allocated to one of 32 frequency bands for analysis. The process is commonly known as Modified Discrete Cosine Transformation (MDTC). This frequency band allocation allows for identification and removal of redundancy among the channels in the next compression stage.

Coefficients

CHANNELS

Frequency

Coefficients

Frequency

Compression

Adaptive Predictive Coding (ADPCM)

ADPCM involves smaller support stages to:

· Combine the same sounds found in other channels,

· Remove undetectable audio levels (below human hearing thresholds),

· Remove short interval noises that are swamped by louder sounds

(psycho acoustic masking); and

· Remove transient noises that do not repeat on the same or other channels.

The support stages include transient, vector and prediction analysis stages to determine if the sound is short term, increasing or decreasing, and if the sound will repeat. Removal or the combination of sounds (compression) is determined by the analysis.

From time to freq Converter

Compression Block: ADPCM:

• Transient analysis

• Vector analysis

• Prediction analysis

Global Bit Management

Variable Length Coding

Multiplexer

The six compressed channels are combined into a single line for ease of delivery. To do this each channel is stored into a register made up of flipflops. A high speed Multiplexer removes the information at six times the storage (sample) speed. Multiplexer

Six Channels N sample

frequency

F/F type Registers

6 lines

Packer

Global Bit Management

Once compression has taken place, an examination of the six data streams for density is made. Bit groups are tagged and moved from a high-density channel to a low-density channel equalizing the amount of data.

0011100011000011111001010101 channel 1

0000001011000000000000000000 channel 3

Variable Length Coding

Common fixed length codes and no data (00000000) codes are removed and replaced with shorter codes using a look up table. These shorter length code replacements are flagged for decoding.

0100011111 ROM Table 011 + flag

The packer organizes the information into blocks and adds:

· Error correction

· Synchronization information to each block and groups of blocks

BOARD LAYOUT

DVD Features

DVP-S330

DVD Models

MSRP * 449.00$ 499.00$ 599.00$ 899.00$ 1,399.00$

General

Single Optical Assembly x x x Dual Optical Assembly x x Active laser platform tilt servo x x x x TV / receiver / DVD Remote x x x x Advanced Test Mode x x x x Glow in the dark Remote keys x x Glass Epoxy Circuit Boards x Anti-Resonate Chassis & tray x Copper Plated Shielded Chassis x

Video

10 bit Video D/A Converter x x x x Digital RF Processor x x x x Digital Noise Reduction x x Video Page Bookmark x x x 2 Composite Video Outputs xxxx x 2 S-Video Outputs xxxx x Component Video (Y, U, V) Outputs x x x x

DVP-S530D

DVP-S550D

DVP-C600

DVP-S7700

Audio

96kHz / 24 bit audio D/A Converter xxxx x Sony Digital Cinema Sound x x Virtual Surround Sound x Dolby AC-3 Surround Decoder x x DTS Decoder 2 Analog Outputs xxxx x Coax & Optical Digital Outputs xxxx x 1/4" Headphone Output x x x x

* MSRP = Manufacturer's Su

ested List Price

Block Diagram

There are four major stages within this DVD player. They operate in this sequence to produce the discs’ video and audio:

· Power Supply

· Communications

· Servo Control

· Video and Audio Processing

Power Supply

The power supply block delivers five different voltages. Ever 5V is the only voltage present when the unit is plugged into AC. Ever 5V powers Interface IC201 to switch on the remainder of the voltages when it receives the power ON (P Cont) command.

Communications

Plug In

At plug in, Interface IC201 powers on the unit for 1.3 seconds, keeping the display dark. During this time there is a brief communication between Interface IC201 and System Control IC202 on the serial bus. At the conclusion of this communication “handshaking”, the front panel Dolby Digital indicator lights and quickly extinguishes as the unit powers off. The front panel red standby light is on during the entire initial communication, never turning green when momentarily powering up at plug in.

Power ON

At power ON, the red standby light turns to green and the power supply is turned on. After another brief communication between IC201 and IC202, IC202 retrieves and implements the start up program stored in Flash Memory IC205.

The start up program requires IC202 to check for the presence of these six ICs on the parallel bus and IC501 on the serial bus:

ICs Checked During Start Up

Name Number Purpose

1. Flash ROM IC205 Start up program instructions

2. Hybrid Gate Array

3. SRAM IC204 IC202’s local memory

4. AV Decoder IC401 Audio (AC-3) and Video (MPEG 2)

5. ARP2 IC303 CD/DVD data processing and

6. Servo IC701 Analog servo control

7. Audio DSP IC501

If an IC does not reply, IC202 instructs IC201 to power off the set.

IC601 Expansion port for System Control

IC202 to indirectly communicate with others on the parallel bus.

decoder

separation

Dolby Prologic, Rear channel delays,

5.1 channel downmixing to 2 channels

Servo Control

At the successful conclusion of the start up program, IC202 retrieves servo parameter data from EEProm IC201 using the serial bus. Then IC202 communicates with expansion port HGA IC601. IC601 relays the information to other ICs connected to it. One of those ICs is IC701. Servo IC701 is instructed to reset the base unit mechanism to the initial position and confirm it:

· Tray closed

· Tilt servo at mid position

· Sled returned to home position

If the initial position is not confirmed before a time limit (“time out”), IC201 will power off the set. Confirmation comes from IC701 through IC601 to IC202.

IC202 then sends commands back to servo IC701 for disc detection.

MECHANISM

OPTICAL DEVICE

TK-51 BD.

SPINDLE CONTROL IC802

IC001 RF AMP

FE TE PI

S. DATA CLK

IC304 DRAM

IC303 ARP2

DVD

DATA

CD DATA, CLK

IC401 AV DECODER

Y,C

Y,P , P

SPDIF, ACHI-6, CLK

IC402 IC403 SDRAM

VIDEO BUFFERS

IC501 AUDIO DSP

AU212 BD.

S VIDEO OUT

COMPONENT V OUT COMPOSITE V OUT

DIGITAL AUDIO OUT

IC902 DAC

IC905-7 DAC

ANALOG AUDIO OUT

5.1 CH AC-3 OUT

FOCUS COIL TRACK COIL

TILT

SPINDLE

SLED

IC801 FOCUS & TRACKING COIL

TILT MOTOR DRIVER

IC802 SPINDLE, SLED, & LOADING MOTOR DRIVER

3.3V EVER 5V POWER

BLOCK

IC701 SERVO

SPINDLE CONTROL IC303

12V

-12V

P CONT.

PARALLEL BUS

IC601 HGA

IR REC

FR150 BD.

IC202 SYSTEM CONTROL

BLOCK DIAGRAM

IC201 INTERFACE

MICRO

IC205 FLASH MEM

SERIAL BUS

MB-85 BD.

IC204 SRAM

DISPLAY

PANEL SWITCHES

IC201 EEPROM

FL101 BD.

6 22 991DVD02 1146

Video and Audio Processing

After the servos have begun, RF data will come from the optical assembly within the base unit. The “eye pattern” RF data is split into two paths to provide:

1. Feedback signal to lock the servos; and

2. Video and audio information. In the A/V processing chain, the RF data is processed by the following ICs:

Audio / Video Processing ICs

Name IC

RF Amp IC001 A/V

ARP2 IC303 A/V

Decoder IC401 A/V

DSP IC501 A

DAC IC902 A

DACs IC905-

IC907

Audio Video

(both)

A 3 Digital to analog converters for the

Matrix the optical outputs to produce signals for servo and A/V circuits

16 to 8 bit Demodulation

•

Descrambles the main data using

•

external memory IC304

Generates bit clock

•

MPEG decompression using the

•

external IC402 and IC403 memories

Crops the 16x9 image for a 4x3 TV

•

picture

Controls spindle motor speed

•

Sends disc’s control and menu

•

data to IC202

On screen display graphics

•

D/A Converter (analog video

•

output)

MPEG audio decompression

•

Dolby Digital AC-3 decompression

•

using external SRAM IC402 / IC403

Sound enhancements when there

•

is no AC-3 received (Rear channel delay)

Downmixing of 6 channel AC-3

•

into 2 (L/R) channels

Dolby Prologic decoding

•

Digital coax and optical output

•

Rear channel delay

•

Front/rear level balancing

•

Test tone generation

•

Digital to analog converter for the front left and right channels

six AC-3 channels

Purpose

Video

Audio

MECHANISM

OPTICAL DEVICE

TK-51 BD.

SPINDLE CONTROL IC802

IC001 RF AMP

FE TE PI

S. DATA CLK

IC304 DRAM

IC303 ARP2

DVD

DATA

CD DATA, CLK

IC401 AV DECODER

Y,C

Y,P , P

SPDIF, ACHI-6, CLK

IC402 IC403 SDRAM

VIDEO BUFFERS

IC501 AUDIO DSP

AU212 BD.

S VIDEO OUT

COMPONENT V OUT COMPOSITE V OUT

DIGITAL AUDIO OUT

IC902 DAC

IC905-7 DAC

ANALOG AUDIO OUT

5.1 CH AC-3 OUT

FOCUS COIL TRACK COIL

TILT

SPINDLE

SLED

IC801 FOCUS & TRACKING COIL

TILT MOTOR DRIVER

IC802 SPINDLE, SLED, & LOADING MOTOR DRIVER

3.3V EVER 5V POWER

BLOCK

IC701 SERVO

SPINDLE CONTROL IC303

12V

-12V

P CONT.

PARALLEL BUS

IC601 HGA

IR REC

FR150 BD.

IC202 SYSTEM CONTROL

BLOCK DIAGRAM

IC201 INTERFACE

MICRO

IC205 FLASH MEM

SERIAL BUS

MB-85 BD.

IC204 SRAM

DISPLAY

PANEL SWITCHES

IC201 EEPROM

FL101 BD.

6 22 991DVD02 1146

Power Supply Block

The power supply is on a single board located to the left of the DVD mechanism. This board contains both the standby and the main power supply. The input line filter L101 and the board connectors are the only parts that are not available.

Standby Power Supply

This power supply produces Ever 5V as long as AC is present. Ever 5V is supplied to interface IC201 (MB85 board) and the mute transistors (AU212 board). The standby power supply consists of an oscillator and an error regulator. The oscillator consists of switch Q121 and a control transistor Q122. The oscillator output is applied to T102. T102’s secondary is rectified to output Ever 5V.

Regulation

The Ever 5V voltage regulation circuit uses:

· IC202 – error detector

· PC121 – photocoupler

· Q122 – control transistor.

IC202 samples the Ever 5V output and produces a correction voltage. Photocoupler PC121 passes the error voltage from the cold ground circuit to the hot ground side circuit. The control transistor Q122 receives the error voltage and uses it to alter the base bias of switch Q121. The change in bias alters the off time of the oscillator signal. This changes the oscillator frequency. The changes in frequency affect the efficiency of the transformer, which regulates the Ever 5V.

Main Power Supply

The main power supply works similarly to the standby supply except the main supply is switched, handles more power and has multiple secondaries.

The main power supply is switched ON by PCONT from the Interface IC on the FR148 board. A high at PCONT enables switch Q101 to begin oscillating. Transformer T101 produces several output voltages that are rectified into DC for the remainder of the DVD unit.

When a shorted spindle motor driver IC802 loaded the unfused +12V supply line, the main oscillator quit. The oscillator worked again when the short was removed.

Regulation

The 3.3Vdc output is used to regulate the main power supply. Error detector IC201 receives the 3.3Vdc and produces a correction voltage. If the input voltage increases, the error detector output decreases. The PC101 photocoupler passes the correction signal to the control transistor Q102. Q102 adjusts the off time of the oscillator signal to correct the

3.3Vdc output the secondary. If the DVD power consumption is normal, the remainder of the T101 outputs will be correct.

Power Consumption

The current along each supply line was measured in both the idle and the DVD disc playback mode.

Model DVP-S530D Current Consumption

Part replaced

by Ammeter

Ever 5V L205 30ma (set off) 77mA (set on ) +12V partial PS201 196mA 198mA +12V total L201 236mA 350-700m A +5V PS202 281mA 305m A +3.3V PS20 3 * 894mA 950mA

-12V PS204 129mA 130m A

* Use short ammeter leads or the unit will not PB the disc and the display will not come on. The PS203 current without the display will only be 580mA.

Idle Disc PB

CurrentSupply line

Oscillator Frequencies

Power Supply Oscillator Frequencies

Power Supply Set Off Set On (stop mode) Standby (Q121/D) 57.45kHz 49.65kHz Main (Q101/C) 0 101.2kHz

SRV902UC BOARD

D101-104

L101 LINE FILTER

F101

CN101

Q101,102,T101 MAIN OSC.

+12V

+5V

RV201

PC101 PHOTO COUPLER

PC102,Q201 POWER CONTROL

Q121,122,T102 STBY OSC.

L201

+3.3V

-12V

IC201 ERROR DET.

EVER 5V

PC121 PHOTO COUPLER

PS201

PS202 PS203 PS204

IC202 ERROR DET.

L205

CN201

CN202

CN203

+12V

+5V

+3.3V

-12V

EVER 5V

M+12V

A+12V

+5V

+3.3V

6 7

PCONT

+5V

-12V

EVER 5V

TO AU212 BD. ANALOG AUDIO/ VIDEO

TO MB 85 BD. SERVO CONTROL

TO FR148,FL101 BDS. INTERFACE/ DISPLAY

POWER SUPPLY BLOCK

4 27 992DVD02 1137

Standby Oscillator

The standby oscillator produces Ever +5 volts when the DVD player is plugged into 120VAC. This Ever 5V is applied to the Interface IC201 (on the circuit board behind the front panel) and the audio and video mute transistors (on the rear board). The standby oscillator stage consists of two transistors and a transformer. Regulation is performed using the Ever 5V output to control the off time of the oscillator cycle.

The standby oscillator has three operational parts:

· Start

· Run

· Regulation

Start

At AC plug in, the standby oscillator stage begins when R122 and R123 bring the FET Q121 gate voltage from 0 to about 1volt. This turns on the low power FET, allowing it to pass Drain to Source current and complete T102’s primary circuit path to hot ground.

Run

Oscillator transistor Q121 turns ON As current flows in T102’s upper left primary winding, a voltage is induced

in the lower secondary winding that will keep FET oscillator Q121 turned ON. A positive voltage from the lower secondary winding takes two paths. The first path is through R126, R125 and C121 to Q121’s gate. This keeps Q121 conducting. The second path is through R127 and R128 to Q122’s base. Q122’s collector is connected to the oscillator’s gate. As a result, Q122 becomes an active resistor. Q122’s conduction prevents the gate voltage from rising too high (protection) and later we will see that it is used for regulation.

Oscillator transistor Q101 turns OFF When Q101 is saturated, there is no longer a change in T102’s primary

current. The voltage induced into the lower secondary winding decays. This reduction in bias voltage permits Q121 to turn OFF. With Q121 OFF, the magnetic field in T102’s primary winding collapses, causing current flow thorough C123 and limiter R130.

The collapsing magnetic field induces a negative voltage into the lower secondary winding. The negative voltage takes two paths to reset the oscillator. The first path is through R126, R125 and C121 to keep oscillator transistor Q121 OFF. The second path is through D121 and R128 into the base of Q122. This turns off transistor Q122 in preparation for the next oscillator cycle.

Regulation Concept

Regulation of the Ever 5V line is accomplished by sampling the output voltage and using it to reduce the off time of the oscillator. By reducing the off time, the total oscillator cycle is reduced. Shortening the time it takes to complete a cycle means its frequency is increased.

This oscillator signal is applied to transformer T102. A transformer has an optimum frequency that will allow maximum power transfer (at resonance). When the applied oscillator frequency is above resonance, the efficiency drops and its secondary voltage is reduced. By varying the applied frequency, the output voltage can be regulated.

Regulation Circuitry

IC202 is the error regulator for this stage. Voltage divider R212, R209 and R210 reduce the Ever 5V so there is 2.5V at IC202’s input. This allows its operation in the linear region. IC202’s output (collector) is inversely proportional to its input. The collector output is connected to the opto-isolator diode that passes the error signal to the hot ground oscillator circuit.

If the Ever 5V increased, the opto-isolator transistor would conduct more, reducing the resistance between the lower secondary winding and Q122’s base. The reduced resistance allows more current to flow, permitting Q122 to turn on sooner. The sooner it turns on, the sooner the FET turns off, increasing its frequency of operation that results in a reduced output voltage for regulation.

IMPORTANT VOLTAGES MEASURED WITH THE SET OFF:

Voltage DC Voltage Q101/Drain 300Vp-p 166V Q101/Gate 13.8Vp-p 2V D121/Anode 16Vp-p 0V

D101-D104

MAIN OSC

R121

T102

C102

L101 LINE FILTER

C108

220

Q122

R122

R123

R128 22k

C121

R125

R127

D122

PC121 ON3131

R126

R129D121 100 OHM

IC202 AN1431

Q121

R124

C123

R130

R206 470 OHMS

4.1V

R207 1k

R208

D206

D208

C212

C210 100

R212

R209

2.5V

R210

CN203L205

CN201

C211 100

EVER 5V TO FR150 BD. (DISPLAY)

EVER 5V TO AV212 BD. (MUTE)

STANDBY OSCILLATOR

6 28 9929DVD02 1175

Main Oscillator

The main oscillator stage operates like the standby oscillator stage except that the main oscillator is switched ON/OFF and there are multiple secondaries to supply the needs of the DVD player.

The main oscillator has four parts:

· Enable

· Start

· Run

· Regulation

Enable

Oscillator OFF The operation of the main oscillator is inhibited by PC102. When the unit

is plugged into AC, Ever 5V is made by the standby oscillator stage and is used to turn on the opto-isolator LED in PC102. The LED’s infrared light turns on the phototransistor and it conducts.

PC102’s phototransistor is connected to oscillator transistor Q101’s start voltage applied to the base. When PC201 conducts, the start voltage from R102/R103 is grounded, stopping the oscillator.

Oscillator ON Q201 removes the voltage to the opto-isolator diode in PC102, permitting

the main oscillator stage to run. When PCONT from Interface IC201 goes high at CN203/pin 1, Q201 turns ON. Its conduction grounds the voltage from R211, removing voltage from the LED. PC102 transistor turns off, removing the ground from R103 so the main oscillator transistor Q101 can start.

Start

Once the PCONT control line at CN203/pin 1 goes high, PC102’s transistor no longer conducts. The ground is removed from the start voltage at the junction of C111 and R104 so it rises. It will reach 6.6V, limited by the voltage divider formed by R102, R103 and R104.

Sufficient current passes through C111 during this voltage increase to turn ON main oscillator Q101. This is how oscillator transistor Q101 starts conducting (turns ON) and the main oscillator starts.

Run

Q101 Turns ON When Q101 turns ON, current flows through the main transformer’s pri-

mary winding at the upper left of T101. This induces a positive voltage to the lower T101 winding that follows two paths. The first path is through R106, R107, D109 and C113 to Q101’s base to keep it conducting. The second path is through D108 and R109 to bias Q102. Q102 acts like an active resistor at Q101’s base to keep the voltage from becoming excessive (protection) and is used later for regulation. Consequently the correct value components and transistors are critical.

When Q101 reaches saturation, there is no longer a change in T101’s primary current. The steady current flow no longer induces a voltage into the lower secondary winding and the secondary voltage decays.

Q101 Turns OFF The reduction in secondary voltage turns Q101’s OFF. The magnetic

field in T101’s primary collapses. D105, limiter, L102 and C110 short its energy. D106 is used to discharge C110 (when Q101 is ON).

The collapsing (changing) magnetic field induces a negative voltage at the lower secondary winding. This negative voltage from T101 passes through R106, R107 and C113 to the base of oscillator transistor Q101. It is used to cut off Q101 to conclude this oscillator cycle.

Regulation

The 3.3-volt output is monitored by error regulator IC201 and used to control the conduction of phototransistor PC101. If the 3.3-volt line rises, the phototransistor conducts harder. This reduces the resistance between the lower secondary winding and Q102’s base, increasing Q102 base current.

The increased base current drives Q102 harder, lowering the oscillator’s base bias voltage and causing the oscillator to be turned OFF sooner. When part of the oscillator waveform is shortened, its frequency increases. This reduces T101 efficiency and the 3.3V output voltage is returned to normal.

IMPORTANT VOLTAGES:

Q101/Collector = 336Vp-p; 150Vdc. PC101/collector = 2.6Vdc. PC101/emitter = 0.21Vdc Feedback secondary voltage at D108/cathode = 20Vp-p; 0.21Vdc.

R102

R103

STBY OSC

L105

D110

R107

C111

4.7mF

R104

C113

D109

EVER 5V

R211

D105

L102

Q102

C110

D106

R109

D107

PC101 ON3131

Q101

D108 MTZJ3.0

R106 47 1W

T101

D201

D202

C203

D203

R201

D204

L201

C201

C202

L202

L203

RV201

3.3V ADJ.

R204

R205

R203

C205

PS201

0.5A

PS202

PS203

PS204

0.75A

2.5V

CN202

R213

IC201 AN1431

2 6

7 5

CN201

M+12V

+3.3V

+5V A+12V

+12V

+5V

+3.3V

-12V

TO MB85 BD.

TO AV212 BD.

PC102 ON3131

Q201

MAIN OSCILLATOR

P CONT

CN203

FROM

FR150 BD.

7 12 9930DVD02 1174

Power Control

Plug In

When the DVD player is plugged into AC, the power supply only outputs Ever 5V to:

· Analog audio mute transistors – AU-212 board

· Interface IC201/pin 16 – FL101 board

· Reset IC202/pin 5 - FL101 board

The mute transistors are biased ON to keep the 5.1, headphones and L/ R channel audio outputs grounded.

Ever 5V applied to Interface IC201 starts the 4MHz X201 crystal connected to pins 14 and 15.

Reset IC202 on the FL101 board uses C211 to hold its pin 4 momentarily low when Ever 5V is first applied. This resets Interface IC201/pin 18.

After reset, a brief communication occurs between IC201 and IC202. A momentary light of the front panel blue Dolby Digital LED (D203) marks the end of the plug in communications and the unit shuts down.

The plug in sequence is listed below:

1. AC plug in

2. Ever 5V is applied to Interface IC201/pin 16

3. X201 becomes active and stays active

4. Red power off/standby LED comes ON.

5. PCONT from Interface IC201/pin 24 goes high to power the set

6. Ready pulse is output IC201/pin 78 as an interrupt line to IC202 to begin communications. It is difficult to see this low going interrupt pulse on a a scope, but it will light a scope’s “triggered” LED.

7. IC601 transfers this “ready” (interrupt) information to System Control IC202 by using another interrupt signal from IC601/pin 155 (low going). The low forces IC202 to generate a chip select (CS1 or CS4) so the data can be transferred to IC202 on the parallel bus.

8. System Control IC202 sends chip select (difficult to see the low going pulse from pin 97), bit clock (low pulses from pin 78) and serial data (high pulses from pin 77) to Interface IC201.

9. IC201 acknowledges by lighting the Digital Dolby LED D203

10. Interface IC201 brings PCONT low, removing power to the set. Unit is now in standby and ready to be powered ON.

IC201 – IC202 Communications Waveforms

The following sets of waveforms show this communication between IC201 and IC202. Notice that the Dolby Digital LED is turned ON only at the conclusion of the plug in communications. The LED does not light when there are incomplete communications.

PM3394, FLUKE & PHILIPS

ch1

ch2

ch3

ch4

Plug in Communications – between IC201 / IC202

Channel 1 PCONT CN203/pin 1 5Vp-p Channel 2 Dolby Digital LED D203/anode 2Vp-p Channel 3 CS from IC202 CN006/pin 3 5Vp-p Channel 4 Data from IC201 CN006/pin 4 5Vp-p Time base 200msec/div.

The following second set of waveforms is taken of IC202 CS signal (ch 3) that is replying to IC201. Notice that the return clock (ch 3) and data (ch

4) from IC202 occur before IC201 turns the LED (ch 2) ON.

T 1

CH1!5.00 V= 4

CH2!2.00 V=

CH3!5.00 V=

CH4!5.00 V= CHP MTB 200ms- 0.40dv ch1+

Name Location Voltage/div

EVER 5V

IC051 IR RECEIVER

EVER 5V

FR150

CN201/

CN002

R274

GRN

R072

R071

RED

S071 POWER

EVER 5V

P CONT.

R221

R222

FRONT PANEL BUTTONS S212-S218

SRV902UC PWR BLK

IC202 RESET

PST9140

C211

IC201 INTERFACE CONTROL M38857 MCHE206FP

2415145

X201 4MHz

SBUSY1

3.3V

D203 DOLBY DIGITAL

R285

SIN

SCLK

S OUT

SRDY1

DISPLAY

FL101 BD.

CN202 CN001/

CN202/ CN006

6 2 5

R044

R036

IC203 BUFFER SN74 HCT08

R037

3.3V 5V

R045

PARALLEL BUS

3.3V

SO01

SC0

CSOL

SI0

XIF INT

MB85 BD.

IC202 SYSTEM CONTROL MB91101 PFV

CS4

4 43 69

CS1

107

141142

CS1

IC601 HGA CXD8788Q

3.3V

IC205 FLASH ROM MBM29 LV160

PARALLEL BUS

4737

POWER CONTROL

6 22 9913DVD02 1154

PM3394, FLUKE & PHILIPS

ch1

ch2

ch3

ch4

T 1

CH1!5.00 V= 4

CH2!2.00 V=

CH3!5.00 V=

CH4!5.00 V= CHP MTB 200ms- 0.40dv ch1+

Plug in Communications – between IC201 / IC202

Name Location Voltage/div Channel 1 PCONT CN203/pin 1 5Vp-p Channel 2 Dolby Digital LED D203/anode 2Vp-p Channel 3 Bit clock from IC202 CN006/pin 6 5Vp-p Channel 4 Data from IC202 CN006/pin 5 5Vp-p Time base 200msec/div.

Power ON

IC201 The power ON operation works much like a modern day computer. When

the power ON command is received, Interface IC201 begins a boot up sequence using IC202 and IC205 to finish it. IC201 causes:

· The red standby light to turn to green;

· PCONT (at IC201/pin 24) to go high, powering the set; and

· Communications with System Control IC202, continuing the power

ON operation

IC202 IC202 continues the power ON operation, retrieving start up information

from the Flash ROM IC205. This start up information instructs IC202 to check each IC on the parallel bus and wait for an acknowledgement signal. At power ON, these ICs are polled in the order shown in the table:

Power ON IC check sequence (not shown in the diagram)

Chip Select Source Destination IC

1. CS 1 - IC202/pin 10 SRAM IC204 / HGA IC601

2. CE – IC202/pin 11 Flash ROM IC205

3. CS 3 – IC202/pin 8 AV Decoder IC401

4. CS 4 – IC202/pin 7 HGA IC601

5. CS 2 – IC202/pin 9 AV Decoder IC401

6. XCS – IC601/pin 111 ARP2 IC303

7. HCS - IC601/pin 118 Servo IC701

When all the replies have been received, Interface IC201 is informed and IC201 keeps the unit powered ON (PCONT remains high). At the same time, IC201 turns on the front panel blue Dolby Digital LED.

If a communications failure occurs and there is no acknowledgement signal to IC202 within three seconds of power ON, the unit will turn off. The PCONT signal (from IC201/pin 24) will go low and the player power is removed. The green power ON light changes back to red (standby mode).

Post Power ON Check

Therefore, if the blue Dolby Digital LED lights, communications have taken place and the unit remains ON. The next step is to determine if there is a disc present. The disc check sequence is:

1. Tray up and chucked – chuck switch feedback

2. Sled moves to home position – photosensor feedback

3. Sled moves outward – no feedback (stepping motor)

4. Laser is turned ON momentarily while focus searching

5. Focus Search is performed – FE and PI feedback signal

6. Sled moves outward further – no feedback

7. Laser is turned ON and Search is performed again

8. Sled moves outward further – no feedback

9. Laser is turned ON and Search is performed a third time

10. Sled moves inward to home – photosensor feedback

11. Laser is turned ON and Search is performed a fourth time

12. Spindle motor rotates – FG amp kick drive feedback

13. Display reads NO DISC. If an IC fails to receive the correct feedback from its sensors, System Control will instruct IC201 to enter standby (red front panel light).

EVER 5V

IC051 IR RECEIVER

EVER 5V

FR150

CN201/

CN002

R274

GRN

R072

R071

RED

S071 POWER

EVER 5V

P CONT.

R221

R222

FRONT PANEL BUTTONS S212-S218

SRV902UC PWR BLK

IC202 RESET

PST9140

C211

IC201 INTERFACE CONTROL M38857 MCHE206FP

2415145

X201 4MHz

SBUSY1

3.3V

D203 DOLBY DIGITAL

R285

SIN

SCLK

S OUT

SRDY1

DISPLAY

FL101 BD.

CN202 CN001/

CN202/ CN006

6 2 5

R044

R036

IC203 BUFFER SN74 HCT08

R037

3.3V 5V

R045

PARALLEL BUS

3.3V

SO01

SC0

CSOL

SI0

XIF INT

MB85 BD.

IC202 SYSTEM CONTROL MB91101 PFV

CS4

4 43 69

CS1

107

141142

CS1

IC601 HGA CXD8788Q

3.3V

IC205 FLASH ROM MBM29 LV160

PARALLEL BUS

4737

POWER CONTROL

6 22 9913DVD02 1154

Communications Block

Both serial and parallel bus structures are used in the same unit of today’s DVD players. The serial data bus is a simple way to provide communications between ICs. On one line, data is transmitted one bit after another to the next IC in 8, 16, 20, 24 or 32 bit groups. On another line, corresponding clock pulses accompany the bits of data. One clock pulse identifies each bit of data - this is why this line is also called a bit clock. Therefore, it takes 8, 16, 20, 24 or 32 clock pulses to receive a group of data in a serial bus.

A parallel data bus is used when large amounts of data need to be transmitted in a shorter time frame. In the parallel bus, multiple data lines are used along with a clock line. When a single clock pulse is sent, the 8, 16, 20, 24 or 32 lines each simultaneously transmit a bit of data to the receiving IC. (Only 16 data lines are used here.) Therefore, it takes only one clock pulse to receive a group of data in a parallel bus.

The parallel bus is used in processing video information (IC401) and in the disc playback servo (IC701) where large amounts of data must be handled quickly.

Serial Data

Parallel Data

The parallel data bus is much more complicated than the serial bus. It consists of address lines, data lines and a clock line. Just before data is transmitted from one IC to another, a location is designated using address lines. Then clock pulses are sent from the master IC202 to transfer the data into the receiving IC.

When communications are bi-directional on the parallel bus, an additional line identified as write enable (WE) and/or read enable (RE) is used. These lines determine the direction of the data to or from the master IC. When there is no WE or RE line, the bi-directional data communication is preestablished first as read-data from the master micro. Write-data occurs afterwards.

The serial data bus connects several ICs and consists of two or three lines. Serial data is transmitted from one IC to another on a unidirectional line (arrows shown in one direction). This data is accompanied by a clock signal for a total of two lines in a unidirectional serial communication.

The interface control IC201 and System Control IC202 communicate bidirectionally (arrows shown in two directions). Three lines are necessary when bi-directional transmissions are called. There is a data line for each direction. The additional clock signal makes a total of three lines for a bi-directional serial bus. The clock signal usually comes from the controlling micro, which in this case is System Control IC202.

System Control IC202 communications with Interface IC201, EEProm IC201 and DSP IC501 are bi-directional. System Control communications to the Digital to Analog Converters (DAC) IC902, IC905-7 are unidirectional.

CS FROM IC601

CS FROM IC202 IC202

CS FROM IC202

CS FROM

CS FROM IC601

CHIP SELECTS

IC201 INTERFACE CONTROL

IC202 SYSTEM CONTROL

CS FROM IC202

SERIAL BUS

IC201 4k EEPROM

CS FROM IC202

IC205 FLASH

IC501 AUDIO DSP

CS FROM IC202

PARALLEL BUS

IC401 AV DECODE

IC204 SRAM

CS FROM IC202

IC303 ARP2

IC902 AUDIO 2 CH DAC

IC601 HGA

CHIP SELECTS

CS FROM IC601

IC905 DAC FRONT

CS FROM IC601

IC701 SERVO

IC906-7 DAC REAR, CENTER

COMMUNICATIONS BLOCK

6 23 996DVD02 1149

Serial Data Communications

A close examination of the serial bus structure shows there are two serial buses. Both are active as long as the set is ON.

Serial Bus 0 Serial Bus 1

Serial Bus 0

Bus 0 is used for bi-directional communications between:

· System Control IC202

· Interface IC201

· EEProm IC201

System Control IC202 is the master IC. It sends and receives data on the serial data in (SI0, at IC202/pin 76) and out (SO0, at IC202/pin 77) lines. The data is always accompanied by serial clock (SC0, at IC202/pin 78) from IC202. There are always communications between these two ICs as long as there is power applied.

Interface IC201

System Control IC202 has the continuous task of transferring display information to the Interface IC201. The Interface IC201 must inform System Control IC202 that there is a new command such as play or stop.

Communications begin when Interface IC201/pin 78 outputs a low going “ready” pulse. In this IC the ready command is more like an interrupt command. This low going pulse is received by IC601/pin 22, which is used as an expansion port to access System Control IC201 via the parallel bus. The interrupt input is periodically checked within IC202’s program. When found, IC202 will enter a subroutine and acknowledge IC201’s request to send data for processing.

IC202/pins 76 and 77 to occur. The entire operation is similar to someone working when interrupted by a doorbell. When he is ready, he will answer the door. Afterwards he returns to his work in the house or elsewhere. The IC201 to IC202 communications sequence is:

System Control IC202 and Interface IC201 Data Transfer Sequence

Name of Signal Signal Source Signal purpose

1. SRDY (ready) IC201pin 78 Request communications

2. CSOL (chip select)

3. SC0 (clock) IC202/pin 78 Serial clock for data

4. SI0 (data) IC201/pin 71 User commands

5. SO0 (data) IC202/pin 77 Display update

6. CSOL (chip select)

IC202/pin 97 Communications window (active

low)

IC202/pin 97

Communications ends (returns high)

EEProm IC201

During playback or when playback is started, System Control IC202 retrieves information held in EEProm IC201. IC201 holds servo data and stores some disc parameters, such as how many information layers are on the disc. Some of this data is visible in the test mode.

Bi-directional communications between System Control IC202 and EEProm IC201 is accomplished using:

· Two single direction serial data lines (SO0 and SI0)

· Clock pulses from IC202/pin 78

· Chip Select signal from IC601/pin 23

Periodically in IC202’s routine, EEProm IC201is chip selected (when pin 3 is brought low). When this occurs, data is transferred between the ICs on the data lines (SO0 and SI0).

System Control IC202 acknowledges the interrupt signal by outputting two signals: a low chip select signal from pin 97 and a clock signal from pin 78. This allows for data communications on the SI0 and SO0 lines at

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