Sony CXP86617, CXP86613, CXP86609 Datasheet
CMOS 8-bit Single Chip Microcomputer
Description
The CXP86609/86613/86617 are the CMOS 8-bit
single chip microcomputer integrating on a single
chip an A/D converter, serial interface, timer/counter,
time-base timer, I2C bus interface, PWM output,
remote control reception circuit, watchdog timer,
32kHz timer/counter besides the basic configurations
of 8-bit CPU, ROM, RAM, I/O ports.
The CXP86609/86613/86617 also provide a sleep
function that enables to lower the power consumption.
Features
• A wide instruction set (213 instructions) which covers various types of data
— 16-bit operation/multiplication and division/Boolean bit operation instructions
• Minimum instruction cycle 250ns at 16MHz operation
122µs at 32kHz operation
• Incorporated ROM 8K bytes (CXP86609)
12K bytes (CXP86613)
16K bytes (CXP86617)
• Incorporated RAM 352 bytes
• Peripheral functions
— A/D converter 8 bits, 6 channels, successive approximation method
(Conversion time of 3.25µs at 16MHz)
— Serial interface 8-bit clock sync type, 1 channel
— Timer 8-bit timer
8-bit timer/counter
19-bit time-base timer
32kHz timer/counter
— I2C bus interface
— PWM output 8 bits, 4 channels
— Remote control reception circuit 8-bit pulse measurement counter, 6-stage FIFO
— Watchdog timer
• Interruption 11 factors, 11 vectors, multi-interruption possible
• Standby mode Sleep
• Package 52-pin plastic SDIP
• Piggyback/evaluator CXP86490 64-pin ceramic PSDIP
Perchase of Sony's I2C components conveys a licence under the Philips I2C Patent Rights to use these components
in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.
– 1 –
E97751-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXP86609/86613/86617
52 pin SDIP (Plastic)
Structure
Silicon gate CMOS IC
– 2 –
CXP86609/86613/86617
A/D CONVERTER
FIFOREMOCON
SERIAL INTERFACE
UNIT
8 BIT TIMER 1
8 BIT TIMER/
COUNTER 0
I
2
C BUS
INTERFACE UNIT
8 BIT PWM
PRESCALER/
TIME BASE TIMER
WATCHDOG TIMER
32kHz
TIMER/COUNTER
ROM
8K/12K/16K
BYTES
RAM
352
BYTES
SPC700 CPU CORE
CLOCK GENERATOR
/SYSTEM CONTROL
INTERRUPT CONTROLLER
PORT A
PORT G
PG7
1
PORT E
PE4 to PE63PE2 to PE3
2
PE0 to PE1
2
PORT D
PD0 to PD7
8
PORT B
PB0 to PB7
8
PA0 to PA7
8
PWM0 to PWM3
ADJ
SCL1
SCL0
SDA1
SDA0
TO
EC
SCK
SO
SI
RMC
AN0 to AN5
6
2
2
INT0
INT1
INT2
TEX
TX
EXTAL
XTAL
RST
V
DD
V
SS
4
PORT F
PF0 to PF34PF4 to PF7
4
Block Diagram
– 3 –
CXP86609/86613/86617
40
39
38
37
36
35
34
33
41
42
43
44
45
46
47
48
49
50
51
52
31
32
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
V
SS
VDD
NC
NC
NC
PE4
PE5
PE6
NC
NC
NC
PB0
PB1
PB2
PF0/PWM0
PF1/PWM1
PF2/PWM2
PF3/PWM3
PF4/SCL0
PF5/SCL1
PF6/SDA0
PF7/SDA1
PE0/TO/ADJ
PE1
PE2/TEX/INT0
PE3/TX
PD4
PD7/EC
PD6/RMC
PD5
PD3/SI
PD2/SO
PD1/SCK
PD0/INT2
PA7
PA6
RST
V
SS
PA0/AN0
XTAL
EXTAL
PA5/AN5
PA4/AN4
PA3/AN3
PA2/AN2
PA1/AN1
PB7
PB6
PB5
PB4
PB3
PG7/INT1
Pin Assignment (Top View)
Note) 1. NC (Pins 30, 31, 32, 36 and 38) are left open.
2. Vss (Pins 12 and 40) are both connected to GND.
3. Pin 37 is the NC pin. However, connect it to VDD because it is the
EXLC pin (input) for the piggyback/evaluator and OTP devices.
– 4 –
CXP86609/86613/86617
(Port A)
8-bit I/O port.
I/O can be set in
a unit of single bits.
(8 pins)
(Port B)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)
(Port D)
8-bit I/O port.
I/O can be set in
a unit of single bits.
Can drive 12mA
sink current.
(8 pins)
(Port E)
Bits 0 and 1 are
I/O port; I/O can
be set in a unit of
single. Bits 2 and 3
are input port.
Bits 4, 5 and 6 are
output port.
(7 pins)
Pin Description
Symbol
PA0/AN0
to
PA5/AN5
PA6 to PA7
PB0 to PB7
PD0/INT2
PD1/SCK
PD2/SO
PD3/SI
PD4 to PD5
PD6/RMC
PD7/EC
PE0/TO/ADJ
PE1
PE2/TEX/INT0
PE3/TX
PE4 to PE6
I/O/
Analog input
I/O
I/O
I/O/Input
I/O/I/O
I/O/Output
I/O/Input
I/O
I/O/Input
I/O/Input
I/O/Output/
Output
I/O
Input/Input/
Input
Input/Output
Output
I/O
Description
Analog inputs to A/D converter.
(6 pins)
External interruption request input.
Active at the falling edge.
Serial clock I/O.
Serial data output.
Serial data input.
Remote control reception circuit input.
External event input for timer/counter.
Rectangular wave output
for 8-bit timer/counter.
Connects a crystal for
32kHz timer/counter
clock oscillation.
When used as an event
counter, input to TEX pin
and leave TX pin open.
32kHz oscillation
frequency dividing output.
External interruption
request input. Active at
the falling edge.
– 5 –
CXP86609/86613/86617
(Port F)
8-bit output port and
large current (12mA)
N-channel open
drain output. Lower
4 bits are medium
voltage drive (12V);
upper 4 bits are 5V
drive.
(8 pins)
(Port G)
1-bit I/O port. I/O can be set in a unit
of single bits.
(1 pin)
Connects a crystal for system clock oscillation. When a clock is
supplied externally, input to EXTAL pin and input a reversed phase
clock to XTAL pin.
System reset; active at Low level.
No connected. Connect this pin to VDD under normal operation.
Positive power supply.
GND. Connect two Vss pins to GND.
8-bit PWM output.
(4 pins)
Symbol
PF0/PWM0 to
PF3/PWM3
PG7/INT1
RST
NC
VDD
Vss
Output/Output
I/O/Input
Input
I/O Description
External interruption request
input. Active at the falling edge.
PF4/SCL0 to
PF5/SCL1
PF6/SDA0 to
PF7/SDA1
Output/I/O
Output/I/O
I2C bus interface transfer clock I/O.
(2 pins)
I2C bus interface transfer data I/O.
(2 pins)
EXTAL
XTAL
Input
Output
– 6 –
CXP86609/86613/86617
Input/Output Circuit Formats for Pins
Port A
Port A
Port B
Port G
6 pins
2 pins
9 pins
Hi-Z
Hi-Z
Hi-Z
Pin After resetCircuit format
PA6
PA7
PA0/AN0
to
PA5/AN5
PB0 to PB7
PG7/INT1
Data bus
Port A function selection
"0" after reset
A/D converter
RD (Port A)
Input multiplexer
Port A data
Port A direction
"0" after reset
IP
Input protection
circuit
Port A data
Data bus
Data bus
INT1
RD (Port A)
Ports B, G direction
RD (Ports B, G)
Port A direction
"0" after reset
Ports B, G data
"0" after reset
Schmitt input
Schmitt input
only for PG7
IP
IP
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