Sony CXP86440, CXP86332, CXP86324, CXP86216, CXP86460 Datasheet

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– 1 –
CXP86212/86216, CXP86324/86332
CXP86440/86448/86460
E96644A86
CMOS 8-bit Single Chip Microcomputer
Description
The CXP86212/86216, CXP86324/86332, CXP86440/ 86448/86460 are the CMOS 8-bit single chip microcomputer integrating on a single chip an A/D converter, serial interface, timer/counter, time-base timer, on-screen display function, I
2
C bus interface, PWM output, remote control reception circuit, HSYNC counter, watchdog timer, 32kHz timer/counter besides the basic configurations of 8-bit CPU, ROM, RAM, I/O ports.
The CXP86212/86216, CXP86324/86332, CXP86440/ 86448/86460 also provide a SLEEP function that enables to lower the power consumption.
Features
A wide instruction set (213 instructions) which covers
various types of data
– 16-bit operation/multiplication and division/
Boolean bit operation instructions
Minimum instruction cycle 250ns at 16MHz operation
122µs at 32kHz operation
Incorporated ROM 12K bytes (CXP86212)
24K bytes (CXP86324) 40K bytes (CXP86440) 16K bytes (CXP86216) 32K bytes (CXP86332) 48K bytes (CXP86448) 60K bytes (CXP86460)
Incorporated RAM 352 bytes (CXP86212/86216) 704 bytes (CXP86324/86332)
1536 bytes (CXP86440/86448/86460) (Excludes VRAM for on-screen display and sprite RAM)
Peripheral functions
– A/D converter 8-bit 6-channel successive approximation method
(Conversion time of 3.25µs at 16MHz) – Serial interface 8-bit clock sync type, 1 channel – Timer 8-bit timer
8-bit timer/counter
19-bit time-base timer
32 kHz timer/counter – On-screen display (OSD) function 12
× 16 dots, 128 character types (CXP86212/86216), 256 character types (CXP86324/86332), 384 character types (CXP86440/86448/86460) 15 character colors, 2 lines × 24 characters, frame background 8 colors/ half blanking, background on full screen 15 colors/ half blanking edging/ shadowing/ rounding for every line, background with shadow for every character (CXP86440/86448/86460), double scanning, sprite OSD (CXP86440/86448/86460), 12 × 16 dots, 1 screen, 8 colors for every dot
– I
2
C bus interface
– PWM output 8 bits, 8 channels
14 bits, 1 channel
– Remote control reception circuit 8-bit pulse measurement counter, 6-stage FIFO – HSYNC counter 2 channels – Watchdog timer
Interruption 13 factors, 13 vectors, multi-interruption possible
Standby mode Sleep
Package 64-pin plastic SDIP/QFP/LQFP
Piggyback/evaluator CXP86400 64-pin ceramic PQFP
CXP86490 64-pin ceramic PSDIP (Supports custom font)
Perchase of Sony's I2C components conveys a licence under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Structure
Silicon gate CMOS IC
64 pin SDIP (Plastic) 64 pin QFP (Plastic)
64 pin LQFP (Plastic)
– 2 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
A/D CONVERTER
6CH
FIFOREMOCON
SERIAL INTERFACE
UNIT
8BIT TIMER 1
8BIT TIMER/
COUNTER 0
ON SCREEN
DISPLAY
HSYNC COUNTER 0
HSYNC COUNTER 1
I
2
C BUS
INTERFACE UNIT
8BIT PWM 14BIT PWM
PRESCALER/
TIME BASE TIMER
WATCHDOG TIMER
32kHz
TIMER/COUNTER
ROM
12K/16K/24K/32K/
40K/48K/60K BYTES
RAM
352/704/1536 BYTES
SPC700 CPU CORE
CLOCK GENERATOR
/SYSTEM CONTROL
INTERRUPT CONTROLLER
PORT APORT BPORT CPORT DPORT EPORT FPORT G
PG3 to PG7
PWM
5
PF0 to PF7 8
PE4 to PE63PE2 to PE3
2
PE0 to PE1 2
PD0 to PD7 8
PC6 to PC7 2
PC0 to PC5 6
PB0 to PB7 8
PA0 to PA7 8
PWM0 to PWM7
ADJ
SCL1 SCL0
SDA1 SDA0
HS1
HS0
VSYNC
HSYNC
YM
YS
I
B
G
R
EXLC
XLC
TO
EC
SCK
SO
SI
RMC
AN0 to AN5
6
2
2
2
INT0
INT1
INT2
TEX
TX
EXTAL
XTAL
RST
MP
V
DD
V
SS
8
Block Diagram
– 3 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
40 39 38
37
36
35 34
33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
63
64
61
62
31 32
2 3 4
5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
24 25 26 27 28 29 30
1
V
SS
VDD NC EXLC XLC PE4/YM PE5/YS PE6/I B G R PB0 PB1 PB2 PG3 PG4
PC4 PC5 PC6/PWM6 PC7/PWM7 PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/SCL0 PF5/SCL1/PWM4 PF6/SDA0 PF7/SDA1/PWM5 PE0/TO/ADJ PE1/PWM PE2/TEX/INT0 PE3/TX
HS0/PD4
PC3 PC2 PC1 PC0
EC/PD7
RMC/PD6
HS1/PD5
SI/PD3
SO/PD2
SCK/PD1
INT2/PD0
HSYNC/PA7
VSYNC/PA6
RST
V
SS
PA0/AN0
XTAL
EXTAL PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1
PB7 PB6 PB5 PB4 PB3
INT1/PG7
PG6 PG5
Pin Assignment (Top View) 64-pin SDIP
Note)
1. NC (Pin 46) is left open.
2. Vss (Pins 16 and 48) are both connected to GND.
– 4 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
VSS VDD NC EXLC XLC PE4/YM PE5/YS PE6/I B G
PE1/PWM PE2/TEX/INT0 PE3/TX
PF3/PWM3 PF4/SCL0 PF5/SCL1/PWM4 PF6/SDA0 PF7/SDA1/PWM5 PE0/TO/ADJ
40 39
38 37 36 35
34 33
41
42
43
44
45
46
47
48
49
50
51
PF2/PWM2
PF1/PWM1
PF0/PWM0
PC7/PWM7
PC6/PWM6
PC5
PC4
PC3
PC2
PC1
PC0
PD7/EC
PD6/RMC
52
53
54
55
56
57
58
59
60
63
64
61
62
R
PB0
PB1
PB2
PG3
PG4
PG5
PG6
INT1/PG7
PB3
PB4
PB5
PB6
31
32
20
21
22
23
24
25
26
27 28
29
30
HS0/PD4
HS1/PD5
SI/PD3
SO/PD2
SCK/PD1
INT2/PD0
HSYNC/PA7
VSYNC/PA6
RST
V
SS
PA0/AN0
XTAL
EXTAL PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1
PB7
2 3 4
5 6 7 8 9
10
11 12 13 14 15 16
17
18 19
1
Pin Assignment (Top View) 64-pin QFP
Note)
1. NC (Pin 40) is left open.
2. Vss (Pins 10 and 42) are both connected to GND.
– 5 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
PE2/TEX/INT0 PE3/TX V
SS
VDD NC EXLC XLC PE4/YM PE5/YS PE6/I
PF7/SDA1/PWM5 PE0/TO/ADJ PE1/PWM
PF4/SCL0 PF5/SCL1/PWM4
PF6/SDA0
40
38 37 36 35 34 33
41
42
43
44
45
46
47
48
PF0/PWM0
PC7/PWM7
PC6/PWM6
PC5
PC4
PC3
PC2
PC1
PC0
PD7/EC
PD6/RMC
PD5/HS1
PD4/HS0
52
53
54
55
56
57
58
59
60
63
64
61
62
B
G
R
PB0
PB1
PB2
PG3
PG4
PG5
PG6
INT1/PG7
PB3
PB4
31
32
20
21
22
23
24
25
26
27
28
29
30
SO/PD2
SI/PD3
SCK/PD1
INT2/PD0 HSYNC/PA7 VSYNC/PA6
RST
V
SS
XTAL
EXTAL PA5/AN5 PA4/AN4 PA3/AN3 PA2/AN2 PA1/AN1 PA0/AN0
2 3 4
5 6 7 8 9
10
11 12 13 14 15 16
17
18
19
1
49
50
51
PF1/PWM1
PF2/PWM2
PF3/PWM3
39
PB5
PB6
PB7
Pin Assignment (Top View) 64-pin LQFP
Note)
1. NC (Pin 38) is left open.
2. Vss (Pins 8 and 40) are both connected to GND.
– 6 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
(Port A) 8-bit I/O port. I/O can be set in a unit of single bits. (8 pins)
(Port B) 8-bit I/O port. I/O can be set in a unit of single bits. (8 pins)
(Port C) Lower 6 bits are I/O ports; I/O can be set in a unit of single bits. Upper 2 bits are output port and large current (12mA) N-channel open drain output. Upper 2 bits are medium drive voltage (12V); lower 6 bits are 5V drive. (8 pins)
(Port D) 8-bit I/O port. I/O can be set in a unit of single bits. Can drive 12mA synk current. (8 pins)
(Port E) Bits 0 and 1 are I/O port; I/O can be set in a unit of single. Bits 2 and 3 are input port. Bits 4, 5 and 6 are output port. (7 pins)
Pin Description
Symbol
PA0/AN0
to
PA5/AN5 PA6/VSYNC PA7/HSYNC
PB0 to PB7
PC0 to PC5
PC6/PWM6 to PC7/PWM7
PD0/INT2 PD1/SCK
PD2/SO PD3/SI PD4/HS0 PD5/HS1 PD6/RMC PD7/EC
PE0/TO/ADJ PE1/PWM
PE2/TEX/INT0
PE3/TX
PE4/YM PE5/YS PE6/I B G R
I/O/ Analog input
I/O/Input I/O/Input
I/O
I/O
Output/Output
I/O/Input I/O/I/O
I/O/Output I/O/Input I/O/Input I/O/Input I/O/Input I/O/Input I/O/Output/
Output I/O/Output
Input/Input/ Input
Input/Output
Output/Output Output/Output Output/Output Output Output Output
I/O
Description
Analog inputs to A/D converter. (6 pins)
OSD display vertical sync signal input. OSD display horizontal sync signal input.
8-bit PWM output. (2 pins)
External interruption request input. Active at the falling edge.
Serial clock I/O. Serial data output. Serial data input. HSYNC counter (CH0) input. HSYNC counter (CH1) input. Remote control reception circuit input. External event input for timer/counter. Rectangular wave output
for 8-bit timer/counter. 14-bit PWM output.
Connects a crystal for 32kHz timer/counter clock oscillation. When used as an event counter, input to TEX pin and leave TX pin open.
32kHz oscillation frequency dividing output.
External interruption request input. Active at the falling edge.
OSD display 6-bit output. (6 pins)
– 7 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
(Port F) 8-bit output port and large current (12mA) N-channel open drain output. Lower 4 bits are medium drive voltage (12V); upper 4 bits are 5V drive. (8 pins)
(Port G) 5-bit I/O port. I/O can be set in a unit of single bits. (5 pins)
Connects a crystal for system clock oscillation. When a clock is supplied externally, input to EXTAL pin and input a reversed phase clock to XTAL pin.
System reset; active at Low level. OSD display clock oscillation I/O. Oscillation frequency is determined
by the external L and C. No connected.
Positive power supply. GND. Connect two Vss pins to GND.
8-bit PWM output. (4 pins)
I2C bus interface transfer clock I/O. (2 pins)
I2C bus interface transfer data I/O. (2 pins)
Symbol
PF0/PWM0 to PF3/PWM3
PF4/SCL0 PF5/SCL1/
PWM4 PF6/SDA0 PF7/SDA1/
PWM5 PG3 to PG6
PG7/INT1
EXTAL XTAL
RST EXLC XLC NC VDD Vss
Output/Output Output/I/O
Output/I/O/ Output
Output/I/O Output/I/O/
Output I/O
I/O/Input
Input Output Input
Input Output
I/O Description
8-bit PWM output.
8-bit PWM output.
External interruption request input. Active at the falling edge.
– 8 –
CXP86212/86216, CXP86324/86332, CXP86440/86448/86460
Input/Output Circuit Formats for Pins
Port A
Port A
Port B Port C
6 pins
2 pins
19 pins
Hi-Z
Hi-Z
Hi-Z
Pin When resetCircuit format
PA6/VSYNC PA7/HSYNC
PB0 to PB7 PC0 to PC5 PG3 to PG6 PG7/INT1
PA0/AN0
to
PA5/AN5
Port G
Ports C and F data
Ports C and F function selection
“0” when reset
“1” when reset
PWM0 to PWM3 PWM6, PWM7
12V drive voltage
Large current 12mA
Port C
6 pins
PC6/PWM6 PC7/PWM7 PF0/PWM0
to
PF3/PWM3
Hi-Z
Port F
Data bus
Port A function selection
“0” when reset
A/D converter
Data bus
RD (Port A)
Input multiplexer
RD (Port A)
Port A data
Port A direction
“0” when reset
Port A data
Port A direction
“0” when reset
Schmitt input
IP
Input protection circuit
IP
HSYNC, VSYNC
Data bus
RD (Ports B, C, G)
INT1
Ports B, C, G data
Ports B, C, G direction
“0” when reset
Input polarity
“0” when reset
Schmitt input only for PG7
IP
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