Sony CXP854P60 Datasheet
CMOS 8-bit Single-chip Microcomputer
Description
The CXP854P60 are a highly integrated microcomputers composed of a 8-bit CPU, PROM, RAM,
and I/O ports. These chips feature many other highperformance circuits in a single-chip CMOS design,
including an A/D converter, serial interface,
timer/counter, time-base timer, vector interrupt, onscreen display function, I2C bus interface, PWM
generator, remote control receiver, HSYNC counter,
and watchdog timer.
Also, the CXP854P60 provides power-on reset
and sleep functions. The designers have ensured
low power consumption for these powerful microcomputers.
Incorporating a one-time PROM, the CXP854P60
has an equivalent function to the CXP85460 and
character ROM for OSD can be written. Therefore, it
is suitable for evaluation in system development
and for the production of small amounts.
64 pin SDIP (PIastic) 64 pin QFP (PIastic)
Structure
Silicon gate CMOS IC
CXP854P60
Features
• Instruction set which supports a wide array of data types-213 types of instructions which include 16-bit
calculations, multiplication and division arithmetic, and boolean operations.
• Minimum instruction cycle 0.5µs/8MHz
• On-chip PROM 60K bytes (For program)
10K bytes (For OSD)
• On-chip RAM 960 bytes
• On-screen display function 12 × 18 dots, 384 types, 12lines of 32 characters
Black frame output, half blanking, shadow, background color on full screen
Double scanning mode supported includes jitter elimination circuit
• I2C bus interface
• 14-bit PWM output, 8-bit PWM output (8 channels)
• Remote control receiver circuit
• 8-bit A/D converter (4 channels, 20µs conversion time/4MHz, 8MHz)
• HSYNC counter (2channels)
• Watchdog timer
• 8-bit synchronized serial I/O
• 8-bit timer, 8-bit timer/counter, 19-bit time-base timer
• General purpose input/output 32-line I/O (bit-selectable input/output), also 6-line input, 10-line output (internal
8-line Nch-O/D)
• Interrupts 13 factors, 13 vectors, multiple interrupt possible
• Standby mode SLEEP
• Package 64-pin plastic SDIP/QFP
Purchase of Sony's I2C components conveys a license under the Philips I2C Patent Rights to use these components
in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E95109-ST
CXP854P60
Vpp
V
SS
V
DD
MP
RST
XTAL
EXTAL
PA0 to PA7
PB0 to PB7
PORT A
CLOCK GEN./
SYSTEM CONTROL
SPC700
CPU CORE
PORT B
RAM
960 BYTES
60K
PROM
PC0 to PC7
PORT C
PD0 to PD7
PORT D
PRESCALER/
PE6 to PE7
PE0 to PE5
PF0 to PF7
PORT E
TIME BASE TIMER
PORT F
8CH
8 BIT PWM
PF7/PWM7
to
PF0/PWM0
PD0/INT2
PE1/INT1
PE0/INT0
Block Diagram
2
ON SCREEN DISPLAY
I
B
R
G
XLC
EXLC
YS
2
YM
PD3/SI
PA7/HSYNC
PA6/VSYNC
CONTROLLER
INTERRUPT
SERIAL I/O
TIMER/COUNTER
PE7/TO
PD7/EC
PD2/SO
PD1/SCK
FIFO
REMOCON
PD6/RMC
WATCH DOG TIMER
HSYNC COUNTER 0
PD4/HS0
HSYNC COUNTER 1
PD5/HS1
A/D CONVERTER
PE2/AN0
to
PE5/AN3
PF4/SCL0
14BIT PWM
C
2
I
INTERFACE UNIT
PF5/SCL1
PF6/SDA0
PF7/SDA1
PE6/PWM
– 2 –
Pin Assignment (Top View)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
40
39
38
37
36
35
34
31
32
33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
63
64
61
62
1
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
EC/PD7
PF3/PWM3
PF4/PWM4/SCL0
PF5/PWM5/SCL1
PF6/PWM6/SDA0
PF7/PWM7/SDA1
YM
YS
I
B
G
R
EXLC
XLC
PE0/INT0
PE1/INT1
PE2/AN0
PE3/AN1
PE4/AN2
PE5/AN3
RMC/PD6
HS1/PD5
HS0/PD4
SI/PD3
SO/PD2
SCK/PD1
V
SS
INT2/PD0
XTAL
EXTAL
RST
TO/PE7
PWM/PE6
PA2
PA3
PA4
PA5
PA6/VSYNC
PA7/HSYNC
V
SS
V
DD
Vpp
MP
PF0/PWM0
PF1/PWM1
PF2/PWM2
29
HSYNC/PA7
VSYNC/PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
EC/PD7
RMC/PD6
HS1/PD5
HS0/PD4
SI/PD3
SO/PD2
SCK/PD1
VSS
CXP854P60
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VDD
Vpp
V
SS
MP
PF0/PWM0
PF1/PWM1
PF2/PWM2
PF3/PWM3
PF4/PWM4/SCL0
PF5/PWM5/SCL1
PF6/PWM6/SDA0
PF7/PWM7/SDA1
YM
YS
I
B
G
R
EXLC
XLC
PE0/INT0
PE1/INT1
PE2/AN0
PE3/AN1
PE4/AN2
PE5/AN3
PE6/PWM
PE7/TO
RST
EXTAL
XTAL
PD0/INT2
Note) 1. Vpp pin 56 must be connected to V
2. Vss pins 26 and 58 must have a common GND.
3. MP pin 55 must be connected to GND.
Note) 1. Vpp pin 63 must be connected to VDD.
2. Vss pins 32 and 62 must have a common GND.
3. MP pin 61 must be connected to GND.
DD.
– 3 –
Pin Functions
CXP854P60
Pin Name
PA0 to PA5
PA6/VSYNC
PA7/HSYNC
PB0 to PB7
PC0 to PC7
PD0/INT2
PD1/SCK
PD2/SO
PD3/SI
PD4/HS0
PD5/HS1
PD6/RMC
I/O Function
I/O
I/O/Input
I/O/Input
(Port A)
Single bit selectable 8-bit port.
(8 lines)
CRT display vertical synchronization signal input pin.
CRT display horizontal synchronization signal input pin.
(Port B)
I/O
Single bit selectable 8-bit port.
(8 lines)
(Port C)
I/O
Single bit selectable 8-bit port.
(8 lines)
I/O/Input
I/O/I/O
I/O/Output
I/O/Input
I/O/Input
I/O/Input
I/O/Input
(Port D)
Single bit selectable
8-bit port.
12mA sink current
drive possible.
(8 lines)
Input pin for external interrupt request.
Active on falling edge.
Serial clock pin.
Serial data output pin.
Serial data input pin.
HSYNC counter (CH0) input pin.
HSYNC counter (CH1) input pin.
Remote control receiver circuit input pin.
PD7/EC
PE0/INT0
PE1/INT1
PE2/AN0
to
PE5/AN3
PE6/PWM
PE7/TO
PF0/PWM0
to
PF3/PWM3
PF4/PWM4/
SCL0
PF5/PWM5/
SCL1
PF6/PWM6/
SDA0
PF7/PWM7/
SDA1
I/O/Input
Input/Input
Input/Input
Output/Output
Output/Output
Output/Output
Output/Output/
I/O
Output/Output/
I/O
(Port E)
8-bit port, lower
6 bits for input,
upper 2 bits for
output.
(8 lines)
(Port F)
8-bit output port
with large current
(12mA) N-ch open
drain output.
Lower 4 bits middle
voltage tolerance
(12V), upper 4 bits
5V suppression.
(8 lines)
External event timer/counter input pin.
Input pin for external interrupt request.
Active falling edge.
(2 lines)
Analog input pin for A/D converter.
(4 lines)
14-bit PWM output pin.
(CMOS output)
Square wave output for timer 1.
(50% duty cycle)
8-bit PWM output pin.
(8-lines)
I2C bus interface transfer clock I/O pin.
I2C bus interface transfer data I/O pin.
R, G, B, I, YS, YM
Output
CRT display 6-bit output pin.
– 4 –
CXP854P60
Pin Name
EXLC
XLC
EXTAL
XTAL
RST
MP
Vpp
VDD
Vss
I/O Function
Input
Output
Input
Output
CRT display clock oscillator I/O pin.
Oscillator frequency is determined external L, C circuit.
System clock oscillator crystal connection pin. When using an external
clock, input to EXTAL pin and leave XTAL pin open.
"L" level active system reset. This pin also acts as an I/O pin during
I/O
power up. While internal power-on reset function is talking place a
"L" level is output.
Input
Test mode input pin. Must be connected to GND.
Positive power supply pin for incorporated PROM writing.
Under normal operating conditions, connect to VDD.
Positive supply voltage pin.
GND. Both Vss pins should be connected to common GND.
– 5 –
AAAA
AAAA
AAAA
AAAA
Pin Equivalent I/O Circuit
CXP854P60
Pin
PA0 to PA5
PB0 to PB7
PC0 to PC7
22 lines
PA6/VSYNC
PA7/HSYNC
Port A
Port B
Port C
Data bus
Port A
Data bus
Port A data
Port B data
Port C data
AA
Port A direction
Port B direction
Port C direction
RD
(Port A, B, C)
Port A data
Port A direction
Circuit format
Input protection
IP
circuit
Input protection
IP
circuit
When reset
Hi-Z
Hi-Z
2 lines
PD0/INT2
PD3/SI
PD4/HS0
PD5/HS1
PD6/RMC
PD7/EC
6 lines
RD (Port A)
VSYNC
HSYNC
Port D
Port D data
Port D direction
Data bus
RD (Port D)
INT2, SI, HS0, HS1, RMC, EC
Schmitt input
Input multiplexer
Schmitt input
Large current
source 12mA
IP
Hi-Z
– 6 –
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