Sony CXL5520P, CXL5520M Datasheet

– 1 –
CXL5520M/P
E95X04-PS
CMOS-CCD Baseband 1H Delay Line
Description
CXL5520 is a CMOS-CCD baseband 1H delay line
designed for TV signal processing.
Single 5V power supply
Low power consumption
Built-in line locked PLL circuit
Built-in 2 comb filters
(Addition of delayed and non-delayed output signal.)
Built-in peripheral circuits
Absolute Maximum Ratings (Ta = 25°C)
Supply voltage VDD +6 V
Operating temperature Topr –10 to +60 °C
Storage temperature Tstg –55 to +150 °C
Allowable power dissipation
PD CXL5520M 400 mW CXL5520P 800 mW
Recommended Operating Condition (Ta = 25°C)
Supply voltage VDD 5V ± 5%
Recommended Clock Condition (Ta = 25°C)
Top pulse voltage VCLK 3 to 7 V
Frequency fCLK 15.625 kHz
Input clock waveform Sandcastle pulse
Pin Description
Input Signal Amplitude
± (R-Y) PAL and NTSC Vsig 525 mVp-p (Typ.)
± (B-Y) PAL and NTSC Vsig 665 mVp-p (Typ.)
± (R-Y) SECAM Vsig 1.05 Vp-p (Typ.)
± (B-Y) SECAM Vsig 1.33 Vp-p (Typ.)
Function
2 comb filters outputs
(Addition of delayed and non-delayed output signal.)
Timing generator and clock driver
Line Locked PLL circuit (Sandcastle pulse)
Autobias circuit
Pulse clamp circuit
Sample and hold circuit and output Amp.
Structure
CMOS-CCD
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXL5520M
16 pin SOP (Plastic)
CXL5520P
16 pin DIP (Plastic)
Pin No.
1 2 3 4 5 6 7 8
VDD AB (NC) (NC) SAND VCO IN (NC) GND
+5V supply voltage Autobias output not connected not connected Sandcastle pulse input VCO input not connected Ground
9 10 11 12 13 14 15 16
(NC) (NC) Vo (R-Y) Vo (B-Y) (NC) Vi (B-Y) (NC) Vi (R-Y)
not connected not connected ± (R-Y) output signal ± (B-Y) output signal not connected ± (B-Y) input signal not connected ± (R-Y) input signal
Symbol Description
Pin No.
Symbol Description
– 2 –
CXL5520M/P
Block Diagram and Pin Configuration (Top View)
9
10
11
12
13
1415
16
Clamp circuit
Clamp circuit
Autobias circuit
CCD Register (1H)
CCD Register (1H)
CCD Register
(0H)
CCD Register
(0H)
Output circuit
Output circuit
Timing Generator
Divider (by 864)
VCO (13.5MHz)
Phase comparator
Sandcastle pulse detector
1
V
DD
2
AB
3
(NC)
4
(NC)
5
SAND
6
VCO IN
7
(NC)
8
GND
(NC)
Vi (B-Y)
(NC)
Vi (R-Y)
Vo (B-Y)
Vo (R-Y)
(NC)
(NC)
– 3 –
CXL5520M/P
Electrical Characteristics (Ta = 25°C, VDD = 5V, fCLK = 15.625kHz, Sandcastle pulse)
See Electrical Characteristics Measurement Circuit.
Item
Supply current
Output DC voltage
Output signal (peak to peak value)
Gain
Noise voltage
Noise
IDD VDCR VDCB VoR VoB Gnt Gseca VnR VnB SNR SNB
— —
b
a
a
b
b
b
b
b
b
b
— — —
b a b a b a b a
— — —
a a a a b b b b
1
— —
5
–1
52
15
2
1.05
1.33 6 0
1
56
25
3
— —
7 1
5
mA
V
V
dB
mV
dB
1
2
3
4
5
6
Symbol Condition
SW condition
1 2 3 4
Min. Typ. Max. Unit Note
Notes
1) This is the IC supply current value.
2) Measure the output voltage level when no signal input.
3) Measure the output signal peak-to-peak voltage level when the input signals are following level (peak-to­peak voltage).
±R-Y signal 525mVp-p ±B-Y signal 665mVp-p
4) Gnt means the ratio of Output/Input signal when NTSC, PAL signal input. Gseca means the ratio of Output/Input signal when SECAM signal input. Signal wave form of NTSC/PAL and SECAM are shown in following.
5) Measure the noise voltage at f = 10kHz to 1MHz, and no signal input.
6) Measure the Signal to Noise ratio at f = 10kHz to 1MHz, and output signal = 1Vp-p.
No signal input
Standard input
Ratio of Output/Input signal
Noise voltage (No signal input) (RMS value)
Signal to Noise ratio (Vo = 1Vp-p)
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