SMSC USB464, USB4640i User Manual

USB4640/USB4640i

High Speed Inter-Chip USB

2.0 Hub and Flash Media
Controller

PRODUCT FEATURES

General Description

The SMSC USB4640/USB4640i is a Hi-Speed HSIC USB hub
and card reader combo solution with an upstream port
compliant to HSIC 1.0, a supplement to the USB 2.0
specification. The two downstream ports are compliant with the
USB 2.0 specification.

High Speed Inter-Chip (HSIC) is a digital interconnect bus that
enables the use of USB technology as a low-power chip-to-chip
interconnect at speeds up to 480 Mb/s. The HSIC interface is
an industry standard 2-pin digital interface which uses standard
USB software. The SMSC USB4640/USB4640i provides an
ultra fast interface between an HSIC enabled host and today’s
popular flash media formats. The controller allows read/write
capability to flash media from the following families:

– Secure Digital
– MultiMediaCard
– Memory Stick
– xD Picture Card

The USB4640/USB4640i offers a versatile, cost-effective, and
energy-efficient hub controller with 2 downstream USB 2.0
ports. This combo solution leverages SMSC’s innovative
technology that delivers industry-leading data throughput in
mixed-speed USB environments. Average sustained transfer
rates exceeding 35 MB/s are possible

Highlights

 Upstream HSIC port and 2 exposed Hi-Speed USB 2.0

downstream ports for external peripheral expansion

 The dedicated flash media reader is internally attached to a

3rd downstream port of the hub as a USB Compound
Device

— a single or multiplexed flash media reader interface

 PortMap

— Flexible port mapping and port disable sequencing supports

multiple platform designs

 PortSwap

— Programmable USB differential-pair pin locations eases PCB

design by aligning USB signal traces directly to connectors

 PHYBoost

— Programmable USB transceiver drive strength recovers signal

integrity

1.For xD-Picture CardTM support, please obtain a user license
from the xD-Picture Card License Office.

2.Host and media dependent.

TM

TM

®

(MS)

(SD)

(MMC)

TM

(xD)

1

2

.

Datasheet

Features

 Compliance with the following flash media card

specifications SD 2.0 / MMC 4.2 / MS 1.43 / MS-Pro 1.02 /
MS-Pro-HG 1.01 / MS-Duo 1.10 / xD 1.2

 Low-power digital HSIC interface offers a replacement for

onboard host and device connection for analog USB bus
cable

 HSIC interface enables printers, mobile PCs, ultra-mobile

PCs, and cell phone products to reduce the total power
budget while taking full advantage of USB connectivity and
compatibility with existing USB drivers and software

 External 1.2 V reference allows upstream and downstream

HSIC links to use the same voltage reference

 Supports a single external 3.3 V supply source; internal

regulators provide 1.8 V internal core voltage for additional
bill of materials and power savings

 The transaction translator (TT) in the hub supports operation

of Full-Speed and Low-Speed peripherals

 9 K RAM | 64 K on-chip ROM
 Enhanced EMI rejection and ESD protection performance
 Hub and flash media reader/writer configuration from a

single source: External I

— Configures internal code using an external I2C EEPROM
— Supports external code using an SPI Flash EEPROM
— Customizable vendor ID, product ID, and language ID if using

an external EEPROM

 Up to 9 configurable GPIOs for special functions
 The USB4640 supports the commercial temperature range

of 0°C to +70°C

 The USB4640i supports the industrial temperature range of

-40°C to +85°C

 48-pin QFN lead-free, RoHS compliant package (7x7 mm)

Applications

 3G/4G handsets, smartphones, cell phones, and other

mobile devices

 Desktop and mobile PCs
 Printers
 GPS navigation systems
 Media players/viewers
 Consumer A/V
 Set-top boxes

Industrial products

2C®

ROM or external SPI ROM

SMSC USB4640/USB4640i DATASHEET Revision 1.0 (06-01-09)

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

ORDER NUMBERS:

USB4640/USB4640i-HZH for 48-PIN, QFN LEAD-FREE RoHS COMPLIANT PACKAGE

Please contact your local SMSC representative for more information.

Datasheet

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 [phone], FAX [phone]

Copyright © 2009 SMSC or its subsidiaries. All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses withou t prior written approval of an Officer of S MSC and further testing and/or mod ification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.

SMSC makes the following part-num bered device available for purchase only by customers who are xD-Picture Card licensees: USB4640/USB4640i.

By purchasing or ordering any of such devices, Buyer represents, warrants, and agrees that Buyer is a duly licensed Licensee under an xD-Picture CardTM License Agreement
with Fuji Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation; and that Buyer will maintain in effect such xD-Picture Card license and will give SMSC
reasonable advance notice of any termination or expiration of such xD-Picture Card license, but in no event less than five days advance notice. SMSC may discontinue making
such devices available for purchase by Buyer and/or discontinue further deliveries of such devices if such xD-Picture Card license shall expire, terminate, or cease to be in
force, or if Buyer is or becomes in default of such xD-Picture Card license.

SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Revision 1.0 (06-01-09) 2 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Table of Contents

Chapter 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Chapter 2 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Chapter 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Chapter 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Chapter 5 Pin Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.1 48-Pin Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Chapter 6 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6.1 USB4640/USB4640i Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6.2 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.3 Port Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6.4 ROM BOOT Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Chapter 7 Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1 Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Chapter 8 Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.1 Hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.1.1 Hub Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.2 Card Reader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.3 System Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.3.1 EEPROM/SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8.3.2 EEPROM Data Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.4 Set bit 7 of bmAttribute to enable the registers in Table 8.4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.4.1 EEPROM Data Descriptor Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.4.2 A0h-A7h: Device Power Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

8.4.3 Device ID Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.4.4 Hub Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.4.5 Internal Flash Media Controller Extended Configurations . . . . . . . . . . . . . . . . . . . . . . . . 50

8.4.6 I

8.4.7 In-Circuit EEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.5 Default Configuration Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.6.1 Internal POR Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.6.2 External Hardware nRESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

8.6.3 USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

2

C EEPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Chapter 9 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

9.1 Oscillator/Crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

9.2 Ceramic Resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

9.3 External Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

9.3.1 I

9.3.2 USB 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

2

C EEPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Chapter 10 DC Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

10.1 Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

10.2 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

SMSC USB4640/USB4640i 3 Revision 1.0 (06-01-09)

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

10.3 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

10.4 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Chapter 11 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Chapter 12 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

12.1 Tape and Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Revision 1.0 (06-01-09) 4 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

List of Tables

Table 5.1 USB4640/USB4640i 48-Pin Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 6.1 USB4640/USB4640i Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 6.2 USB4640/USB4640i Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 7.1 Legend for Pin Reset States Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 7.2 USB4640/USB4640i Reset States Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 8.1 Internal Flash Media Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 8.2 Hub Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 8.3 Other Internal Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 8.4 Internal Flash Media Controller Extended Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 8.5 Port Map Register for Ports 1 & 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Table 8.6 Port Map Register for Port 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Table 8.7 nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Table 9.1 Crystal Circuit Legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Table 10.1 Pin Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Table 11.1 USB4640/USB4640i GPIO Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

SMSC USB4640/USB4640i 5 Revision 1.0 (06-01-09)

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

List of Figures

Figure 3.1 USB4640/USB4640i 48-Pin QFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 4.1 USB4640/USB4640i Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 6.1 Port Power Control with USB Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 6.2 Port Power Control with a Single Poly Fuse and Multiple Loads . . . . . . . . . . . . . . . . . . . . . . 23

Figure 6.3 Port Power with Ganged Control with Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 6.4 SPI ROM Connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 6.5 I

Figure 7.1 Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 8.1 nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 9.1 Typical Crystal Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 9.2 Capacitance Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 9.3 Ceramic Resonator Usage with SMSC IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Figure 10.1 Supply Rise Time Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Figure 12.1 USB4640/USB4640i 48-Pin QFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Figure 12.2 48-Pin Package Tape Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Figure 12.3 48-Pin Package Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

2

C Connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Revision 1.0 (06-01-09) 6 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Chapter 1 Overview

The SMSC USB4640/USB4640i is a Hi-Speed HSIC USB hub and card reader combo solution with
an upstream port compliant to HSIC 1.0, a supplement to the USB 2.0 specification. The two
downstream ports are compliant with the USB 2.0 specification. In addition, The dedicated flash
media reader/writer is internally attached to a 3rd downstream port of the hub as a USB Compound
device.

High Speed Inter-Chip (HSIC) is a digital interconnect bus that enables the use of USB technology
as a low-power chip-to-chip interconnect at speeds up to 480 Mb/s. Please refer to the “High-Speed
Inter-Chip USB Electrical Specification Revision 1.0 as of September 23, 2007” which can be found
at http://www.usb.org/developers/docs/docs. This combo solution supports today’s popular multi­format flash media cards. This multi-format flash media controller and USB hub combo features two
exposed downstream USB ports available for external peripheral expansion.

The USB4640/USB4640i will attach to an upstream port as a Full-Speed hub or as a Full-/Hi-Speed
hub. The hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a Hi-Speed hub)
downstream devices on all of the enabled downstream ports.

All required resistors on the USB ports are integrated into the hub. This includes all series
termination resistors on D+ and D– pins and all required pull-down and pull-up resistors. The over­current sense inputs for the downstream facing ports have internal pull-up resistors.

The USB4640/USB4640i includes programmable features such as:

PortMap which provides flexible port mapping and disable sequences. The downstream ports of a
USB4640/USB4640i hub can be reordered or disabled in any sequence to support multiple platform
designs with minimum effort. For any port that is disabled, the USB4640/USB4640i automatically
reorders the remaining ports to match the USB host controller’s port numbering scheme.

PortSwap which adds per-port programmability to USB differential­pair pin locations. PortSwap allows direct alignment of USB signals
(D+/D-) to connectors avoiding uneven trace length or crossing of
the USB differential signals on the PCB.

PHYBoost which enables four programmable levels of USB signal
drive strengths in downstream port transceivers. PHYBoost attempts
to restore USB signal integrity. The diagram on the right shows an
example of Hi-Speed USB eye diagrams before (PHYBoost at 0%)
and after (PHYBoost at 12%) signal integrity restoration in a
compromised system environment.

SMSC USB4640/USB4640i 7 Revision 1.0 (06-01-09)

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Hardware Features

 Single chip HSIC hub and flash media controller combo

 USB4640 supports the commercial temperature range of 0°C to +70°C

 USB4640i supports the industrial temperature range of -40°C to +85°C

 Transaction translator (TT) in the hub supports operation of FS and LS peripherals

 Full power management with individual or ganged power control of each downstream port

 Optional support for external firmware access via SPI interface

 Code execution via SPI ROM which must meet

- 30 MHz or 60 MHz operation support

- Single bit or dual bit mode support

- Mode 0 or mode 3 SPI support

Compliance with the following flash media card specifications:

 Secure Digital 2.0 / MultiMediaCard 4.2

- SD 2.0, SD-HS, SD-HC

- TransFlash™ and reduced form factor media

- 1/4/8 bit MMC 4.2

 Memory Stick 1.43

 Memory Stick Pro Format 1.02

 Memory Stick Pro-HG Duo Format 1.01

- Memory Stick, MS Duo, MS-HS, MS Pro-HG, MS Pro

 Memory Stick Duo 1.10

 xD-Picture Card 1.2

 Up to 9 GPIOs: Configuration and polarity for special function use

- The number of actual GPIOs depends on the implementation configuration used

- One GPIO available with up to 200 mA drive and protected “fold-back” short circuit current

 8051 8-bit microprocessor

- 60 MHz - single cycle execution

- 64 KB ROM | 9 KB RAM

 Integrated regulator for 1.8 V core operation

Datasheet

Software Features

 Hub and flash media reader/writer configuration from a single source:

External I

 If the OEM is using an external EEPROM or an external SPI ROM, the following features are

available:

- Customizable vendor ID, product ID, and device ID

- 12-hex digits maximum for the serial number string

- 28-character manufacturer ID and product strings for the flash media reader/writer

Revision 1.0 (06-01-09) 8 SMSC USB4640/USB4640i

2

C ROM or external SPI ROM

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

OEM Selectable Hub Features

A default configuration is available in the USB4640/USB4640i following a reset. The
USB4640/USB4640i may also be configured by an external I

2

C EEPROM or via external SPI ROM

flash.

 Compound Device support on a port-by-port basis

- a port is permanently hardwired to a downstream USB peripheral device

 Select over-current sensing and port power control on an individual or ganged (all ports together)

basis to match the OEM’s choice of circuit board component selection

 Port power control and over-current detection/delay features

 Configure the delay time for filtering the over-current sense inputs

 Configure the delay time for turning on downstream port power

 Bus- or self-powered selection

 Hub port disable or non-removable configurations

 Flexible port mapping and disable sequencing supports multiple platform designs

 Programmable USB differential-pair pin location eases PCB layout by aligning USB signal lines

directly to connectors

 Programmable USB signal drive strength recovers USB signal integrity using 4 levels of signal drive

strength

 Indicate the maximum current that the 2-port hub consumes

 Indicate the maximum current required for the hub controller

SMSC USB4640/USB4640i 9 Revision 1.0 (06-01-09)

DATASHEET

Chapter 2 Acronyms

ACK: Handshake packet (positive acknowledgement)

EOF: End of (micro) Frame

FM: Flash Media

FMC: Flash Media Controller

FS: Full-Speed Device

LS: Low-Speed Device

HS: Hi-Speed Device

2C®

I

: Inter-Integrated Circuit

MMC: MultiMediaCard

MS: Memory Stick

MSC: Memory Stick Controller

OCS: Over-current Sense

PHY: Physical Layer

PLL: Phase-Locked Loop

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

1

RXD: Received eXchange Data

SD: Secure Digital

SDC: Secure Digital Controller

TXD: Transmit eXchange Data

UART: Universal Asynchronous Receiver-Transmitter

UCHAR: Unsigned Character

UINT: Unsigned Integer

Standard Microsystems is a registered trademark and SMSC is a trademark of Standard Microsystems Corporation. Other product and company names
are trademarks or registered trademarks of their respective holders.

*Note: In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC devices made the subject of this
document or to use related SMSC software programs, technical information and licenses under patent and other intellectual property rights from or through
various persons or entities, including without limitation media standard companies, forums, and associations, and other patent holders may be required.
These media standard companies, forums, and associations include without limitation the following: Sony Corporation (Memory Stick, Memory Stick Pro);
SD3 LLC (Secure Digital); MultiMedia Card Association (MultiMediaCard); the SSFDC Forum (SmartMedia); the Compact Flash Association (Compact
Flash); and Fuji Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation (xD-Picture Card). SMSC does not make such licenses or
technical information available; does not promise or re present that any such licenses or technical information will actually be obtainable from or through
the various persons or entities (including the media standard companies, forums, and associations), or with respect to the terms under which they may
be made available; and is not responsible for the accuracy or sufficiency of, or otherwise with respect to, any such technical information.

SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or otherwise, with respect to infringement,
including without limitation any obligations to defend or settle claims, to reimburse for costs, or to pay damages, shall not apply to any of the devices
made the subject of this document or any software programs related to any of such devices, or to any combinations involving any of them, with respect
to infringement or claimed infringe ment of any existing or future patents related to solid state disk or other flash memory technology or applications (“Solid
State Disk Patents”). By making any purchase of any of the devices made the subject of this document, the customer represents, warrants, and agrees
that it has obtained all necessary licenses under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk and other
flash memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses under Solid State Disk Patents;
that the manufacture and testing by or for SMSC of the units of any of the devices made the subject of this document which may be sold to the customer,
and any sale by SMSC of such units to the customer, are valid exercises of the customer's rights and licenses under such Solid State Disk Patents; that
SMSC shall have no obligation for royalties or otherwise under any Solid State Disk Patents by reason of any such manufacture, use, or sale of such
units; and that SMSC shall have no obligation for any costs or expenses related to the customer's obtaining or having obtained rights or licenses under
any Solid State Disk Patents. SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR OTHER

VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES AGAINST
INFRINGEMENT AND THE LIKE.

No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark, copyright, mask work right, trade secret,
or other intellectual property right.

**To obtain this software program the appropriate SMSC Software License Agreement must be executed and in effect. Forms of these Software License
Agreements may be obtained by contacting SMSC.

1.I2C is a registered trademark of Philips Corporation.

Revision 1.0 (06-01-09) 10 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Chapter 3 Pin Configuration

GPIO1 / LED / TXD

nRESET

HSIC_IMP

TEST

VDD12

HSIC_DAT

HSIC_STROBE

XTAL2

XTAL1 (CLKIN)

PLLFILT

RBIAS

VDD33

37

38

39

40

41

42

43

44

45

46

47

48

GPIO2 / RXD34GPIO10 (CRD_PWR)33VDD33

35

36

SD_D3 / MS_D3 / xD_D631GPIO12 / MS_INS30SD_D4 / MS_D2 / xD_D729GPIO14 / xD_nCD28xD_nB/R

SD_D2 / xD_D5

32

SMSC

USB4640/40i

(Top View QFN-48)

Ground Pad

(must be connected to VSS)

1

2

3

4

5

VDD33

USBDN_DP2

USBDN_DM2

USBDN_DP3

USBDN_DM3

PRTCTL26PRTCTL3

xD_nRE26xD_nCE25VDD33

27

24

23

22

21

20

19

18

17

16

15

14

13

7

8

9

10

11

12

SPI_DI

SPI_CE_n

SPI_CLK / GPIO4 / SCL

VDD33

SD_CMD / MS_D0 / xD_CLE

SD_D5 / MS_D1 / xD_ALE

xD_nWE

SD_CLK / MS_BS / xD_nWP

SD_D6 / MS_D7 / xD_D0

SD_D7 / MS_D6 / xD_D1

SD_D0 / MS_D4 / xD_D2

SD_D1 / MS_D5 / xD_D3

VDD33

CRFILT

GPIO15 / SD_nCD

GPIO6 / SD_WP / MS_SCLK / xD_D4

SPI_DO / GPIO5 / SDA / SPI_SPD_SEL

Indicates pins on the bottom of the device.

Figure 3.1 USB4640/USB4640i 48-Pin QFN

SMSC USB4640/USB4640i 11 Revision 1.0 (06-01-09)

DATASHEET

Chapter 4 Block Diagram

8 pins

SPI (4 pins)

GPIO10 (CRD_PWR)

SPI

8051

PROCESSOR

GPIO

GPIOs

PWR_FET0

Program Memory I/O Bus

+ BUS ARBITER

XDATA BRIDGE

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

SD/

SDIO

MMC/

MS

xD*

Flash Media Cards

(require Combo socket)

BUS

INTFC

PROC

AUTO_CBW

CTL

FMDU

BUS

FMI

INTFC

24 MHz

1.8 V

HSIC

1.2 V

MAP

ADDR

SFR

RAM

Serial

Interface

6 K

64 K

RAM

ROM

Controller

EP0 TX

EP0 RX

3 K

RAM

total

EP2 RX

EP2 RX

EP2 TX

BUS

SIE

BRIDGE

INTFC

CTL

support, please obtain a user

TM

license from the xD-Picture Card License office.

*For xD-Picture Card

Port Controller

Crystal

3.3 V

Data & Strobe

PLL

OC Sense/

Serial

Engine

Interface

Translator

Transaction

1.8 V Reg

HSIC

Repeater

HSIC

Impedance

VDDCR

1.8 V Reg

Routing & Port Re-Ordering Logic

OC

Driver

Sense

Switch

Port #2

PHY

OC

Driver

Sense

Switch

Port #3

PHY

Pwr Switch

USB Data

Downstream

OC Sense/

Pwr Switch

USB Data

Downstream

3.3 V

Figure 4.1 USB4640/USB4640i Block Diagram

Revision 1.0 (06-01-09) 12 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Chapter 5 Pin Table

5.1 48-Pin Table

Table 5.1 USB4640/USB4640i 48-Pin Table

UPSTREAM HSIC INTERFACE (3 PINS)

HSIC_IMP HSIC_DAT HSIC_STROBE

DOWNSTREAM USB INTERFACE (3 PINS)

XTAL1 (CLKIN)

USBDN_DP2

USBDN_DP3

SD_D7 /
MS_D6 /

xD_D1

SD_D3 /
MS_D3 /

xD_D6

SD_CLK /

MS_BS /
xD_nWP

XTAL2

DOWNSTREAM 2-PORT USB INTERFACE (6 PINS)

USBDN_DM2 PRTCTL2 PRTCTL3

USBDN_DM3

SECURE DIGITAL / MEMORY STICK / xD INTERFACE (18 PINS)

SD_D6 /
MS_D7 /

xD_D0

SD_D2 /

xD_D5

SD_CMD /

MS_D0 /

xD_CLE

RBIAS

SD_D5 /

MS_D1 /

xD_ALE

SD_D1 /
MS_D5 /

xD_D3

GPIO15 /
SD_nCD

SD_D4 /

MS_D2 /

xD_D7

SD_D0 /

MS_D4 /

xD_D2

GPIO12 /

MS_INS

GPIO6 /

SD_WP /

MS_SCLK /

xD_D4

xD_nRE xD_nCE

SPI_CE_n

SMSC USB4640/USB4640i 13 Revision 1.0 (06-01-09)

GPIO14 /

xD_nCD

SPI INTERFACE (4 PINS)

SPI_CLK /

GPIO4 /

SCL

DATASHEET

xD_nWE xD_nB/R

SPI_DO /

GPIO5 /

SDA /

SPI_SPD_SEL

SPI_DI

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Table 5.1 USB4640/USB4640i 48-Pin Table

MISC (5 PINS)

Datasheet

GPIO1 /

nRESET TEST

LED /

TXD

GPIO10 (CRD_PWR)

POWER (9 PINS)

(6) VDD33 VDD12 CRFILT PLLFILT

TOTAL 48

GPIO2 /

RXD

Revision 1.0 (06-01-09) 14 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Chapter 6 Pin Descriptions

This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface. The pin descriptions below are applied when using the
internal default firmware and can be referenced in Chapter 8, "Configuration Options," on page 28.
Please reference Chapter 2, "Acronyms," on page 10 for a list of the acronyms used.

The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal
is at a low voltage level. When “n” is not present in the signal name, the signal is asserted at a high
voltage level.

The terms assertion and negation are used exclusively. This is done to avoid confusion when working
with a mixture of “active low” and “active high” signals. The term assert, or assertion, indicates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation, indicates that a signal is inactive.

6.1 USB4640/USB4640i Pin Descriptions

Table 6.1 USB4640/USB4640i Pin Descriptions

48-PIN

SYMBOL

HSIC_IMP 39 I HSIC Impedance Control

HSIC_DAT 42 I/O HSIC Data

HSIC_STROBE 43 I/O HSIC Strobe

USBDN_DM

[3:2]

USBDN_DP

[3:2]

QFN

3
1
4
2

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

UPSTREAM HSIC INTERFACE

This pin selects the driver impedance of the HSIC_DAT and
HSIC_STROBE pins.

‘1’ = approximately 50
‘0’ = approximately 40 Ω impedance

This is the bi-directional double data rate (DDR) data signal that is
synchronous to the HSIC_STROBE signal as defined in the High­Speed Inter-Chip USB Specification, Version 1.0.

This pin is the bi-directional data strobe signal that is defined in the
High-Speed Inter-Chip USB Specification, Version 1.0.

DOWNSTREAM USB INTERFACE

I/O-U USB Bus Data

These pins connect to the downstream USB bus data signals and
can be swapped using the PortSwap feature (See Section 8.4.4.20,

"F1h: Port Swap," on page 47).

Ω impedance

SMSC USB4640/USB4640i 15 Revision 1.0 (06-01-09)

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Table 6.1 USB4640/USB4640i Pin Descriptions (continued)

Datasheet

48-PIN

QFN

SYMBOL

PRTCTL[3:2] 7

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

I/OD6PU USB Power Enable

6

As an output, these pins enable power to downstream USB
peripheral devices and have weak internal pull-up resistors. See

Section 6.3, "Port Power Control" for diagram and usage instructions.

As an input, when the power is enabled, these pins monitor the over­current condition. When an over-current condition is detected, the
pins turn the power off.

RBIAS 47 I-R USB Transceiver Bias

A 12.0 k

Ω, ±1.0% resistor is attached from VSS to this pin in order

to set the transceiver's internal bias currents.

XTAL1 (CLKIN) 45 ICLKx 24 MHz Crystal Input or External Clock Input

This pin can be connected to one terminal of the crystal or it can be
connected to an external 24 MHz clock when a crystal is not used.

XTAL2 44 OCLKx 24 MHz Crystal Output

This is the other terminal of the crystal or it is left open when an
external clock source is used to drive XTAL1(CLKIN).

SECURE DIGITAL INTERFACE

SD_D[7:0] 19

I/O8PU Secure Digital Data 7-0
20
23
30

These are the bi-directional data signals SD_D0 - SD_D7 with weak

pull-up resistors.
32
33
17
18

SD_CLK 21 O8 Secure Digital Clock

This is an output clock signal to the SD/MMC device.

SD_CMD 24 I/O8PU Secure Digital Command

This is a bi-directional signal that connects to the CMD signal of the

SD/MMC device. The bi-directional signal has a weak internal pull-

up resistor.

GPIO15 /

14 I/O6 This general purpose pin may be used either as input, edge sensitive

interrupt input, or output. Custom firmware is required to activate this

function.

SD_nCD

I/O8PU Secure Digital Card Detect GPIO

This is a GPIO designated by the default firmware as the Secure

Digital card detection pin and has an internal pull-up.

Revision 1.0 (06-01-09) 16 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Table 6.1 USB4640/USB4640i Pin Descriptions (continued)

SYMBOL

GPIO6 /

48-PIN

QFN

13 I/O6 This general purpose pin may be used either as input, edge sensitive

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

interrupt input, or output. Custom firmware is required to activate this

function.

SD_WP

I/O8 Secure Digital Write Protected GPIO

This is a GPIO designated by the default firmware as the Secure

Digital card interface mechanical write protect detect pin.

MEMORY STICK INTERFACE

MS_BS 21 O8 Memory Stick Bus State

This pin is connected to the bus state pin of the MS device. It is used

to control the Bus States 0, 1, 2, and 3 (BS0, BS1, and BS3) of the

MS device.

GPIO12 /

31 I/O8 This general purpose pin may be used either as input, edge sensitive

interrupt input, or output. Custom firmware is required to activate this

function.

MS_INS

IPU Memory Stick Card Insertion GPIO

This is a GPIO designated by the default software as the Memory

Stick card detection pin and has a weak internal pull-up resistor.

MS_SCLK 13 O8 Memory Stick System Clock

This pin is an output clock signal to the MS device.

MS_D[7:0] 20

I/O8PD Memory Stick System Data In/Out
19
17
18
32
30

These pins are the bi-directional data signals for the MS device. In
serial mode, the most significant bit (MSB) of each byte is
transmitted first by either the memory stick controller MSC or the MS

device on MS_D0.
23
24

MS_D0, MS_D2, and MS_D3 have weak pull-down resistors. MS_D1

has a pull-down resistor if it is in parallel mode. Otherwise, it is

disabled. In 4- or 8-bit parallel modes, all MS_D7 - MS_D0 signals

have weak pull-down resistors.

xD-PICTURE CARD INTERFACE

xD_D[7:0] 30

I/O8PD xD-Picture Card Data 7-0
32
33
13

These pins are the bi-directional data signals xD_D7 - xD_D0 and

have weak internal pull-down resistors.
17
18
19
20

xD_ALE 23 O8PD xD-Picture Card Address Strobe

This pin is an active high Address Latch Enable (ALE) signal for the

xD-Picture Card device. This pin has a weak pull-down resistor that

is permanently enabled.

SMSC USB4640/USB4640i 17 Revision 1.0 (06-01-09)

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Table 6.1 USB4640/USB4640i Pin Descriptions (continued)

Datasheet

48-PIN

QFN

SYMBOL

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

xD_nB/R 28 IPU xD-Picture Card Busy or Data Ready

This pin is connected to the BSY/RDY pin of the xD-Picture Card

device.

When using the internal FET, this pin has an internal weak pull-up

resistor that is tied to the output of the internal power FET.

If an external FET is used (the internal FET is disabled), then the

internal pull-up is not available (an external pull-up is required).

xD_nCE 26 O8PU xD-Picture Card Chip Enable

This pin is an active low chip enable signal for the xD-Picture Card

device.

When using the internal FET, this pin has an internal weak pull-up

resistor that is tied to the output of the internal power FET.

If an external FET is used (internal FET is disabled), then the internal

pull-up is not available (an external pull-up is required).

xD_CLE 24 O8PD xD-Picture Card Command Strobe

This pin is an active high Command Latch Enable signal for the xD-

Picture Card device. This pin has a weak pull-down resistor that is

permanently enabled.

GPIO14 /

29 I/O6 This general purpose pin may be used either as input, edge sensitive

interrupt input, or output. Custom firmware is required to activate this

function.

xD_nCD

I/O8 xD-Picture Card Detection GPIO

This is a GPIO designated by the default firmware as the xD-Picture

Card detection pin and has an internal pull-up.

xD_nRE 27 O8PU xD-Picture Card Read Enable

This pin is an active low read strobe signal for the xD-Picture Card

device.

When using the internal FET, this pin has an internal weak pull-up

resistor that is tied to the output of the internal power FET.

If an external FET is used (internal FET is disabled), then the internal

pull-up is not available (an external pull-up is required).

xD_nWE 22 O8PU xD-Picture Card Write Enable

This pin is an active low write strobe signal for the xD-Picture Card

device.

When using the internal FET, this pin has an internal weak pull-up

resistor that is tied to the output of the internal power FET.

If an external FET is used (internal FET is disabled), then the internal

pull-up is not available (an external pull-up is required).

Revision 1.0 (06-01-09) 18 SMSC USB4640/USB4640i

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Datasheet

Table 6.1 USB4640/USB4640i Pin Descriptions (continued)

48-PIN

QFN

SYMBOL

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

xD_nWP 21 O8PD xD-Picture Card Write Protect

This pin is an active low write protect signal for the xD-Picture Card

device. This pin has a weak pull-down resistor that is permanently

enabled.

SPI INTERFACE

SPI_CE_n 8 O12 SPI Chip Enable

This is the active low chip enable output. If the SPI interface is

enabled, this pin must be driven high in power down states.

SPI_CLK /

9 I/O12 This is the SPI clock out to the serial ROM. See Section 6.4, "ROM

BOOT Sequence" for diagram and usage instructions. During reset,

drive this pin low.

GPIO4 /

I/O6 This pin may be used either as input, edge sensitive interrupt input,

or output. Custom firmware is required to activate this function.

SCL

SPI_DO /

10 I/O12 This is the data out for the SPI port. See Section 6.4, "ROM BOOT

When configured, this is the I

Sequence" for diagram and usage instructions.

2

C EEPROM clock pin.

GPIO5 /

I/O6 This pin may be used either as input, edge sensitive interrupt input,

or output. Custom firmware is required to activate this function.

SDA /

SPI_SPD_SEL

I/O12 This pin is used to select the speed of the SPI interface. During

This pin is the data pin when the device is connected to the optional

2

I

C EEPROM.

nRESET assertion, this pin will be tri-stated with the weak pull-down

resistor enabled. When nRESET is negated, the value on the pin will

be internally latched, and the pin will revert to SPI_DO functionality,

the internal pull-down will be disabled.

‘0’ = 30 MHz (No external resistor should be applied.)

‘1’ = 60 MHz (A 10 K external pull-up resistor must be applied.)

If the latched value is '1', then the pin is tri-stated when the chip is

in the suspend state.

If the latched value is '0', then the pin is driven low during a suspend

state.

SPI_DI 11 I/O12PD This is the SPI data in to the controller from the ROM. This pin has

a weak internal pull-down applied at all times to prevent floating.

MISC

GPIO1 /

37 I/O6 General Purpose I/O

This pin may be used either as input, edge sensitive interrupt input,

or output. Custom firmware is required to activate this function.

LED /

TXD

SMSC USB4640/USB4640i 19 Revision 1.0 (06-01-09)

GPIO1 can be used as an LED output.

This signal can be configured as the TXD output of the internal

UART. Custom firmware is required to activate this function.

DATASHEET

High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller

Table 6.1 USB4640/USB4640i Pin Descriptions (continued)

Datasheet

SYMBOL

GPIO2 /

48-PIN

QFN

36 I/O6 This pin may be used either as input, edge sensitive interrupt input,

BUFFER

TYPE

(Ta bl e 6 .2 )DESCRIPTION

or output. Custom firmware is required to activate this function.

RXD

This signal can be configured as input to the RXD of the internal

UART. Custom firmware is required to activate this function.

GPIO10

35 I/O200 Card power drive: 3.3 V (100 mA or 200 mA)

(CRD_PWR)

This must be the only FET used to power devices. Failure to do this

will violate voltage specifications on device pins. If this pin is not

being used as a card power pin, this pin may be used either as input,

edge sensitive interrupt input, or output (GPIO).

Please see Section 8.4.2.3, "A4h-A5h: Smart Media Device Power

Configuration," on page 38 for more information.

nRESET 38 IS RESET input

The system uses this active low signal to reset the chip. The active

low pulse should be at least 1 μs wide.

TEST 40 I TEST Input

Tie this pin to ground for normal operation.

DIGITAL / POWER / GROUND

CRFILT 15 VDD Core Regulator Filter Capacitor

This pin requires a 1.0 μF (or greater) ± 20% (ESR <0.1

Ω) capacitor

to VSS.

PLLFILT 46 Phase-locked Loop Regulator Filter Capacitor

This pin requires a 1.0 μF (or greater) ± 20% (ESR <0.1Ω) capacitor

to VSS.

VDD12 41 1.2 V Power for HSIC pads and buffers

VDD33 5

3.3 V Power and Regulator Input
12
16
25

Please see Chapter 10, "DC Parameters," on page 56 for more

information.
34
48

Pins 16 and 48 each require an external bypass capacitor of 4.7 μF

minimum.

VSS ePad The ground pad is the only VSS for the device and must be tied to

ground with multiple vias.

Revision 1.0 (06-01-09) 20 SMSC USB4640/USB4640i

DATASHEET