SMSC USB3310 User Manual

USB3310

Hi-Speed USB Transceiver
with 1.8V ULPI Interface ­Multi-Frequency Reference
Clock

PRODUCT FEATURES

 USB-IF “Hi-Speed” compliant to the Universal Serial

Bus Specification Rev 2.0

 Interface compl iant with the ULPI Specification

revision 1.1 as a Single Data Rate (SDR) PHY

 1 .8V IO Voltage (±10%)
 flexPWR

— Low current design ideal for battery powered

— “Sleep” mode tri-states all ULPI pins and places the

 Sup ports FS pre-amble fo r FS hu bs with a LS device

attached (UTMI+ Level 3)

 Sup ports HS SOF and LS keep-alive pulse
 Inclu des full support for the optional On-The-Go

(OTG) protocol detailed in the On-The-Go
Supplement Revision 1.0a specification

 Sup ports the OTG Host Negotiation Protocol (HNP)

and Session Request Protocol (SRP)

 All ows host to turn VBUS off to conserve battery

power in OTG applications

 Sup port OTG mon itoring o f VBUS levels with intern al

comparators

 “Wrapper-less” design for optimal timing performance

and design ease

— Low Latency Hi-Speed Receiver (43 Hi-Speed clocks

 Interna l 5V cable short-circuit protection of ID, DP

and DM lines to VBUS or ground

 1 3, 19.2, 24 or 26MHz Selectable Reference

ClockFrequency

— 0 to 3.6V input drive tolerant
— Able to accept “noisy” clock sources

 Interna l low jitter PLL for 480MHz Hi-Speed USB

operation

 Internal detection of the value of resistance to ground

on the ID pin

 Integra ted battery to 3.3V LDO regulator

— 2.2uF bypass capacitor
— 100mV dropout voltage

TM

Technology

applications

part in a low current state

Max) allows use of legacy UTMI Links with a ULPI
bridge

Data Brief

 Integrated ESD protection circuits

—Up to ±15kV without any external devices

 C arkit UART mode for non-USB serial data transfers
 Ind ustrial Operating Temperature -40°C to +85°C
 Packaging Options

— 24 pin QFN lead-free RoHS compliant package

(4 x 4 x 0.90 mm height)

Applications

The USB3310 is targeted for any application where a Hi­Speed USB connection is desired and when board
space, power, and interface pins must be minimized.

The USB3310 is well suited for:

 C ell Phones
 PDAs
 MP3 Pl ayers
 GPS Persona l Navigation
 Scanners
 Externa l Hard Drives
 D igital Still and Video Cameras
 Po rtable Media Players
 En tertainment Devices
 Printers
 Set Top Boxes
 Video Record/Playback Systems
 IP an d Video Phones
 Gaming Consoles
 POS Terminals

SMSC USB3310 REV C PRODUCT PREVIEW Revision 1.11 (10-31-08)

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

Order Number(s):

USB3310C-CP-TR FOR 24 PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL)

REEL SIZE IS 4000 PIECES.

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 [phone], FAX [phone]

Copyright © 2008 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are includ ed as a means of illustrating typical application s. Consequently, complete information sufficient for

construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual prop erty rights of SMSC or others. All sales are expre ssly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC pr oducts are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal inj ury or severe proper ty
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
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Revision 1.11 (10-31-08) 2 SMSC USB3310 REV C

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

General Description

The USB3310 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems
architectures based on a 13, 19.2, 24 or 26MHz reference clock. The frequency of the reference clock
is selected by configuration. It is designed to be used in both comme rcial and industrial temperature
applications.

The USB3310 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device,
or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3310 al so provides
USB UART mode.

USB3310 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the
Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers
between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte
transfers the ULPI interface requires only 12 pins.

The USB3310 uses SMSC’s “wrapper-less” technology to implement the ULPI interface. This “wrapper­less” technology allows the PHY to achieve a low latency transmit and receive time. SMSC’s low
latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By
adding a bridge to the ASIC the existing and proven UTMI L ink IP can be reused.

REFSEL[1]

REFSEL[0]

REFCLK

Low Jitter

RBIAS

RESETB
VBAT

VDD33
VDD18

STP
NXT
DIR
CLKOUT

VBUS

DP

DM

Integrated

ID

OTG

PLL

BIAS

Integrated

Power

Managem ent

ESD Protection

Hi-Speed

USB

Transceiver

ULPI
Registers
and State

Machine

U LPI In ter fa ce

Carkit

DATA[7:0]

Figure 1 USB3310 Block Diagram

The USB3310 is designed to operate with an external reference clock at one of four frequencies. By
using an available reference, the USB3310 saves the cost of a crystal reference.

The USB3310 includes a integrated 3.3V LDO regulator to generate its own supply from power applied
at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The regulator dropout
voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on
VBA T drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some
parameters may be outside the limits of the USB specifications. If the user would like to provide a 3.3V
supply to the USB3310, the VBAT and VDD33 pins should be connected together.

The USB3310 also includes integrated pull-up resistors that can be used for detecting the attachment
of a USB Charger. By sensing the attachment to a USB Charger, a product using the USB3310 can
charge its battery at more than the 500mA allowed when charging from a USB Host.

SMSC USB3310 REV C 3 Revision 1.11 (10-31-08)

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

USB3310 Pin Locations and Descriptions

Package Diagram with Pin Locations

The pinout below is viewed from the top of the package.

DIR

STP

VDD1.8

REFCLK

23

RESETB

22

21

20

19

18

NXT

17

DATA0

ID

VBUS

RBIAS

24

1
2

Pin Definitions

The following table details the pin definitions for the figure above .

PIN

BALL NAME

VBAT

VDD3.3

DM

DP

3
4
5
6

24Pin QFN

4x4mm

7

8

9

DATA7

DATA5

DATA6

10

DATA4

11

CLKOUT

12

DATA3

16
15
14
13

DATA1
REFSEL[0]
REFSEL[1]
DATA2

Figure 2 USB3310 QFN Pinout - Top View

Table 1 USB3310 Pin Description

DIRECTION/

TYPE

ACTIVE

LEVEL DESCRIPTION

1

B1

ID

Input,

Analog

N/A ID pin of the USB cable. For non-OTG

applications this pin can be floated. For
an A-Device ID is grounded. For a B­Device ID is floated.

2

C1

VBUS

I/O,

Analog

N/A VBUS pin of the USB cable. This pin is

used for the Vbus comparator inputs and
for Vbus pulsing during session request
protocol.

3

VBA T

C2

Revision 1.11 (10-31-08) 4 SMSC USB3310 REV C

Power N/A Regulator input. The regulator supply can

be from 5.5V to 3.1V.

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

Table 1 USB3310 Pin Description (continued)

PIN

BALL NAME

4

D2

5

D1

6

E1

7

E2

8

E3

9

D3

10

E4

11

E5

VDD3.3

DM

DP

DATA[7]

DATA[6]

DATA[5

DATA[4]

CLKOUT

DIRECTION/

TYPE

Power N/A 3.3V Regulator Output. A 2.2uF (<1 ohm

I/O,

Analog

I/O,

Analog

I/O,

CMOS

I/O,

CMOS

I/O,

CMOS

I/O,

CMOS

Output,

CMOS

ACTIVE

LEVEL DESCRIPTION

ESR) bypass capacitor to ground is
required for regulator stability. The
bypass capacitor should be placed as
close as possible to the USB3310.

N/A D- pin of the USB cable.

N/A D+ pin of the USB cable.

N/A

N/A

N/A

N/A

N/A 60MHz reference clock output. All ULPI

ULPI bi-directional data bus. DATA[7] is
the MSB.

ULPI bi-directional data bus.

ULPI bi-directional data bus.

ULPI bi-directional data bus.

signals are driven synchronous to the
rising edge of this clock.

12

D5

13

D4

14

C4

15

B4

16

C5

17

B5

18

A5

DATA[3]

DATA[2]

REFSEL[1]

REFSEL[0]

DATA[1]

DATA[0]

NXT

I/O,

CMOS

I/O,

CMOS

Input,

CMOS

Input,

CMOS

I/O,

CMOS

I/O,

CMOS

Output,

CMOS

N/A

N/A

N/A These signals select one of the available

N/A

N/A

N/A

High The PHY asserts NXT to throttle the data.

ULPI bi-directional data bus.

ULPI bi-directional data bus.

reference frequencies:
[1] [0] Description
0 0 13MHz
0 1 19.2MHz
1 0 26MHz
1 1 24MHz

ULPI bi-directional data bus.

ULPI bi-directional data bus. DATA[0] is
the LSB.

When the Link is sending data to the
PHY, NXT indicates when the cu rrent
byte has been accepted by the PHY. The
Link places the next byte on the data bus
in the following clock cycle.

SMSC USB3310 REV C 5 Revision 1.11 (10-31-08)

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

Table 1 USB3310 Pin Description (continued)

PIN

BALL NAME

19

A4

20

A3

21

B3

22

B2

23

A2

24

A1

DIR

STP

VDD1.8

RESETB

REFCLK

RBIAS

DIRECTION/

TYPE

Output,

CMOS

Input,

CMOS

Power N/A External 1.8V Supply input pin. This pad

Input,

CMOS,

Input,

CMOS

Analog,

CMOS

ACTIVE

LEVEL DESCRIPTION

N/A Controls the direction of the data bus.

When the PHY has data to transfer to the
Link, it drives DIR high to take ownership
of the bus. When the PHY has no data to
transfer it drives DIR low and monitors
the bus for commands from the Link.

High The Link asserts STP for one clock cycle

to stop the data stream currently on the
bus. If the Link is sending data to the
PHY, STP indicates the last byte of d ata
was on the bus in the previous cycle.

needs to be bypassed with a 0.1uF
capacitor to ground, placed as close as
possible to the USB3310.

N/A When low, the part is suspended with all

of the I/O tri-stated. When high the
USB3310 will operate as a normal ULPI
device.

N/A Reference Clock input.The required

frequency is configured by the
REFSEL[1:0] pins.

N/A Rbias pin. This pin requires an 8.06kΩ

(±1%) resistor to ground, placed as close
as possible to the USB3310.

FLAG

C3

GND

Ground N/A Ground.

QFN only: The flag should be connected
to the ground plane with a via array
under the exposed flag. This is the main
ground for the IC.

Revision 1.11 (10-31-08) 6 SMSC USB3310 REV C

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

Application Diagrams

Steady state voltage at the VBUS pin must not be
allowed to exceed V

VMAX

.

R

may be installed in this configuration to

VBUS

assist in protecting the VBUS pin. 820 Ohms
will protect against VBUS transients up to

8.5V. 10K Ohms w ill protect against
transients up to 10V.

3.1-5.5V
Supply

The capacitor C
ins talle d o n t h is s ide of R

Receptacle

USB

VBUS

DM

DP

VBUS

must be

VBUS

1
2
3

.

C

VBUS

SHIELD

GND

C

DC_BLOC K

USB331X

DATA7
DATA6
DATA5

R

VBUS

2

VBUS

DATA4
DATA3
DATA2
DATA1
DATA0

STP
NXT

DIR

3

VBAT

C

BYP

4

VDD3.3

C

OUT

5

DM

6

DP

NC

1

ID

CLKOUT
RESETB

REFCLK

REFSEL[1]
REFSEL[0]

VDD18

RBIAS

7
8

9
10

12
13

16
17

20
18

19
11
22
23

Signal at REFCLK
must comply with
V

and V

IH

IL

14
15

21
24

8.06k

Lin k C on tro lle r

DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
STP
NXT
DIR
CLKOUT
RESETB
Reference

Determines

1.8V Supply

C

BYP

Pin Strap

REFCLK

frequency

GND FLAG

Figure 3 USB3310 QFN Application Diagram (Dev ice)

SMSC USB3310 REV C 7 Revision 1.11 (10-31-08)

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

R

may be installed in this

VBUS

configuration to assist in protecting
the VBUS pin. 820 Ohms will
protect against VBUS transients up
to 8.5V.

VBUS Switch

EN

OUT

IN

5V

The capacitor C
ins talle d o n t h is s id e o f R

USB

Receptacle

VBUS

must be

VBUS

DM

DP

ID

GND

SHIELD

Voltage at the VBUS pin must not be allowed
to exceed V

VMAX

.

Link Controller

CPEN

USB 331X

DATA7
DATA6
DATA5

R

VBUS

2

VBUS

DATA4
DATA3
DATA2
DATA1
DATA0

STP

3.1 - 5.5V
Supply

3

.

VBUS

1
2
3
4

C

BYP

C

VBUS

VBAT

4

VDD3.3

C

OUT

5

DM

6

DP

1

ID

NXT

DIR
CLKOUT
RESETB

REFCLK

REFSEL[1]
REFSEL[0]

VDD18

RBIAS

7
8

9
10
12
13

16
17
20
18

19
11
22
23

Signal at REFCLK
must com ply with

and V

V

IH

IL

14

15

1.8V Supply

21
24

8.06k

DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
STP
NXT
DIR
CLKOUT
RESETB
Reference

Pin Strap

Determines

REFCLK

frequency

C

BYP

GND FLAG

Figure 4 USB3310 QFN Application Diagram (Host or OTG)

Revision 1.11 (10-31-08) 8 SMSC USB3310 REV C

PRODUCT PREVIEW

Revision 1.11 (10-31-08) 9 SMSC USB3310 REV C

Package Outline

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V ULPI Interface - Multi-Frequency Reference Clock

Figure 5 24-Pin QFN, 4x4mm Body, 0.5mm Pitch