SMSC USB2524 User Manual

USB2524
PRODUCT FEATURES
host port connections
— Provides electronic reconfiguration and re-assignment
of any of its 4 downstream ports to either of two upstream host ports (“on-the-fly”).
— Allows multiple USB hosts to share peripherals and
enables a user to dynamically assign host ownership.
– Embedded Mode - 8 (predefined, OEM
programmable) configurations for port assignment are selectable via three external control signals.
– Peripheral Mode - Dedicated select pin for
every downstream port (total of 4), selectable edge or level triggered in order to support a wide range of possible switch configurations and styles.
— Each host has a dedicated Single Transaction
Translator (Single-TT) for supporting FS/LS devices, or can also operate in Multi-TT mode where each downstream port has a dedicated Transaction Translator.
Do wnstream ports can be d isabled or d efine d as non-
removable
Swi tching hub can be configured as compound
device for support of ‘embedded’ USB peripherals
Multiple LED modes for maximum implementation
flexibility
— USB Mode - 2 Single-color LEDs for each downstream
port (total of 8 LEDs).
— Host Ownership Mode - 8 Single-Color LEDs indicate
which upstream host each of the downstream ports are assigned to.
— Host Ownership & Port Speed Mode - 8 Dual-Color
LEDs are used to indicate which upstream host each of the downstream ports are assigned to, while simultaneously indicating downstream port connection speed.
USB MultiSwitch
TM
Hub
Datasheet
En hanced configuration options available through
either a Single Serial I
2
C EEPROM, or SMBus Slave Port — VID/PID/DID — Port Configuration
— String Descriptors (each can support a maximum length
of 31 characters)
– Custom Manufacturer String – Custom Prod uct String – Custom Seri al String
— Assignment of downstream ports to upstream hosts — Switching mechanism selection
H ardware Strapping options allow for configuration
without an external EEPROM or SMBus Host
— Default VID/PID/DID, allows functionality when
configuration EEPROM is absent
C omplete USB Specification 2.0 Compatibility
— Includes USB 2.0 Hi-Speed Transceivers — High-Speed (480Mbits/s), Full-Speed (12Mbits/s) and
Low-Speed (1.5Mbits/s) compatible
— Full power management with choice of Individual or
Ganged power control
On-Boa rd 24MHz Crystal Driver Circuit or 24 MHz
external clock driver
Interna l PLL for 480MHz USB 2.0 Sampling Interna l 1.8V Linear Voltage RegulatorInteg rated USB termination and Pull-up/Pull-down
resistors
Interna l Short Circuit protection of USB differential
signal pins
1 .8 Volt Low Power Core Operation3 .3 Volt I/O with 5V Input Tolerance5 6-Pin QFN Lead-free RoHS Compliant Package
SMSC USB2524 DATASHEET Revision 1.91 (08-22-07)
USB MultiSwitch
TM
Hub
Datasheet
ORDER NUMBER(S):
USB2524-ABZJ for 56-pin QFN Lead-Free RoHS Compliant Package
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a mean s of illustrating typical applications. Conse quently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently da ted version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.91 (08-22-07) 2 SMSC USB2524
DATASHEET
USB MultiSwitch
Datasheet
TM
Hub
Table of Contents
Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.1 OEM Selectable Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Chapter 2 Pin Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 4 Switching Hub Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Chapter 5 Switching Hub Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Chapter 6 Assigning Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Port Assign Interface (PRT_ASSIGN[3:0] pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.1 Embedded Mode: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.2 Peripheral Mode: Level Triggered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1.3 Peripheral Mode: Edge Triggered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.2 SMBus Host Control of Port Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chapter 7 Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1 Switching Hub Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.1 Power Switching Polarity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.2 VBus Detect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.3 Port Assignment Configuration:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.4 Internal Register Set (Common to EEPROM and SMBus) . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.4.1 Register 00h: Vendor ID (LSB) (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.2 Register 01h: Vendor ID (MSB) (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.3 Register 02h: Product ID (LSB) (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.4 Register 03h: Product ID (MSB) (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.5 Register 04h: Device ID (LSB) (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.6 Register 05h: Device ID (MSB) (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1.4.7 Register 06h: CONFIG_BYTE_1 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1.4.8 Register 07h: Configuration Data Byte 2 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1.4.9 Register 08h: Configuration Data Byte 3 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1.4.10 Register 09h: Non-Removable Device (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.1.4.11 Register 0Ah: Port Disable For Self Powered Operation (Reset = 0x00) . . . . . . . . . . . . 26
7.1.4.12 Register 0Bh: Port Disable For Bus Powered Operation (Reset = 0x00) . . . . . . . . . . . . 26
7.1.4.13 Register 0Ch: Max Power For Self Powered Operation (Reset = 0x00) . . . . . . . . . . . . . 26
7.1.4.14 Register 0Dh: Max Power For Bus Powered Operation (Reset = 0x00) . . . . . . . . . . . . . 27
7.1.4.15 Register 0Eh: Hub Controller Max Current For Self Powered Operation (Reset = 0x00) 27
7.1.4.16 Register 0Fh: Hub Controller Max Current For Bus Powered Operation (Reset = 0x00) 27
7.1.4.17 Register 10h: Power-On Time (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1.4.18 Register 11h: Language ID High (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1.4.19 Register 12h: Language ID Low (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1.4.20 Register 13h: Manufacturer String Length (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.4.21 Register 14h: Product String Length (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.4.22 Register 15h: Serial String Length (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.4.23 Register 16h-53h: Manufacturer String (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.4.24 Register 54h-91h: Product String (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.1.4.25 Register 92h-CFh: Serial String (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.1.4.26 Register D0h: Port Interface Delay Timer (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . 29
7.1.4.27 Register D1h: Port Assign Interface Configuration 0A (Reset = 0x00) . . . . . . . . . . . . . . 29
SMSC USB2524 3 Revision 1.91 (08-22-07)
DATASHEET
USB MultiSwitch
TM
Hub
Datasheet
7.1.4.28 Register D2h: Port Assign Interface Configuration 0B (Reset = 0x00) . . . . . . . . . . . . . . 30
7.1.4.29 Register D3h: Port Assign Interface Configuration 0C (Reset = 0x00) . . . . . . . . . . . . . . 30
7.1.4.30 Register D4h: Port Assign Interface Configuration 0D (Reset = 0x00) . . . . . . . . . . . . . . 30
7.1.4.31 Register D5h: Port Assign Interface Configuration 1A (Reset = 0x00) . . . . . . . . . . . . . . 30
7.1.4.32 Register D6h: Port Assign Interface Configuration 1B (Reset = 0x00) . . . . . . . . . . . . . . 31
7.1.4.33 Register D7h: Port Assign Interface Configuration 1C (Reset = 0x00) . . . . . . . . . . . . . . 31
7.1.4.34 Register D8h: Port Assign Interface Configuration 1D (Reset = 0x00) . . . . . . . . . . . . . . 31
7.1.4.35 Register D9h: Port Assign Interface Configuration 2A (Reset = 0x00) . . . . . . . . . . . . . . 31
7.1.4.36 Register DAh: Port Assign Interface Configuration 2B (Reset = 0x00) . . . . . . . . . . . . . . 32
7.1.4.37 Register DBh: Port Assign Interface Configuration 2C (Reset = 0x00) . . . . . . . . . . . . . . 32
7.1.4.38 Register DCh: Port Assign Interface Configuration 2D (Reset = 0x00). . . . . . . . . . . . . . 32
7.1.4.39 Register DDh: Port Assign Interface Configuration 3A (Reset = 0x00) . . . . . . . . . . . . . . 32
7.1.4.40 Register DEh: Port Assign Interface Configuration 3B (Reset = 0x00) . . . . . . . . . . . . . . 33
7.1.4.41 Register DFh: Port Assign Interface Configuration 3C (Reset = 0x00) . . . . . . . . . . . . . . 33
7.1.4.42 Register E0h: Port Assign Interface Configuration 3D (Reset = 0x00) . . . . . . . . . . . . . . 33
7.1.4.43 Register E1h: Port Assign Interface Configuration 4A (Reset = 0x00) . . . . . . . . . . . . . . 33
7.1.4.44 Register E2h: Port Assign Interface Configuration 4B (Reset = 0x00) . . . . . . . . . . . . . . 34
7.1.4.45 Register E3h: Port Assign Interface Configuration 4C (Reset = 0x00) . . . . . . . . . . . . . . 34
7.1.4.46 Register E4h: Port Assign Interface Configuration 4D (Reset = 0x00) . . . . . . . . . . . . . . 34
7.1.4.47 Register E5h: Port Assign Interface Configuration 5A (Reset = 0x00) . . . . . . . . . . . . . . 34
7.1.4.48 Register E6h: Port Assign Interface Configuration 5B (Reset = 0x00) . . . . . . . . . . . . . . 35
7.1.4.49 Register E7h: Port Assign Interface Configuration 5C (Reset = 0x00) . . . . . . . . . . . . . . 35
7.1.4.50 Register E8h: Port Assign Interface Configuration 5D (Reset = 0x00) . . . . . . . . . . . . . . 35
7.1.4.51 Register E9h: Port Assign Interface Configuration 6A (Reset = 0x00) . . . . . . . . . . . . . . 35
7.1.4.52 Register EAh: Port Assign Interface Configuration 6B (Reset = 0x00) . . . . . . . . . . . . . . 36
7.1.4.53 Register EBh: Port Assign Interface Configuration 6C (Reset = 0x00) . . . . . . . . . . . . . . 36
7.1.4.54 Register ECh: Port Assign Interface Configuration 6D (Reset = 0x00) . . . . . . . . . . . . . . 36
7.1.4.55 Register EDh: Port Assign Interface Configuration 7A (Reset = 0x00) . . . . . . . . . . . . . . 36
7.1.4.56 Register EEh: Port Assign Interface Configuration 7B (Reset = 0x00) . . . . . . . . . . . . . . 37
7.1.4.57 Register EFh: Port Assign Interface Configuration 7C (Reset = 0x00) . . . . . . . . . . . . . . 37
7.1.4.58 Register F0h: Port Assign Interface Configuration 7D (Reset = 0x00) . . . . . . . . . . . . . . 37
7.1.4.59 Register F1h: Port Assignment 1 & 2 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.1.4.60 Register F2h: Port Assignment 3 & 4 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.1.4.61 Register F3h: Port Assignment 5 & 6 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.1.4.62 Register F4h: Port Assignment 7 (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.1.4.63 Register F5h: Port Lockout (Reset = 0x00). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.1.4.64 Register FFh: Status/Command (Reset = 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7.2 EEPROM Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.1 I2C Master. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.1.1 Implementation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.1.2 Pull-Up Resistor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.1.3 I2C EEPROM Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.2.2 In-Circuit EEPROM Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.3 SMBus Slave Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.3.1 Bus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.3.1.1 Block Read/Write. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.3.2 Invalid Protocol Response Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.3 General Call Address Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.4 Slave Device Time-Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.5 Stretching the SCLK Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.6 SMBus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.3.7 Bus Reset Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.3.8 SMBus Alert Response Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.3.8.1 Undefined Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.3.8.2 Reserved Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Revision 1.91 (08-22-07) 4 SMSC USB2524
DATASHEET
USB MultiSwitch
Datasheet
7.4 Default Strapping Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7.5 Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TM
Hub
Chapter 8 LED Interface Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.1 USB Mode: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2 Basic Host Owner LED Indication: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.3 Host Ownership and Port Speed LED Indication:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Chapter 9 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9.1 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9.1.1 External Hardware RESET_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9.1.1.1 RESET_N for Strapping Option Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.1.1.2 RESET_N for EEPROM Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.1.1.3 RESET_N for SMBus Slave Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
9.1.2 USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Chapter 10 XNOR Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Chapter 11 DC Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.1 Maximum Guaranteed Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.1.1 DC Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Chapter 12 AC Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
12.1 Oscillator/Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
12.1.1 SMBus Interface:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
12.1.2 I2C EEPROM: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
12.1.3 USB 2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Chapter 13 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
SMSC USB2524 5 Revision 1.91 (08-22-07)
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List of Figures
Figure 3.1 USB2524 QFN-56 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5.1 USB2524 Switching Hub Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 7.1 SMBus Block Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 7.2 SMBus Block Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 7.3 LED Strapping Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 8.1 Dual Color LED Implementation Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 9.1 Reset_N Timing for Default/Strap Option Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 9.2 Reset_N Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 9.3 Reset_N Timing for SMBus Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 1 3. 1 USB2524 56-Pin QFN Package Outline and Paramete r s . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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List of Tables
Table 2.1 USB2524 56-Pin QFN Pin Configuration Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4.1 Switching Hub Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 4.2 SMBus or EEPROM Interface Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4.3 Miscellaneous Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4.4 Power, Ground, and No Connect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4.5 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6.1 USB2524 Port Assign Interface (Embedded Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 7.1 Internal EEPROM & SMBus Register Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 9.1 Reset_N Timing for Default/Strap Option Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 9.2 Reset_N Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 9.3 Reset_N Timing for SMBus Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 11.1 DC Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
SMSC USB2524 7 Revision 1.91 (08-22-07)
DATASHEET

Chapter 1 General Description

The SMSC 4-Port USB 2.0 Switching Hub Controller acts as two independently controllable USB 2.0 Hubs in a single package with the ability to electronically reassign and reconfigure any of its 4 downstream ports to either of its two upstream USB ports. This allows two USB hosts to share peripherals and to dynamically reconfigure them.
Any configuration of the downstream ports is possible except simultaneous connection to both upstream ports. Up to 8 different configurations can be selected by a dedicated 3-pin interface, or the 4-pin interface can be used to directly assign each port to either of the upstream hosts. An external serial EEPROM (or SMBus Host) is used to store the 8 different configuration parameters. However, 8 predefined configurations, as well as generic VID/PID/DID information, are provided as defaults if no external Serial EEPROM is detected at power up. The SMBus interface can be used to configure the hub as well as dynamically re-assigning downstream ports to upstream hosts. The SMBus interface can be “live” while the hub is operational, and allows an external SMBus host to have full access to re-assign ports on an as-needed basis.
The SMSC 4-Port Switching Hub is fully compliant with the USB 2.0 Specification and will attach to either or both upstream USB hosts as a Full-Speed Hub or as a Full-/High-Speed Hub. The 4 downstream Hub ports support Low-Speed, Full-Speed, and High-Speed (if operating as a High-Speed Hub) downstream devices on all of the enabled downstream ports.
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A USB peripheral or USB Hub that is attached to one of the downstream USB2524 ports will be available to one or the other of the upstream USB host controllers, but can never be simultaneously shared with both host controllers. The user can switch a peripheral from one host to the other (on-the­fly), and the peripheral will automatically detach from one host and a ttach to the other host. Each host will only configure and control the downstream ports that are assigned to it, including full USB power management and suspend/resume operations.
The USB2524 works with an external USB power distribution switch device to con trol V to downstream ports, and to limit current and sense over-current conditions.
All required resistors on the USB ports are integrated into the Hub. This includes all seri es termination resistors on D+ and D– pins and all require d pull-down and pull-up resistors on D+ and D– pins. The over-current sense inputs for the downstream facing ports have internal pull-up resistors.
Throughout this document the upstream facing port of the hub will be referred to as the upstream port, and the downstream facing ports will be called the downstream ports.
For performance reasons, the Hub provides 1 Transaction Translator (TT) per port (defined as Multi­TT configuration), and each TT has 1512 bytes of periodic buffer space and 272 Bytes of non- periodic buffer space (divided into 4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for each Transaction Translator.
When configured as a Single-TT Hub (required by USB 2.0 Specification), the Single Transaction Translator will have 1512 bytes of periodic buffer space and 272 bytes of non-periodic buffer space (divided into 4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for the entire Transaction Translator.
switching
BUS
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1.1 OEM Selectable Features

A default configuration is available in the USB2524 following a reset. This configuration may be sufficient for some applications. Strapping option pins make it possible to modify a limited sub-set of the configuration options.
The USB2524 may also be configured by an external EEPROM or a microcontroller. When using the microcontroller interface, the Hub appears as an SMBus slave device. If the Hub is pin-strapped for external EEPROM configuration but no external EEPROM is present, then a value of ‘0’ will be written to all configuration data bit fields (the hub will attach to the ho st with all ‘0’ values).
The USB2524 supports several OEM selectable features:
Optional OEM configuration via I2C EEPROM or via the industry standard SMBus interface from
an external SMBus Host or Microcontroller.
Compound device support (port is permanently hardwired to a down strea m USB perip heral device).Hardware strapping options enable configuration of the followin g features (when not configu red via
an EEPROM or SMBus host). Non-Removable Ports Port Power Polarity (active high or active low logic)
Selection of Single (STT) or Multi-Transaction Translator (MTT) capability.Selection of Over-Current sensing a nd Port power control on a individual (port-b y-port) or ganged
(all ports together) to match the OEM’s choice of circuit board component selection.
Selection of end-user method of switching ports between hosts
-Embedded Mode: 8 default configurations that are controlled by OEM programmable registers (or Internal default settings).
-Peripheral Mode: Each wire directly controls one of the 4 downstream ports. The interface is selectable between edge triggered operation or level triggered operation for compatibility with many different mechanical switch configurations or direct control from an external Microcontroller ’s GPIO pins.
Enablement of String Descriptor Support, along with the capability to customize each of the 3
different string descriptors (up to a maximum size of 31 characters each)
Selection of LED Mode: USB Mode, Host Ownership Mode, or Host Ownersh ip Mode with Speed
Indication.
SMSC USB2524 9 Revision 1.91 (08-22-07)
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Chapter 2 Pin Layout

T able 2.1 USB2524 56-Pin QFN Pin Configuration Table

UPSTREAM USB 2.0 INTERFACES (6 PINS)
USBUP_DP1 USBUP_DM1 USBUP_DP2 USBUP_DM2 VBUS_DET1 VBUS_DET2
DOWNSTREAM 4-PORT USB 2.0 INTERFACE (30 PINS)
USBDN_DP1 USBDN_DM1 USBDN_DP2 OCS1_N USBDN_DP3 USBDN_DM3 USBDN_DM2 OCS2_N
LED_A1_N/NON_REM0 LED_A2_N/NON_REM1 LED_A3_N/PRT_DIS0 OCS3_N
LED_B1_N LED_B2_N LED_B3_N PRT_ASSIGN0 PRTPWR1 PRTPWR2 PRT_ASSIGN1 PRTPWR_POL
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PRTPWR3 RBIAS PRT_ASSIGN2 LED_A4_N/PRT_DIS1
USBDN_DM4 USBDN_DP4 PRTPWR4 PRT_ASSIGN3
LED_B4_N OCS4_N
SERIAL PORT INTERFACE (4 PINS)
SDA/SMBDATA SCL/SMBCLK/
CFG_SEL0
MISC (5 PINS)
XTAL1/CLKIN XTAL2 RESET_N SELF_PWR
TEST
ANALOG POWER & GROUND (5 PINS)
VDDPLL18(1)
DIGITAL POWER, GROUND & NO CONNECT (6 PINS)
VDD33(3) VDDCR18(2) NC
VDDA33(4)
TOTAL (56 PINS)
CFG_SEL1 CFG_SEL2
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Chapter 3 Pin Configuration

41 PRT_ASSIGN0
40 PRT_ASSIGN1
39 PRT_ASSIGN2
38 PRT_ASSIGN3
37 VDD33
36 SELF_PWR
SMSC
LED_B4_N 43
RESET_N 44 VBUS_DET1 45 VBUS_DET2 46
VDDA33 47
USBUP_DP2 48
USBUP_DM2 49
VDDCR18 50
XTAL2 51
XTAL1/CLKIN 52
VDDPLL18 53
VDD33 54
NC 55
RBIAS 56
42 LED_A4_N/PRT_DIS1
USB2524
(Top View QFN-56)
thermal slug connects to VSS
35 CFG_SEL2
34 CFG_SEL1
32 SDA/SMBDATA
31 LED_B1_N
29 LED_B2_N
33 SCL /S MBCLK/CFG_SEL0
30 LED_A 1_N/NON_REM0
28 LED_A2_N/NON_REM1 27 PRTPWR1 26 OCS1_N 25 OCS2_N 24 PRTPWR2 23 PRTPWR3 22 OCS3_N 21 OCS4_N 20 PRTPWR4 19 PRTPWR_POL 18 TEST 17 VDD33 16 VDDCR18 15 LED_B3_N
VDDA33 1
USBUP_DP1 2
USBUP_DM1 3
VDDA33 6
USBDN_DP1 5
USBDN_DM1 4
USBDN_DP2 7
USBDN_DM2 8
VDDA33 11
USBDN_DP3 10
USBDN_DM3 9
USBDN_DP4 12
USBDN_DM4 13
LED_A3_N/PRT_DIS0 14

Figure 3.1 USB2524 QFN-56

SMSC USB2524 11 Revision 1.91 (08-22-07)
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Chapter 4 Switching Hub Pin Descriptions

Table 4.1 Switching Hub Pin Descriptions

NAME SYMBOL TYPE FUNCTION
UPSTREAM USB 2.0 INTERFACE
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USB Bus Data USBUP_DP[2:1]
Detect Upstream
VBUS Power
High-Speed USB
Data
USB Power
Enable
Port 4:3 Green
LED
&
Port Disable
strapping option 0
USBUP_DM[2:1]
VBUS_DET[2:1] I/O Detects state of Upstream VBUS power. The SMSC Hub
USBDN_DP[4:1] USBDN_DM[4:1]
PRTPWR[4:1] O Enables power to U SB peripheral devices (downstream).
LED_A[4:3]_N/
PRT_DIS[1:0]
IO-U These pins connect to the upstream USB bus data signals.
monitors VBUS_DET to determine when to assert the internal D+ pull-up resistor (signalling a connect event).
When designing a detachable hub, this pin must be connected to the VBUS power pin of the USB port that is upstream of the hub. (Use of a weak pull-down resistor is recommended.)
For self-powered applications with a permanently attached host, this pin must be pulled-up to either 3.3V or 5.0V (typically VDD33).
4-PORT USB 2.0 HUB INTERFACE
IO-U These pins connect to the downstream USB peripheral
devices attached to the Hub’s ports.
The active signal level of the PRTPWR[4] pin is determined by the Power Polarity Strapping function of the PRTPWR_POL pin.
I/O12 Green indicato r LED for ports 4 and 3. Will be active low
when LED support is enabled via EEPROM or SMBus. See PRT_DIS1 function description if the hub is configured by the internal default configuration.
Port Disable
strapping option 1
Revision 1.91 (08-22-07) 12 SMSC USB2524
PRT_DIS1 I/O12 If the hub is co nfigured by th e interna l default configuration ,
PRT_DIS[1:0] will be sampled at RESET_N negation to determine if ports [4:2] will be permanently disabled. Also, the active state of LED_A3_N will be determined as follows:
PRT_DIS[1:0] = '00', All ports are enabled, LED_A4_N is active high, LED_A3_N is active high.
PRT_DIS[1:0] = '01', Port 4 is disabled, LED_A4_N is active high, LED_A3_N is active low.
PRT_DIS[1:0] = '10', Ports 4 & 3 are disabled, LED_A4_N is active low, LED_A3_N is active high.
PRT_DIS[1:0] = '11', Ports 4, 3 & 2 are disabled, LED_A4_N is active low, LED_A3_N is active low.
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Table 4.1 Switching Hub Pin Descriptions (continued)
NAME SYMBOL TYPE FUNCTION
Port [2:1] Green
LED
&
Port Non-
Removable
strapping option
Enhanced Port
LED Indicators
LED_A[2:1]_N/
NON_REM[1:0]
I/O12 Green indicato r LED for ports 2 and 1. Will be active low
when LED support is enabled via EEPROM or SMBus. If the hub is configured by the internal default configuration,
these pins will be sampled at RESET_N negation to determine if ports [3:1] contain permanently attached (non­removable) devices. Also, the active state of the LED's will be determined as follows:
NON_REM[1:0] = '00', All ports are removable, LED_A2_N is active high, LED_A1_N is active high.
NON_REM[1:0] = '01', Port 1 is non-removable, LED_A2_N is active high, LED_A1_N is active low.
NON_REM[1:0] = '10', Ports 1 & 2 are non-removable, LED_A2_N is active low, LED_A1_N is active high.
NON_REM[1:0] = '11', Ports 1, 2, & 3 are non-removable, LED_A2_N is active low, LED_A1_N is active low.
LED_B[4:1]_N I/O12 T hese 4 pins in conjunction with the LED_A[4:1]_N pins
provides a total of 8 LED pins which are used to indicate upstream host ownership of the downstream ports.
2 operational modes are available Single Color LED Mode: LED will light to show which host
owns each of the downstream ports. If a port is “unassigned” then neither LED for that port will light up.
Port Power
Polarity strapping
Over Current
Sense
USB Transceiver
Bias
Dual Color LED’s: (note; 4 possible states are displayed to the user, Green, Red, Orange and Off).
PRTPWR_POL I/O Port Power Polarity strapping determination for the active
signal polarity of the PRTPWR[4:1] pins. While RESET_N is asserted, the logic state of this pin will
(through the use of internal combinatorial logic) dete rmine the active state of the PRTPWR[4:1] pins in order to ensure that downstream port power is not inadvertently enabled to inactive ports during a hardware reset.
When RESET_N is negated, the logic value will be latched internally, and will retain the active signal polarity for the PRTPWR[4:1] pins.
‘1’ = PRTPWR[4:1] pins have active ‘high’ polarity ‘0’ = PRTPWR[4:1] pins have active ‘low’ polarity
Warning: Active Low port power controllers may glitch the downstream port power when system power is first applied. Care should be taken when designing with active low components!
OCS[4:1]_N IPU Input from external current monitor indicating an over-
current condition. {Note: Contains internal pull-up to 3.3V supply}
RBIAS I-R A 12.0kΩ (+/− 1%) resistor is attached from ground to this
pin to set the transceiver’s internal bias settings.
SMSC USB2524 13 Revision 1.91 (08-22-07)
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Table 4.1 Switching Hub Pin Descriptions (continued)
NAME SYMBOL TYPE FUNCTION
Assign
Downstream
Ports to Upstream
Host Ports
Serial Data/SMB
Data
Serial Clock/SMB
Clock
&
Configuration Programming
Select
Configuration Programming
Select
Configuration Programming
Select
PRT_ASSIGN
[3:0]
I Port Assign Interface: Operates in either Embedded mode,
or Peripheral mode. See Chapter 6, Assigning Ports for additional details.
SERIAL PORT INTERFACE
SDA/SMBDATA IOSD12 (Serial Data)/(SMB Data) signal.
SCL/SMBCLK/
IOSD12 (Serial Clock)/(SMB Clock) signal.
CFG_SEL0
CFG_SEL0: The logic state of this multifunction pin is internally latched on the rising edge of RESET_N (RESET_N negation), and will determine the hub configuration method as described in Table 4.2.
CFG_SEL1 I The logic state of this pin is internally latched on the rising
edge of RESET_N (RESET_N negation), and will determine the hub configuration method as described in Table 4.2.
CFG_SEL2 I The logic state of this pin is internally latched on the rising
edge of RESET_N (RESET_N negation), and will determine the hub configuration method as described in Table 4.2.

Table 4.2 SMBus or EEPROM Interface Behavior

NAME NAME NAME FUNCTION
CFG_SEL2 CFG_SEL1 CFG_SEL0 SMBus or EEPROM interface behavior.
0 0 0 Internal Default Configuration
PRT_ASSIGN[3:0] = Embedded Mode.Strap options on pins LED_A[4:1]_N are enabled.LED Mode = USB Mode
0 0 1 Configured as an SMBus slave for external download of
user-defined descriptors.
SMBus slave address is :0101100Strap options on pins LED_A[4:1]_N are disabledLED Mode = See C hapter 8, LED Interface Description
0 1 0 Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Level Triggered)Strap options on pins LED_A[4:1]_N are enabled.No support for un assigned Ports.LED Mode = USB Mode
0 1 1 2-wire (I2C) EEPROMS are supported,
LED Mode = See C hapter 8, LED Interface Description
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Table 4.2 SMBus or EEPROM Interface Behavior (continued)
NAME NAME NAME FUNCTION
1 0 0 Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered)LED Mode = Host Ownershi p ModeStrap options on pins LED_A[4:1]_N are enabled.Supports unassigned Ports
1 0 1 Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered)LED Mode = Host Ownershi p & Port Speed ModeStrap options on pins LED_A[4:1]_N are disabledSupports unassigned Ports.
110Reserved 111Reserved

Table 4.3 Miscellaneous Pins

NAME SYMBOL TYPE FUNCTION
Crystal
Input/External
Clock Input
XTAL1/
CLKIN
ICLKx
24MHz crystal or external clock input.
This pin connects to either one terminal of the crystal or to an external 24MHz clock when a crystal is not used.
Note: See Table 11.1 for the required logic voltage
levels of this pad if it will be driven by an external clock source.
Crystal Output XTAL2 OCLKx
24MHz Crystal
This is the other terminal of the crystal, or left unconnected when an external clock source is used to drive XTAL1/CLKIN. It must not be used to drive any external circuitry other than the crystal circuit.
RESET Input RESET_N IS This active low signal is used by the system to reset the
chip. The minimum active low pulse is 1us.
Self-Power /
Bus-Power
Detect
SELF_PWR I Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub gets all power from Upstream USB VBus). High = Self/local power source is available.
TEST Pin TEST IPD Used for testing th e chip. User must treat as a no-
connect or connect to ground.

Table 4.4 Power, Ground, and No Connect

NAME SYMBOL TYPE FUNCTION
VDD Core VDDCR18 +1.8V core power.
Pins 16 and 50 must have a 4.7μF (or greater) ±20% (ESR <0.1Ω) capacitor to VSS
VDDIO 3.3V VDD33 +3.3V Power Supply for the Digital I/O.
SMSC USB2524 15 Revision 1.91 (08-22-07)
DATASHEET
Ta b le 4.4 Power, Ground, and No Connect (continued)
NAME SYMBOL TYPE FUNCTION
VDD PLL VDDPLL18 +1.8V Filtered analog power for internal PLL.
This pin must have a 4.7μF (or greater) ±20% (ESR <0.1Ω) capacitor to VSS
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Hub
VDD Analog
I/O
VDDA33 +3.3V Filtered analog PHY power, shared between
adjacent ports.
VSS VSS Ground
NC NC No Connect

Table 4.5 Buffer Type Descriptions

BUFFER DESCRIPTION
I Input. IPD Input, Weak Internal pull-down. IPU Input, Weak Internal pull-up.
IS Input with Schmitt trigger.
IOSD12 Open drain….12mA sink with Schmitt trigger, and must meet I2C-Bus Specification Version 2.1
requirements.
ICLKx XTAL Clock Input
OCLKx XTAL Clock Output
I-R RBIAS
IO-U Defined in USB Specification.
Note: Meets USB 1.1 requirements when operating as a 1.1-complia nt device and meets
USB 2.0 requirements when operating as a 2.0-compliant device.
AIO Analog Input/output. Per PHY test require ments.
Revision 1.91 (08-22-07) 16 SMSC USB2524
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Chapter 5 Switching Hub Block Diagram

To
Upstream USB Data
Upstream
PHY
Repeater
Dow nstream
PHY #1
EEPROM
1.8V Cap
TT#1TT#2TT#3TT
Routing Logic Routing Logic
Switch Driver
LED Drivers
3.3V
1.8V Reg.
Port #1
OC Sense
Upstream
V
ControllerSIE
#4
Controller
Dow nstream
PHY #2
V
BUS
Power
BUS
Detect
Port
Switching Logic
Port #2
OC Sense
Switch Driver
LED Drivers
Pin
Strapping
Options
Inte r n a l
De fa u lts
Select
or SMBus
Master
SCL SD
Serial
Interface
Controller SIE
Port
Controller
Down stream
PHY #3
TT #4
Port #3
OC Sense
Switch Driver
LED Drivers
24 MH z
Crystal
PLL
TT
#3
TT
TT
#1
#2
Dow nstream
PHY #4
Upstream USB Data
Upstream
PHY
Repeater
DATASHEET
Port
Assign
[3:0 ]
Port #4
OC Sense
Switch Driver
LED Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
Downstream
USB DataOCSense

Figure 5.1 USB2524 Switching Hub Block Diagram

Switch/LED
Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
SMSC USB2524 17 Revision 1.91 (08-22-07)

Chapter 6 Assigning Ports

There are two different (OEM selectable) methods of assigning downstream ports to upstream hosts. One method is with the PRT_ASSIGN[3:0] interface through the use of mechanical switches or by electrical control of the pins via an external Microcontroller ’s GPIO interface. The second method is through the SMBus interface, where the SMBus interface is used to control the switching hub during operation and can switch downstream ports via SMBus commands.

6.1 Port Assign Interface (PRT_ASSIGN[3:0] pins)

Assigning ports to either of the upstream host controllers can be accomplished through the 4-wire PRT_ASSIGN interface. The PRT_ASSIGN interface has three operating modes. One is called the Embedded Mode, and the other is Peripheral Mode (with two different electrical “sub” modes; (level triggered or edge triggered).
Note: Any change in PRT_ASSIGN pins will be ignored until the USB2524 is out of reset.

6.1.1 Embedded Mode:

The four-pin interface (PRT_ASSIGN[3:0]) operates with only three of the four available pins (PRT_ASSIGN3 is disabled in this mode), which enables a user to select one of 8 pre-determined port assignment configurations. There are 8 “default” configurations, or an OEM can customize the configurations through an EEPROM or SMBus code load.
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Note: There i s a switching delay determined by the Register D0h: Port Interface Delay Timer. The configuration is determined by Table 6.1, "USB2524 Port Assign Interface (Embedded Mode)".
Table 6.1 USB2524 Port Assign Interface (Embedded Mode)
INTERNAL DEFAULT
CONFIGURATION
PORT ASSIGN INTERFACE ENCODING
PRT_ASSIGN3PRT_ASSIGN2PRT_ASSIGN1PRT_ASSIGN0CONFIG #PORT1PORT2PORT3PORT
X 0 0 0 0 H1H1H1H1 X 0 0 1 1 H2H2H2H2 X 0 1 0 2 H1H1H2H2 X 0 1 1 3 H1H1H1H2 X 1 0 0 4 H2H2H2H1 X 1 0 1 5 H2H1H1H1 X1106H1H1H2UA X1117H1H1H1UA
HOST OWNERSHIP OF DOWNSTREAM PORTS
4
Note 6.1 H1 = The USB host or hub that is connected to upstream port #1 Note 6.2 H2 = The USB host or hub that is connected to upstream port #2 Note 6.3 UA = Un-Assigned
Revision 1.91 (08-22-07) 18 SMSC USB2524
DATASHEET
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