USB 2 .0 Compatible 4-Port Hub with two upstream
host port connections
— Provides electronic reconfiguration and re-assignment
of any of its 4 downstream ports to either of two
upstream host ports (“on-the-fly”).
— Allows multiple USB hosts to share peripherals and
enables a user to dynamically assign host ownership.
– Embedded Mode - 8 (predefined, OEM
programmable) configurations for port
assignment are selectable via three external
control signals.
– Peripheral Mode - Dedicated select pin for
every downstream port (total of 4), selectable
edge or level triggered in order to support a
wide range of possible switch configurations
and styles.
— Each host has a dedicated Single Transaction
Translator (Single-TT) for supporting FS/LS devices, or
can also operate in Multi-TT mode where each
downstream port has a dedicated Transaction
Translator.
Do wnstream ports can be d isabled or d efine d as non-
removable
Swi tching hub can be configured as compound
device for support of ‘embedded’ USB peripherals
Multiple LED modes for maximum implementation
flexibility
— USB Mode - 2 Single-color LEDs for each downstream
which upstream host each of the downstream ports are
assigned to.
— Host Ownership & Port Speed Mode - 8 Dual-Color
LEDs are used to indicate which upstream host each of
the downstream ports are assigned to, while
simultaneously indicating downstream port connection
speed.
USB MultiSwitch
TM
Hub
Datasheet
En hanced configuration options available through
either a Single Serial I
2
C EEPROM, or SMBus Slave
Port
— VID/PID/DID
— Port Configuration
— String Descriptors (each can support a maximum length
of 31 characters)
– Custom Manufacturer String
– Custom Prod uct String
– Custom Seri al String
— Assignment of downstream ports to upstream hosts
— Switching mechanism selection
H ardware Strapping options allow for configuration
without an external EEPROM or SMBus Host
— Default VID/PID/DID, allows functionality when
configuration EEPROM is absent
C omplete USB Specification 2.0 Compatibility
— Includes USB 2.0 Hi-Speed Transceivers
— High-Speed (480Mbits/s), Full-Speed (12Mbits/s) and
Low-Speed (1.5Mbits/s) compatible
— Full power management with choice of Individual or
Ganged power control
On-Boa rd 24MHz Crystal Driver Circuit or 24 MHz
external clock driver
Interna l PLL for 480MHz USB 2.0 Sampling
Interna l 1.8V Linear Voltage Regulator
Integ rated USB termination and Pull-up/Pull-down
resistors
Interna l Short Circuit protection of USB differential
signal pins
1 .8 Volt Low Power Core Operation
3 .3 Volt I/O with 5V Input Tolerance
5 6-Pin QFN Lead-free RoHS Compliant Package
SMSC USB2524DATASHEETRevision 1.91 (08-22-07)
USB MultiSwitch
TM
Hub
Datasheet
ORDER NUMBER(S):
USB2524-ABZJ for 56-pin QFN Lead-Free RoHS Compliant Package
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently da ted
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
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damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
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SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
The SMSC 4-Port USB 2.0 Switching Hub Controller acts as two independently controllable USB 2.0
Hubs in a single package with the ability to electronically reassign and reconfigure any of its 4
downstream ports to either of its two upstream USB ports. This allows two USB hosts to share
peripherals and to dynamically reconfigure them.
Any configuration of the downstream ports is possible except simultaneous connection to both
upstream ports. Up to 8 different configurations can be selected by a dedicated 3-pin interface, or the
4-pin interface can be used to directly assign each port to either of the upstream hosts. An external
serial EEPROM (or SMBus Host) is used to store the 8 different configuration parameters. However,
8 predefined configurations, as well as generic VID/PID/DID information, are provided as defaults if no
external Serial EEPROM is detected at power up. The SMBus interface can be used to configure the
hub as well as dynamically re-assigning downstream ports to upstream hosts. The SMBus interface
can be “live” while the hub is operational, and allows an external SMBus host to have full access to
re-assign ports on an as-needed basis.
The SMSC 4-Port Switching Hub is fully compliant with the USB 2.0 Specification and will attach to
either or both upstream USB hosts as a Full-Speed Hub or as a Full-/High-Speed Hub. The 4
downstream Hub ports support Low-Speed, Full-Speed, and High-Speed (if operating as a High-Speed
Hub) downstream devices on all of the enabled downstream ports.
USB MultiSwitch
Datasheet
TM
Hub
A USB peripheral or USB Hub that is attached to one of the downstream USB2524 ports will be
available to one or the other of the upstream USB host controllers, but can never be simultaneously
shared with both host controllers. The user can switch a peripheral from one host to the other (on-thefly), and the peripheral will automatically detach from one host and a ttach to the other host. Each host
will only configure and control the downstream ports that are assigned to it, including full USB power
management and suspend/resume operations.
The USB2524 works with an external USB power distribution switch device to con trol V
to downstream ports, and to limit current and sense over-current conditions.
All required resistors on the USB ports are integrated into the Hub. This includes all seri es termination
resistors on D+ and D– pins and all require d pull-down and pull-up resistors on D+ and D– pins. The
over-current sense inputs for the downstream facing ports have internal pull-up resistors.
Throughout this document the upstream facing port of the hub will be referred to as the upstream port,
and the downstream facing ports will be called the downstream ports.
For performance reasons, the Hub provides 1 Transaction Translator (TT) per port (defined as MultiTT configuration), and each TT has 1512 bytes of periodic buffer space and 272 Bytes of non- periodic
buffer space (divided into 4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for
each Transaction Translator.
When configured as a Single-TT Hub (required by USB 2.0 Specification), the Single Transaction
Translator will have 1512 bytes of periodic buffer space and 272 bytes of non-periodic buffer space
(divided into 4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for the entire
Transaction Translator.
switching
BUS
Revision 1.91 (08-22-07)8SMSC USB2524
DATASHEET
USB MultiSwitch
Datasheet
TM
Hub
1.1 OEM Selectable Features
A default configuration is available in the USB2524 following a reset. This configuration may be
sufficient for some applications. Strapping option pins make it possible to modify a limited sub-set of
the configuration options.
The USB2524 may also be configured by an external EEPROM or a microcontroller. When using the
microcontroller interface, the Hub appears as an SMBus slave device. If the Hub is pin-strapped for
external EEPROM configuration but no external EEPROM is present, then a value of ‘0’ will be written
to all configuration data bit fields (the hub will attach to the ho st with all ‘0’ values).
The USB2524 supports several OEM selectable features:
Optional OEM configuration via I2C EEPROM or via the industry standard SMBus interface from
an external SMBus Host or Microcontroller.
Compound device support (port is permanently hardwired to a down strea m USB perip heral device).
Hardware strapping options enable configuration of the followin g features (when not configu red via
an EEPROM or SMBus host).
Non-Removable Ports
Port Power Polarity (active high or active low logic)
Selection of Single (STT) or Multi-Transaction Translator (MTT) capability.
Selection of Over-Current sensing a nd Port power control on a individual (port-b y-port) or ganged
(all ports together) to match the OEM’s choice of circuit board component selection.
Selection of end-user method of switching ports between hosts
-Embedded Mode: 8 default configurations that are controlled by OEM programmable registers (or
Internal default settings).
-Peripheral Mode: Each wire directly controls one of the 4 downstream ports. The interface is
selectable between edge triggered operation or level triggered operation for compatibility with many
different mechanical switch configurations or direct control from an external Microcontroller ’s GPIO
pins.
Enablement of String Descriptor Support, along with the capability to customize each of the 3
different string descriptors (up to a maximum size of 31 characters each)
Selection of LED Mode: USB Mode, Host Ownership Mode, or Host Ownersh ip Mode with Speed
Indication.
SMSC USB25249Revision 1.91 (08-22-07)
DATASHEET
USB MultiSwitch
Chapter 2 Pin Layout
T able 2.1 USB2524 56-Pin QFN Pin Configuration Table
VBUS_DET[2:1]I/ODetects state of Upstream VBUS power. The SMSC Hub
USBDN_DP[4:1]
USBDN_DM[4:1]
PRTPWR[4:1]OEnables power to U SB peripheral devices (downstream).
LED_A[4:3]_N/
PRT_DIS[1:0]
IO-UThese pins connect to the upstream USB bus data signals.
monitors VBUS_DET to determine when to assert the
internal D+ pull-up resistor (signalling a connect event).
When designing a detachable hub, this pin must be
connected to the VBUS power pin of the USB port that is
upstream of the hub. (Use of a weak pull-down resistor is
recommended.)
For self-powered applications with a permanently attached
host, this pin must be pulled-up to either 3.3V or 5.0V
(typically VDD33).
4-PORT USB 2.0 HUB INTERFACE
IO-UThese pins connect to the downstream USB peripheral
devices attached to the Hub’s ports.
The active signal level of the PRTPWR[4] pin is determined
by the Power Polarity Strapping function of the
PRTPWR_POL pin.
I/O12Green indicato r LED for ports 4 and 3. Will be active low
when LED support is enabled via EEPROM or SMBus. See
PRT_DIS1 function description if the hub is configured by
the internal default configuration.
Port Disable
strapping option 1
Revision 1.91 (08-22-07)12SMSC USB2524
PRT_DIS1I/O12If the hub is co nfigured by th e interna l default configuration ,
PRT_DIS[1:0] will be sampled at RESET_N negation to
determine if ports [4:2] will be permanently disabled. Also,
the active state of LED_A3_N will be determined as follows:
PRT_DIS[1:0] = '00', All ports are enabled,
LED_A4_N is active high,
LED_A3_N is active high.
PRT_DIS[1:0] = '01', Port 4 is disabled,
LED_A4_N is active high,
LED_A3_N is active low.
PRT_DIS[1:0] = '10', Ports 4 & 3 are disabled,
LED_A4_N is active low,
LED_A3_N is active high.
PRT_DIS[1:0] = '11', Ports 4, 3 & 2 are disabled,
LED_A4_N is active low,
LED_A3_N is active low.
I/O12Green indicato r LED for ports 2 and 1. Will be active low
when LED support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
these pins will be sampled at RESET_N negation to
determine if ports [3:1] contain permanently attached (nonremovable) devices. Also, the active state of the LED's will
be determined as follows:
NON_REM[1:0] = '00', All ports are removable,
LED_A2_N is active high,
LED_A1_N is active high.
NON_REM[1:0] = '01', Port 1 is non-removable,
LED_A2_N is active high,
LED_A1_N is active low.
NON_REM[1:0] = '10', Ports 1 & 2 are non-removable,
LED_A2_N is active low,
LED_A1_N is active high.
NON_REM[1:0] = '11', Ports 1, 2, & 3 are non-removable,
LED_A2_N is active low,
LED_A1_N is active low.
LED_B[4:1]_NI/O12T hese 4 pins in conjunction with the LED_A[4:1]_N pins
provides a total of 8 LED pins which are used to indicate
upstream host ownership of the downstream ports.
2 operational modes are available
Single Color LED Mode: LED will light to show which host
owns each of the downstream ports. If a port is
“unassigned” then neither LED for that port will light up.
Port Power
Polarity strapping
Over Current
Sense
USB Transceiver
Bias
Dual Color LED’s: (note; 4 possible states are displayed to
the user, Green, Red, Orange and Off).
PRTPWR_POLI/OPort Power Polarity strapping determination for the active
signal polarity of the PRTPWR[4:1] pins.
While RESET_N is asserted, the logic state of this pin will
(through the use of internal combinatorial logic) dete rmine
the active state of the PRTPWR[4:1] pins in order to ensure
that downstream port power is not inadvertently enabled to
inactive ports during a hardware reset.
When RESET_N is negated, the logic value will be latched
internally, and will retain the active signal polarity for the
PRTPWR[4:1] pins.
‘1’ = PRTPWR[4:1] pins have active ‘high’ polarity
‘0’ = PRTPWR[4:1] pins have active ‘low’ polarity
Warning: Active Low port power controllers may glitch
the downstream port power when system power is first
applied. Care should be taken when designing with
active low components!
OCS[4:1]_NIPUInput from external current monitor indicating an over-
current condition. {Note: Contains internal pull-up to 3.3V
supply}
RBIASI-RA 12.0kΩ (+/− 1%) resistor is attached from ground to this
pin to set the transceiver’s internal bias settings.
IPort Assign Interface: Operates in either Embedded mode,
or Peripheral mode. See Chapter 6, Assigning Ports for
additional details.
SERIAL PORT INTERFACE
SDA/SMBDATAIOSD12(Serial Data)/(SMB Data) signal.
SCL/SMBCLK/
IOSD12(Serial Clock)/(SMB Clock) signal.
CFG_SEL0
CFG_SEL0: The logic state of this multifunction pin is
internally latched on the rising edge of RESET_N
(RESET_N negation), and will determine the hub
configuration method as described in Table 4.2.
CFG_SEL1IThe logic state of this pin is internally latched on the rising
edge of RESET_N (RESET_N negation), and will determine
the hub configuration method as described in Table 4.2.
CFG_SEL2IThe logic state of this pin is internally latched on the rising
edge of RESET_N (RESET_N negation), and will determine
the hub configuration method as described in Table 4.2.
Table 4.2 SMBus or EEPROM Interface Behavior
NAMENAMENAMEFUNCTION
CFG_SEL2CFG_SEL1CFG_SEL0SMBus or EEPROM interface behavior.
000Internal Default Configuration
PRT_ASSIGN[3:0] = Embedded Mode.
Strap options on pins LED_A[4:1]_N are enabled.
LED Mode = USB Mode
001Configured as an SMBus slave for external download of
user-defined descriptors.
SMBus slave address is :0101100
Strap options on pins LED_A[4:1]_N are disabled
LED Mode = See C hapter 8, LED Interface Description
010Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Level Triggered)
Strap options on pins LED_A[4:1]_N are enabled.
No support for un assigned Ports.
LED Mode = USB Mode
0112-wire (I2C) EEPROMS are supported,
LED Mode = See C hapter 8, LED Interface Description
Revision 1.91 (08-22-07)14SMSC USB2524
DATASHEET
USB MultiSwitch
Datasheet
TM
Hub
Table 4.2 SMBus or EEPROM Interface Behavior (continued)
NAMENAMENAMEFUNCTION
100Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered)
LED Mode = Host Ownershi p Mode
Strap
options on pins LED_A[4:1]_N are enabled.
Supports unassigned Ports
101Internal Default Configuration
PRT_ASSIGN[3:0] = Peripheral Mode (Edge Triggered)
LED Mode = Host Ownershi p & Port Speed Mode
Strap options on pins LED_A[4:1]_N are disabled
Supports unassigned Ports.
110Reserved
111Reserved
Table 4.3 Miscellaneous Pins
NAMESYMBOLTYPEFUNCTION
Crystal
Input/External
Clock Input
XTAL1/
CLKIN
ICLKx
24MHz crystal or external clock input.
This pin connects to either one terminal of the crystal or
to an external 24MHz clock when a crystal is not used.
Note:See Table 11.1 for the required logic voltage
levels of this pad if it will be driven by an
external clock source.
Crystal OutputXTAL2OCLKx
24MHz Crystal
This is the other terminal of the crystal, or left
unconnected when an external clock source is used to
drive XTAL1/CLKIN. It must not be used to drive any
external circuitry other than the crystal circuit.
RESET InputRESET_NISThis active low signal is used by the system to reset the
chip. The minimum active low pulse is 1us.
Self-Power /
Bus-Power
Detect
SELF_PWRIDetects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub
gets all power from Upstream USB VBus).
High = Self/local power source is available.
TEST PinTESTIPDUsed for testing th e chip. User must treat as a no-
connect or connect to ground.
Table 4.4 Power, Ground, and No Connect
NAMESYMBOLTYPEFUNCTION
VDD CoreVDDCR18+1.8V core power.
Pins 16 and 50 must have a 4.7μF (or greater) ±20%
(ESR <0.1Ω) capacitor to VSS
VDDIO 3.3VVDD33+3.3V Power Supply for the Digital I/O.
SMSC USB252415Revision 1.91 (08-22-07)
DATASHEET
Ta b le 4.4 Power, Ground, and No Connect (continued)
NAMESYMBOLTYPEFUNCTION
VDD PLLVDDPLL18+1.8V Filtered analog power for internal PLL.
This pin must have a 4.7μF (or greater) ±20% (ESR
<0.1Ω) capacitor to VSS
USB MultiSwitch
Datasheet
TM
Hub
VDD Analog
I/O
VDDA33+3.3V Filtered analog PHY power, shared between
IOSD12Open drain….12mA sink with Schmitt trigger, and must meet I2C-Bus Specification Version 2.1
requirements.
ICLKxXTAL Clock Input
OCLKxXTAL Clock Output
I-RRBIAS
IO-UDefined in USB Specification.
Note:Meets USB 1.1 requirements when operating as a 1.1-complia nt device and meets
USB 2.0 requirements when operating as a 2.0-compliant device.
AIOAnalog Input/output. Per PHY test require ments.
Revision 1.91 (08-22-07)16SMSC USB2524
DATASHEET
Chapter 5 Switching Hub Block Diagram
To
Upstream
USB Data
Upstream
PHY
Repeater
Dow nstream
PHY #1
EEPROM
1.8V
Cap
TT#1TT#2TT#3TT
Routing LogicRouting Logic
Switch Driver
LED Drivers
3.3V
1.8V
Reg.
Port #1
OC Sense
Upstream
V
ControllerSIE
#4
Controller
Dow nstream
PHY #2
V
BUS
Power
BUS
Detect
Port
Switching Logic
Port #2
OC Sense
Switch Driver
LED Drivers
Pin
Strapping
Options
Inte r n a l
De fa u lts
Select
or SMBus
Master
SCL SD
Serial
Interface
ControllerSIE
Port
Controller
Down stream
PHY #3
TT
#4
Port #3
OC Sense
Switch Driver
LED Drivers
24 MH z
Crystal
PLL
TT
#3
TT
TT
#1
#2
Dow nstream
PHY #4
Upstream
USB Data
Upstream
PHY
Repeater
DATASHEET
Port
Assign
[3:0 ]
Port #4
OC Sense
Switch Driver
LED Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
Downstream
USB DataOCSense
Figure 5.1 USB2524 Switching Hub Block Diagram
Switch/LED
Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
Downstream
USB DataOCSense
Switch/LED
Drivers
SMSC USB252417 Revision 1.91 (08-22-07)
Chapter 6 Assigning Ports
There are two different (OEM selectable) methods of assigning downstream ports to upstream hosts.
One method is with the PRT_ASSIGN[3:0] interface through the use of mechanical switches or by
electrical control of the pins via an external Microcontroller ’s GPIO interface. The second method is
through the SMBus interface, where the SMBus interface is used to control the switching hub during
operation and can switch downstream ports via SMBus commands.
6.1 Port Assign Interface (PRT_ASSIGN[3:0] pins)
Assigning ports to either of the upstream host controllers can be accomplished through the 4-wire
PRT_ASSIGN interface. The PRT_ASSIGN interface has three operating modes. One is called the
Embedded Mode, and the other is Peripheral Mode (with two different electrical “sub” modes; (level
triggered or edge triggered).
Note: Any change in PRT_ASSIGN pins will be ignored until the USB2524 is out of reset.
6.1.1Embedded Mode:
The four-pin interface (PRT_ASSIGN[3:0]) operates with only three of the four available pins
(PRT_ASSIGN3 is disabled in this mode), which enables a user to select one of 8 pre-determined port
assignment configurations. There are 8 “default” configurations, or an OEM can customize the
configurations through an EEPROM or SMBus code load.
USB MultiSwitch
Datasheet
TM
Hub
Note: There i s a switching delay determined by the Register D0h: Port Interface Delay Timer.
The configuration is determined by Table 6.1, "USB2524 Port Assign Interface (Embedded Mode)".
Table 6.1 USB2524 Port Assign Interface (Embedded Mode)
Note 6.1H1 = The USB host or hub that is connected to upstream port #1
Note 6.2H2 = The USB host or hub that is connected to upstream port #2
Note 6.3UA = Un-Assigned
Revision 1.91 (08-22-07)18SMSC USB2524
DATASHEET
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