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USB2231/USB2232
5th Generation Hi-Speed
USB Flash Media and
CIR Controller with
Integrated Card Power
FETs
PRODUCT FEATURES
CIR Controller
■ Consumer IR (CIR) Controller with support for all
popular CIR formats.
Flash Media Controller
■ Complete System Solution for interfacing
SmartMediaTM (SM) or xD Picture CardTM (xD)1,
Memory StickTM (MS), High Speed Memory Stick
(HSMS), Memory Stick PRO (MSPRO), MS Duo
Secure Digital (SD), High Speed SD, Mini-Secure
Digital (Mini-SD), TransFlash (SD),
MultiMediaCard
TM
(MMC), Reduced Size
MultiMediaCard (RS-MMC), NAND Flash, Compact
FlashTM (CF) and CF UltraTM I & II, and CF formfactor ATA hard drives to Hi-Speed USB
— Supports USB Bulk Only Mass Storage Compliant Bootable
BIOS
■ Support for simultaneous operation of all above
devices. (only one at a time of each of the following
groups supported: CF or ATA drive, SM or XD or
NAND, SD or MMC)
■ On-Chip 4-Bit High Speed Memory Stick and MS
PRO Hardware Circuitry
■ On-Chip firmware reads and writes High Speed
Memory Stick and MS PRO
■ 1-bit ECC correction performed in hardware for
maximum efficiency
■ Hardware support for SD Security Command
Extensions
■ On-chip power FETs with short circuit protection for
supplying flash media card power
■ USB Bus Power Certified
■ 3.3 Volt I/O with 5V input tolerance on VBUS/GPIO3
■ Complete USB Specification 2.0 Compatibility for Bus
Powered Operation
— Includes Hi-Speed USB Transceiver
— A Bi-directional Control and two Bi-directional Bulk
Endpoints are provided.
■ 8051 8 bit microprocessor
— Provides low speed control functions
— 30 Mhz execution speed at 1 clock per instruction cycle
average
1.xD Picture Card not applicable to USB2231
TM
— 12K Bytes of internal SRAM for general purpose
scratchpad
— 768 Bytes of internal SRAM for general purpose scratchpad
or program execution while re-flashing external ROM
— Two, Double Buffered Bulk Endpoints
— Two, Bi-directional 512 Byte Buffers for Bulk Endpoints
— 64 Byte RX Control Endpoint Buffer
— 64 Byte TX Control Endpoint Buffer
■ Internal or External Program Memory Interface
,
— 76K Byte Internal Code Space or Optional 128K Byte
External Code Space using Flash, SRAM or EPROM
memory.
■ On Board 24Mhz Crystal Driver Circuit
■ Can be clocked by 48MHz external source
■ On-Chip 1.8V Regulator for Low Power Core
Operation
■ Internal PLL for 480Mhz Hi-Speed USB Sampling,
Configurable MCU clock
■ Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
■ 12 GPIOs for special function use: LED indicators,
button inputs, power control to memory devices, etc.
— Inputs capable of generating interrupts with either edge
sensitivity
■ Attribute bit controlled features:
— Activity LED polarity/operation/blink rate
— Full or Partial Card compliance checking
— Bus or Self Powered
— LUN configuration and assignment
— Write Protect Polarity
—SmartDetachTM - Detach from USB when no Card Inserted
for Notebook apps
— Cover Switch operation for xD compliance
— Inquiry Command operation
— SD Write Protect operation
— Older CF card support
— Force USB 1.1 reporting
— Internal or External Power FET operation
■ Compatible with Microsoft WinXP, WinME, Win2K
SP3, Apple OS10, Softconnex, and Linux Multi-LUN
Mass Storage Class Drivers
■ Win2K, Win98/98SE and Apple OS8.6 and OS9
Multi-LUN Mass Storage Class Drivers available from
SMSC
■ 128 Pin TQFP Package (1.0mm height, 14mmx14mm
footprint); green, lead-free package also available.
Datasheet
SMSC USB2231/USB2232 DATASHEET Revision 1.3 (07-12-05)
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5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
ORDER NUMBER(S):
USB2231/USB2232-NE-03 FOR 128 PIN, TQFP PACKAGE; USB2231/USB2232-NU-03 FOR 128 PIN, TQFP
PACKAGE (GREEN LEAD-FREE) PACKAGE
Hauppauge, NY 11788
(631) 435-6000
FAX (631) 273-3123
80 Arkay Drive
Copyright © 2005 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently,
complete information sufficient for construction purposes is not necessaril y given. Although the information has been checked and is believed to be
accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any
time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this
information does not conve y to the purchaser of the described semiconductor devices any licenses under any patent rights or oth er intellectual
property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreem ent dated before the date of your order (the "Terms of Sale Agreement"). The product ma
contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly
sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or othe
application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written
approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or othe
SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a
registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective
holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE,
AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE
LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA,
PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT;
NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMED
OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
Revision 1.3 (07-12-05) 2 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Table of Contents
Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Chapter 2 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 3 Pin Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 128-Pin Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 128-Pin List Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Chapter 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Chapter 6 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1 PIN Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.2 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Chapter 7 DC Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.3 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Chapter 8 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chapter 9 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SMSC USB2231/USB2232 3 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
List of Figures
Figure 5.1 USB2231/USB2232 128-Pin TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8.1 USB2231/USB2232 128-Pin TQFP Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision 1.3 (07-12-05) 4 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
List of Tables
Table 3.1 USB2231/USB2232 128-Pin Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3.2 USB2231/USB2232 128-Pin TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6.1 USB2231/USB2232 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6.2 USB2231/USB2232 Buffer Type Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 8.1 USB2231/USB2232 128-Pin TQFP Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 9.1 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SMSC USB2231/USB2232 5 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Chapter 1 General Description
The USB2231/USB2232 is a Hi-Speed USB Consumer IR and Bulk Only Mass Storage Class
Peripheral Controller. The Bulk Only Mass Storage Class Peripheral Controller supports CompactFlash
(CF) in True IDE Mode only, SmartMedia (SM), Memory Stick (MS) including both serial and parallel
interface and Secure Digital/MultiMediaCard (SD/MMC) flash memory devices. It provides a single chip
solution for the most popular flash memory cards in the market. In addition, the CIR controller consists
of the SMSC CIrCC block, which includes a Synchronous Communications Engine (SCE) and
hardware demodulators for the supported CIR formats.
The device consists of a USB2.0 PHY and SIE, buffers, Fast 8051 microprocessor with expanded
scratchpad, and program SRAM, and CIR, CF, MS, SM and SD controllers. The SD controller supports
both SD and MMC devices.
Provisions for external Flash Memory up to 128K bytes for program storage is provided (note: when
Bank switching is enabled the upper 64K will map into the 8051 ROM space, otherwise, only the first
64K bytes is used).
12K bytes of scratchpad SRAM and 768Bytes of program SRAM are also provided.
Twelve GPIO pins are provided for indicators, external serial EEPROM for OEM ID and system
configuration information, and other special functions.
Datasheet
Internal power FETs are provided to directly supply power to the xD/SM, MMC/SD and MS/MSPro
cards.
The internal ROM program is capable of implementing any combination of single or multi-LUN
CF/SD/MMC/SM/MS reader functions with individual card power control and activity indication. SMSC
also provides licenses** for Win98 and Win2K drivers and setup utilities. Note: Please check with
SMSC for precise features and capabilities for the current ROM code release.
*Note: In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC devices made
the subject of this document or to use related SMSC software programs, technical information and licenses under patent and other
intellectual property rights from or through various persons or entities, including without limitation media standard companies,
forums, and associations, and other patent holders may be required. These media standard companies, forums, and associations
include without limitation the following: Sony Corporation (Memory Stick, Memory Stick Pro); SD3 LLC (Secure Digital); MultiMedia
Card Association (MultiMediaCard); the SSFDC Forum (SmartMedia); the Compact Flash Association (Compact Flash); and Fuji
Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation (xD-Picture Card). SMSC does not make such licenses
or technical information available; does not promise or represent that any such licenses or technical information will actually be
obtainable from or through the various persons or entities (including the media standard companies, forums, and associations), or
with respect to the terms under which they may be made available; and is not responsible for the accuracy or sufficiency of, or
otherwise with respect to, any such technical information.
SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or otherwise, with
respect to infringement, including without limitation any obligations to defend or settle claims, to reimburse for costs, or to pay
damages, shall not apply to any of the devices made the subject of this document or any software programs related to any of such
devices, or to any combinations involving any of them, with respect to infringement or claimed infringement of any existing or future
patents related to solid state disk or other flash memory technology or applications ("Solid State Disk Patents"). By making any
purchase of any of the devices made the subject of this document, the customer represents, warrants, and agrees that it has
obtained all necessary licenses under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk
and other flash memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses
under Solid State Disk Patents; that the manufacture and testing by or for SMSC of the units of any of the devices made the subject
of this document which may be sold to the customer, and any sale by SMSC of such units to the customer, are valid exercises of
the customer's rights and licenses under such Solid State Disk Patents; that SMSC shall have no obligation for royalties or otherwise
under any Solid State Disk Patents by reason of any such manufacture, use, or sale of such units; and that SMSC shall have no
obligation for any costs or expenses related to the customer's obtaining or having obtained rights or licenses under any Solid State
Disk Patents.
SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR OTHER
VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES
AGAINST INFRINGEMENT AND THE LIKE.
No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark, copyright, mask
work right, trade secret, or other intellectual property right.
**To obtain this software program the appropriate SMSC Software License Agreement must be executed and in effect. Forms of
these Software License Agreements may be obtained by contacting SMSC.
Revision 1.3 (07-12-05) 6 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Chapter 2 Acronyms
SM: SmartMedia
SMC: SmartMedia Controller
FM: Flash Media
FMC: Flash Media Controller
CF: Compact Flash
CFC: CompactFlash Controller
SD: Secure Digital
SDC: Secure Digital Controller
MMC: MultiMediaCard
MS: Memory Stick
MSC: Memory Stick Controller
TPC: Transport Protocol Code.
ECC: Error Checking and Correcting
CRC: Cyclic Redundancy Checking
SMSC USB2231/USB2232 7 Revision 1.3 (07-12-05)
DATASHEET
Chapter 3 Pin Table
3.1 128-Pin Package
Table 3.1 USB2231/USB2232 128-Pin Package
CompactFlashINTERFACE (28 Pins)
CF_D0 CF_D1 CF_D2 CF_D3
CF_D4 CF_D5 CF_D6 CF_D7
CF_D8 CF_D9 CF_D10 CF_D11
CF_D12 CF_D13 CF_D14 CF_D15
CF_nIOR CF_nIOW CF_IRQ CF_nRESET
CF_IORDY CF_nCS0 CF_nCS1 CF_SA0
CF_SA1 CF_SA2 CF_nCD1 CF_nCD2
SmartMedia INTERFACE (17 Pins)
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
SM_D0 SM_D1 SM_D2 SM_D3
SM_D4 SM_D5 SM_D6 SM_D7
SM_ALE SM_CLE SM_nRE SM_nWE
SM_nWP SM_nB/R SM_nCE SM_nCD
SM_nWPS
Memory Stick INTERFACE (7 Pins)
MS_BS MS_SDIO/MS_D0 MS_SCLK MS_INS
MS_D1 MS_D2 MS_D3
SD INTERFACE (7 Pins)
SD_CMD SD_CLK SD_DAT0 SD_DAT1
SD_DAT2 SD_DAT3 SD_nWP
USB INTERFACE (10 Pins)
USBDP USBDM ATEST RBIAS
VDD18PLL VSSPLL VDDA33 VSSA
XTAL1/CLKIN XTAL2
Revision 1.3 (07-12-05) 8 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Table 3.1 USB2231/USB2232 128-Pin Package (continued)
MEMORY/IO INTERFACE (27 Pins)
MA0/CLK_SEL0 MA1/CLK_SEL1 MA2/SEL_CLKDRV MA3/TX_POL
MA4 MA5 MA6 MA7
MA8 MA9 MA10 MA11
MA12 MA13 MA14 MA15
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
nMRD nMWR nMCE
MISC (15 Pins)
GPIO1 GPIO2 GPIO3 GPIO4
GPIO5 GPIO6/ROMEN/MA16 GPIO7 GPIO8/
CRD_PWR0
GPIO9 GPIO10/
CRD_PWR1
nTEST0 nTEST1 nRESET
CIR (1 PIN)
IR_RXD
DIGITAL, POWER, GROUND & NC (16 Pins)
(5)VDD33 (2)VDD18 (7)VSS (2)NC
Tota l 1 2 8
GPIO11/
CRD_PWR2
GPIO12
3.2 128-Pin List Table
Table 3.2 USB2231/USB2232 128-Pin TQFP
PIN #NAME MA PIN
#
1 MA13 8 33 CF_D1 8 65 SM_D0 8 97 VSS -
2 MA14 8 34 CF_D2 8 66 SM_D1 8 98 RBIAS -
NAME MA PIN
#
NAME MA PIN
#
NAME MA
3 VDD33 - 35 CF_D3 8 67 SM_D2 8 99 ATEST -
4 MA15 8 36 CF_D4 8 68 SM_D3 8 100 VDD33 -
5 MD0 8 37 CF_D5 8 69 SM_D4 8 101 VDD18PLL -
6 MD1 8 38 CF_D6 8 70 SM_D5 8 102 XTAL1/
CLKIN
7 MD2 8 39 CF_D7 8 71 SM_D6 8 103 XTAL2 -
8 MD3 8 40 CF_D8 8 72 SM_D7 8 104 VSSPLL -
SMSC USB2231/USB2232 9 Revision 1.3 (07-12-05)
-
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Table 3.2 USB2231/USB2232 128-Pin TQFP (continued)
Datasheet
PIN #NAME MA PIN
#
NAME MA PIN
#
NAME MA PIN
#
NAME MA
9 MD4 8 41 CF_D9 8 73 SM_ALE 8 105 GPIO9 8
10 MD5 8 42 GPIO8/
8 74 SM_nWP 8 106 VDD18 -
CRD_PWR0
11 MD6 8 43 VDD33 - 75 SM_CLE 8 107 GPIO7 8
12 MD7 8 44 GPIO11/
8 76 SM_nWPS - 108 VDD33 -
CRD_PWR2
13 nMRD 8 45 CF_D10 8 77 SM_nB/R - 109 GPIO6/
ROMEN/
MA16
14 nMWR 8 46 CF_D11 8 78 SM_nCD - 110 GPIO5 8
15 VSS - 47 VSS - 79 GPIO10/
8111 GPIO4 8
CRD_PWR1
16 VSS - 48 CF_D12 8 80 VDD33 - 112 VSS -
17 nMCE 8 49 VDD18 - 81 SM_nRE 8 113 nRESET 8
18 MS_INS - 50 CF_D13 8 82 SM_nWE 8 114 GPIO2 8
19 MS_D0/
851CF_D14883SM_nCE8115GPIO1 -
MS_SDIO
8
20 MS_D1 8 52 CF_D15 8 84 VSS - 116 MA0/
CLK_SEL0
21 MS_D2 8 53 CF_nCD1 - 85 VSS - 117 MA1/
CLK_SEL1
22 MS_D3 8 54 CF_nCD2 - 86 VSSA - 118 MA2/
SEL_
CLKDRV
23 MS_
SCLK
8 55 CF_IRQ 8 87 USBDM - 119 MA3/
TX_POL
24 MS_BS 8 56 CF_IORDY 8 88 USBDP - 120 MA4 8
25 SD_nWP - 57 CF_nIOR 8 89 VDDA33 - 121 MA5 8
26 SD_DAT0 8 58 CF_nIOW 8 90 NC 8 122 MA6 8
27 SD_DAT1 8 59 CF_nRESET 8 91 IR_RXD 8 123 MA7 8
28 SD_DAT2 8 60 CF_nCS0 8 92 NC 8 124 MA8 8
29 SD_DAT3 8 61 CF_nCS1 8 93 GPIO12 8 125 MA9 8
30 SD_CMD 8 62 CF_SA0 8 94 GPIO3 8 126 MA10 8
31 SD_CLK - 63 CF_SA1 8 95 nTEST1 - 127 MA11 8
32 CF_D0 8 64 CF_SA2 - 96 nTEST0 - 128 MA12 8
8
8
8
8
Revision 1.3 (07-12-05) 10 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
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Chapter 4 Block Diagram
Revision 1.3 (07-12-05) 11 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Chapter 5 Pin Configuration
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Figure 5.1 USB2231/USB2232 128-Pin TQFP
Revision 1.3 (07-12-05) 12 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Chapter 6 Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal
is at a low voltage level. When “n” is not present before the signal name, the signal is asserted when
at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working
with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation indicates that a signal is inactive.
6.1 PIN Descriptions
Table 6.1 USB2231/USB2232 Pin Descriptions
NAME SYMBOL
CompactFlash (In True IDE mode) INTERFACE
CF Chip Select 1 CF_nCS1 O8PU This pin is the active low chip select 1 signal for the CF
CF Chip Select 0 CF_nCS0 O8PU This pin is the active low chip select 0 signal for the task
CF Register
Address 2
CF Register
Address 1
CF Register
Address 0
CF Interrupt CF_IRQ IPD This is the active high interrupt request signal from the
CF
Data 15-8
CF_SA2 O8 This pin is the register select address bit 2 for the CF
CF_SA1 O8 This pin is the register select address bit 1 for the CF
CF_SA0 O8 This pin is the register select address bit 0 for the CF
CF_D[15:8] I/O8PD The bi-directional data signals CF_D15-CF_D8 in True
BUFFER
TYPE DESCRIPTION
ATA device
file registers of CF ATA device in the True IDE mode.
ATA device.
ATA device
ATA device.
CF device.
IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
The bi-directional data signal has an internal weak pulldown resistor.
CF
Data7-0
IO Ready CF_IORDY IPU This pin is active high input signal.
SMSC USB2231/USB2232 13 Revision 1.3 (07-12-05)
CF_D[7:0] I/O8PD The bi-directional data signals CF_D7-CF_D0 in the
True IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
The bi-directional data signal has an internal weak pulldown resistor.
This pin has an internally controlled weak pull-up
resistor.
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Table 6.1 USB2231/USB2232 Pin Descriptions
Datasheet
NAME SYMBOL
CF
Card Detection2
CF
Card Detection1
CF
Hardware Reset
CF
IO Read
CF
IO Write Strobe
SM
Write Protect
BUFFER
TYPE DESCRIPTION
CF_nCD2 IPU This card detection pin is connected to the ground on
the CF device, when the CF device is inserted.
This pin has an internally controlled weak pull-up
resistor.
CF_nCD1 IPU This card detection pin is connected to ground on the
CF device, when the CF device is inserted.
This pin has an internally controlled weak pull-up
resistor.
CF_nRESET O8 This pin is an active low hardware reset signal to CF
device.
CF_nIOR O8 This pin is an active low read strobe signal for CF
device.
CF_nIOW O8 This pin is an active low write strobe signal for CF
device.
SmartMedia INTERFACE
SM_nWP O8PD This pin is an active low write protect signal for the SM
device.
This pin has a weak pull-down resistor that is
permanently enabled
SM
Address Strobe
SM
Command Strobe
SM
Data7-0
SM
Read Enable
SM_ALE O8PD This pin is an active high Address Latch Enable signal
for the SM device.
This pin has a weak pull-down resistor that is
permanently enabled
SM_CLE O8PD This pin is an active high Command Latch Enable signal
for the SM device.
This pin has a weak pull-down resistor that is
permanently enabled
SM_D[7:0] I/O8PD These pins are the bi-directional data signal SM_D7-
SM_D0.
The bi-directional data signal has an internal weak pulldown resistor.
SM_nRE 08PU This pin is an active low read strobe signal for SM
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
08 If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external pullups must be used, and should be connected to the
applicable Card Power Supply).
Revision 1.3 (07-12-05) 14 SMSC USB2231/USB2232
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5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Table 6.1 USB2231/USB2232 Pin Descriptions
NAME SYMBOL
SM
Write Enable
SM
Write Protect Switch
SM
Busy or Data Ready
SM
Chip Enable
BUFFER
TYPE DESCRIPTION
SM_nWE O8PU This pin is an active low write strobe signal for SM
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
08 If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external pullups must be used, and should be connected to the
applicable Card Power Supply).
SM_nWPS IPU A write-protect seal is detected, when this pin is low.
This pin has an internally controlled weak pull-up
resistor.
SM_nB/R I This pin is connected to the BSY/RDY pin of the SM
device.
An external pull-up resistor is required on this signal.
The pull-up resistor must be pulled up to the same
power source that powers the SM/NAND flash device.
SM_nCE O8PU This pin is the active low chip enable signal to the SM
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
SM
Card Detection
MS
Bus State
MS
System
Data In/Out
MS
System
Data In/Out
08 If an external FET is used (Internal FET is disabled),
then the internal pull-up is not available (external pullups must be used, and should be connected to the
applicable Card Power Supply).
SM_nCD IPU This is the card detection signal from SM device to
indicate if the device is inserted.
This pin has an internally controlled weak pull-up
resistor.
MEMORY STICK INTERFACE
MS_BS O8 This pin is connected to the BS pin of the MS device.
It is used to control the Bus States 0, 1, 2 and 3 (BS0,
BS1, BS2 and BS3) of the MS device.
MS_SDIO/MS_
I/O8PD This pin is a bi-directional data signal for the MS device.
D0
Most significant bit (MSB) of each byte is transmitted
first by either MSC or MS device.
The bi-directional data signal has an internal weak pulldown resistor.
MS_D[3:1] I/O8PD This pin is a bi-directional data signal for the MS device.
The bi-directional data signals have internal weak pulldown resistors.
SMSC USB2231/USB2232 15 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Table 6.1 USB2231/USB2232 Pin Descriptions
Datasheet
NAME SYMBOL
MS
Card Insertion
MS_INS IPU This pin is the card detection signal from the MS device
TYPE DESCRIPTION
to indicate, if the device is inserted.
This pin has an internally controlled weak pull-up
resistor.
BUFFER
MS
System CLK
MS_SCLK O8 This pin is an output clock signal to the MS device.
The clock frequency is software configurable.
SD INTERFACE
SD
SD_DAT[3:0] I/O8PU These are bi-directional data signals.
Data3-0
These pins have internally controlled weak pull-up
resistors.
SD Clock SD_CLK O8 This is an output clock signal to SD/MMC device.
The clock frequency is software configurable.
SD Command SD_CMD I/O8PU This is a bi-directional signal that connects to the CMD
signal of SD/MMC device.
This pin has an internally controlled weak pull-up
resistor.
SD
Write Protected
SD_nWP IPD This pin is an input signal with an internal weak pull-
down.
This pin has an internally controlled weak pull-down
resistor.
USB INTERFACE
USB Bus Data USBDM
IO-U These pins connect to the USB bus data signals.
USBDP
USB Transceiver
Bias
RBIAS I A 12.0kΩ, ± 1.0% resistor is attached from VSSA to this
pin, in order to set the transceiver’s internal bias
currents.
Analog Test ATEST AIO This signal is used for testing the analog section of the
chip and should be connected to VDDA33 for normal
operation.
1.8v PLL Power VDD18PLL 1.8v Power for the PLL
PLL Ground
VSSPLL Ground Reference for 1.8v PLL power
Reference
3.3v Analog Power VDDA33 3.3v Analog Power
Analog Ground
VSSA Analog Ground Reference for 3.3v Analog Power.
Reference
Crystal
Input/External Clock
Input
XTAL1/
CLKIN
ICLKx 24Mhz Crystal or external 24/48 MHz clock input.
This pin can be connected to one terminal of the crystal
or can be connected to an external 24/48Mhz clock
when a crystal is not used.
Note: The ‘MA[2:0] pins will be sampled while
nRESET is asserted, and the value will be
latched upon nRESET negation. This will
determine the clock source and value.
Revision 1.3 (07-12-05) 16 SMSC USB2231/USB2232
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5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Table 6.1 USB2231/USB2232 Pin Descriptions
NAME SYMBOL
TYPE DESCRIPTION
Crystal Output XTAL2 OCLKx 24Mhz Crystal
This is the other terminal of the crystal, or left open
when an external clock source is used to drive
XTAL1/CLKIN. It may not be used to drive any external
circuitry other than the crystal circuit.
MEMORY/IO INTERFACE
Memory Data Bus MD[7:0] IO8 When ROMEN bit of GPIO_IN1 register = 0, these
signals are used to transfer data between the internal
CPU and the external program memory.
These pins have internally controlled weak pull-up
resistors.
BUFFER
Memory Address
Bus
Memory Address
Bus
MA[15:3] O8 These signals address memory locations within the
external memory.
MA3/
TX_POL
I/O8PU MA3 Addresses memory locations within the external
memory.
During nRESET assertion, TX_POL will select the
operating polarity of the IR LED (active high or active
low) and the weak pull-up resistor will be enabled.
When nRESET is negated, the value on this pin will be
internally latched and this pin will revert to MA3
functionality, the internal pull-up will be disabled.
Memory Address
Bus
MA2/
SEL_CLKDRV
I/O8PD MA2 Addresses memory locations within the external
memory.
SEL_CLKDRV. During nRESET assertion, this pins will
select the operating clock mode (crystal or externally
driven clock source), and a weak pull-down resistor is
enabled. When nRESET is negated, the value will be
internally latched and this pin will revert to MA2
functionality, the internal pull-down will be disabled.
‘0’ = Crystal operation (24MHz only)
‘1’ = Externally driven clock source (24MHz or 48MHz)
Note: If the latched value is ‘1’, then the MA2 pin is
tri-stated when the following conditions are
true:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
If the latched value is ‘0’, then the MA2 pin will function
identically to the MA[15:3] pins at all times (other than
during nRESET assertion).
SMSC USB2231/USB2232 17 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Table 6.1 USB2231/USB2232 Pin Descriptions
Datasheet
NAME SYMBOL
Memory Address
MA[1:0]/CLK_S
Bus
Memory Write
Strobe
BUFFER
TYPE DESCRIPTION
I/O8PD MA[1:0], These signals address memory locations
EL[1:0]
within the external memory.
SEL[1:0]. During nRESET assertion, these pins will
select the operating frequency of the external clock, and
the corresponding weak pull-down resistors are
enabled. When nRESET is negated, the value on these
pins will be internal latched and these pins will revert to
MA[1:0] functionality, the internal pull-downs will be
disabled.
SEL[1:0] = ‘00’. 24MHz
SEL[1:0] = ‘01’. RESERVED
SEL[1:0] = ‘10’. RESERVED
SEL[1:0] = ‘11’. 48MHz
Note: If the latched value is ‘1’, then the
corresponding MA pin is tri-stated when the
following conditions are true:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
If the latched value is ‘0’, then the corresponding MA pin
will function identically to the MA[15:3] pins at all times
(other than during nRESET assertion).
nMWR O8 Program Memory Write; active low
Memory Read
Strobe
Memory Chip
Enable
General Purpose
I/O
General Purpose
I/O
General Purpose
I/O
General Purpose
I/O
General Purpose
I/O
nMRD O8 Program Memory Read; active low
nMCE O8 Program Memory Chip Enable; active low.
This signal is asserted, when any of the following
conditions are no longer met:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
Note: This signal is held to a logic ‘high’ while
nRESET is asserted.
MISC
GPIO1 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
GPIO2 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
GPIO3 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
GPIO4 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
GPIO5 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
Revision 1.3 (07-12-05) 18 SMSC USB2231/USB2232
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5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Table 6.1 USB2231/USB2232 Pin Descriptions
NAME SYMBOL
GPIO6, ROMEN,
Memory Address 16
GPIO6/ROMEN
/MA16
BUFFER
TYPE DESCRIPTION
IPU This pin has an internal weak pull-up resistor that is
enabled or disabled by the state of nRESET.
The pull-up is enabled when nRESET is active.
The pull-up is disabled, when the nRESET is inactive
(some clock cycles later, after the rising edge of
nRESET).
The state of this pin is latched internally on the rising
edge of nRESET to determine if internal or external
program memory is used.
The state latched is stored in ROMEN bit of GPIO_IN1
register.
I/O8 After the rising edge of nRESET, this pin may be used
as GPIO6 or RXD.
When pulled low via an external weak pull-down
resistor, an external program memory should be
connected to the memory data bus. The
USB2231/USB2232 uses this external bus for program
execution.
When this pin is left unconnected or pulled high by a
weak pull-up resistor, the USB2231/USB2232 uses the
internal ROM for program execution.
I/O8 For Bank Switching support, MA16 addresses the
external 128k memory above the standard 64k range
(the upper 64k is mapped into the 64k addressable
ROM space)
General Purpose
I/O
General Purpose
I/O
GPIO7 I/O8 This pin may be used either as input, edge sensitive
interrupt input, or output.
GPIO8/
CRD_PWR0
I/O8 GPIO: This pin may be used either as input, edge
sensitive interrupt input, or output.
Or
Card Power
General Purpose
I/O
General Purpose
I/O
GPIO9 I/O8 This pin may be used either as input, edge sensitive
GPIO10/
I/O8 GPIO: This pin may be used either as input, edge
CRD_PWR1
CRD_PWR: Card Power drive of 3.3V @ 100mA.
interrupt input, or output.
sensitive interrupt input, or output.
Or
Card Power
General Purpose
I/O
Or
Card Power
General Purpose
GPIO11/
I/O8 GPIO: This pin may be used either as input, edge
CRD_PWR2
GPIO12 I/O8 These pins may be used either as input, or output.
CRD_PWR: Card Power drive of 3.3V @ 100mA.
sensitive interrupt input, or output.
CRD_PWR: Card Power drive of 3.3V @ 200mA.
I/O
RESET input nRESET IS This active low signal is used by the system to reset the
chip. The active low pulse should be at least 1µs wide.
TEST Input nTEST[1:0] I These signals are used for testing the chip. User should
normally tie them high externally, if the test function is
not used.
SMSC USB2231/USB2232 19 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Table 6.1 USB2231/USB2232 Pin Descriptions
Datasheet
NAME SYMBOL
TYPE DESCRIPTION
CIR
IR Receive Data IR_RXD I IR_RXD, is the CIR receiver input.
DIGITAL POWER, GROUNDS, and NO CONNECTS
BUFFER
1.8v Digital Core
VDD18 +1.8V Core power
Power
All VDD18 pins must be connected together on the
circuit board.
3.3v Power & &
Voltage Regulator
Input
VDD33 3.3V Power & Regulator Input.
Pins 100 & 108 supply 3.3V power to the internal 1.8V
regulators.
Ground VSS Ground Reference
Notes:
■ Hot-insertion capable card connectors are required for all flash media. It is required for SD
connector to have Write Protect switch. This allows the chip to detect MMC card.
■ nMCE is normally asserted except when the 8051 is in standby mode.
6.2 Buffer Type Descriptions
Table 6.2 USB2231/USB2232 Buffer Type Descriptions
BUFFER DESCRIPTION
I Input
IPU Input with internal weak pull-up resistor.
IPD Input with internal weak pull-down resistor.
IS Input with Schmitt trigger
I/O8 Input/Output buffer with 8mA sink and 8mA source.
I/O8PU Input/Output buffer with 8mA sink and 8mA source, with an internal weak pull-up resistor.
I/O8PD Input/Output buffer with 8mA sink and 8mA source, with an internal weak pull-down
O8 Output buffer with 8mA sink and 8mA source.
O8PU Output buffer with 8mA sink and 8mA source, with an internal weak pull-up resistor.
O8PD Output buffer with 8mA sink and 8mA source, with an internal weak pull-down resistor.
ICLKx XTAL clock input
OCLKx XTAL clock output
resistor.
I/O-U Analog Input/Output Defined in USB specification
AIO Analog Input/Output
Revision 1.3 (07-12-05) 20 SMSC USB2231/USB2232
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5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Chapter 7 DC Parameters
7.1 Maximum Guaranteed Ratings
Operating Temperature Range ............................................................................................0oC to +70oC
Storage Temperature Range............................................................................................. -55
Lead Temperature Range (soldering, 10 seconds) ...................................................................... +325
Positive Voltage on GPIO3, with respect to Ground......................................................................... 5.5V
Positive Voltage on any signal pin, with respect to Ground ............................................................. 4.6V
Positive Voltage on XTAL1, with respect to Ground ......................................................................... 4.0V
Positive Voltage on XTAL2, with respect to Ground ......................................................................... 2.5V
Negative Voltage on GPIO8, 10 & 11, with respect to Ground (see Note 7.2)...............................-0.5V
Negative Voltage on any pin, with respect to Ground .....................................................................-0.5V
o
to +150oC
o
C
Maximum V
Maximum V
DD18, VDD18PLL
DD33, VDDA33
.............................................................................................................. +2.5V
................................................................................................................. +4.6V
*Stresses above the specified parameters could cause permanent damage to the device. This is a
stress rating only and functional operation of the device at any other condition above those indicated
in the operation sections of this specification is not implied.
Note 7.1 When powering this device from laboratory or system power supplies, it is important that
the Absolute Maximum Ratings not be exceeded or device failure can result. Some power
supplies exhibit voltage spikes on their outputs when the AC power is switched on or off.
In addition, voltage transients on the AC power line may appear on the DC output. When
this possibility exists, it is suggested that a clamp circuit be used.
Note 7.2 When internal power FET operation of these pins is enabled, these pins may be
simultaneously shorted to ground or any voltage up to 3.63V indefinitely, without damage
to the device as long as V
DD33
and V
7.2 DC Electrical Characteristics
(TA = 0°C - 70°C, V
PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS
I,IPU & IPD Type Input Buffer
Low Input Level
DD33, VDDA33
= +3.3 V ± 0.3 V, V
V
ILI
are less than 3.63V and TA is less than 70°C.
DDA33
DD18, VDD18PLL
0.8 V
= +1.8 V ± 10%,)
TTL Levels
High Input Level
Pull Down
Pull Up
SMSC USB2231/USB2232 21 Revision 1.3 (07-12-05)
V
PD
PU
IHI
2.0
72
58
V
µA
µA
DATASHEET
PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS
IS Type Input Buffer
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Low Input Level
High Input Level
Hysteresis
ICLK Input Buffer
Low Input Level
High Input Level
Input Leakage
(All I and IS buffers)
Low Input Leakage
High Input Leakage
O8. O8PU & 08PD Type
Buffer
Low Output Level
High Output Level
V
V
V
V
V
IHI
HYSI
ILCK
IHCK
I
IL
I
IH
V
OL
V
OH
ILI
2.0
500
0.8 V
V
mV
TTL Levels
0.4 V
2.2
-10
-10
V
DD33
- 0.4
+10
+10
0.4
V
µA
mA
V
V
VIN = 0
= V
V
IN
= 8 mA @
I
OL
V
= 3.3V
DD33
= -8mA @
I
OH
V
= 3.3V
DD33
DD33
Output Leakage
Pull Down
Pull Up
I/O8, I/O8PU & I/O8PD Type
Buffer
Low Output Level
High Output Level
Output Leakage
Pull Down
Pull Up
I
PD
PU
V
V
I
PD
PU
OL
OL
OH
OL
V
–
-10
DD33
0.4
-10
72
58
72
58
+10
0.4
+10
µA
µA
µA
V
V
µA
µA
µA
= 0 to V
V
IN
(Note 7.3)
= 8 mA @
I
OL
= 3.3V
V
DD33
= -8 mA @
I
OH
= 3.3V
V
DD33
= 0 to V
V
IN
(Note 7.3)
DD33
DD33
Revision 1.3 (07-12-05) 22 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS
IO-U
(Note 7.4)
Integrated Power FET for
GPIO8 & GPIO10
Output Current
Short Circuit Current Limit
On Resistance
Output Voltage Rise Time
Integrated Power FET for
GPIO11)
Output Current
Short Circuit Current Limit
On Resistance
Output Voltage Rise Time
Supply Current Unconfigured I
I
OUT
I
SC
R
DSON
t
DSON
I
OUT
I
SC
R
DSON
t
DSON
CCINIT
100
200
45
140
2.1
800
181
2.1
800
60
mA
mA
Ω
µs
mA
mA
Ω
µs
mA
GPIO8 or 10;
Vdrop
= 0.23V
FET
GPIO8 or 10;
FET
= 0V
Vout
GPIO8 or 10;
= 70mA
I
FET
GPIO8 or 10;
= 10µF
C
LOAD
GPIO11;
Vdrop
= 0.46V
FET
GPIO11;
FET
= 0V
Vout
GPIO11;
= 70mA
I
FET
GPIO11;
= 10µF
C
LOAD
@ V
DD18, VDD18PLL
1.8V
=
Supply Current Active
(Full Speed)
Supply Current Active
(High Speed)
Supply Current Standby I
I
CC
I
CC
CSBY
10
35
15
45
15
160
215
20
60
30
70
30
180
240
mA
mA
mA
mA
mA
µA
µA
@ V
DD33, VDDA33
3.3V
@ V
DD18, VDD18PLL
1.8V
@ V
DD33, VDDA33
3.3V
@ V
DD18, VDD18PLL
1.8V
@ V
DD33, VDDA33
3.3V
@ V
DD18, VDD18PLL
1.8V
@ V
DD33, VDDA33
3.3V
=
=
=
=
=
=
=
Note 7.3 Output leakage is measured with the current pins in high impedance.
Note 7.4 See Appendix A for USB DC electrical characteristics.
Note 7.5 The Maximum power dissipation parameters of the package should not be exceeded
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DATASHEET
Note 7.6 The assignment of each Integrated Card Power FET to a designated Card Connector is
controlled by both firmware and the specific board implementation. Firmware will default to
the settings listed in Table 9.1, “GPIO Usage,” on page 26
7.3 Capacitance
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
TA = 25°C; fc = 1MHz; V
PARAMETER SYMBOL MIN TYP MAX UNIT TEST CONDITION
Clock Input Capacitance C
Input Capacitance C
Output Capacitance C
DD18, VDD18PLL
IN
IN
OUT
= 1.8V
LIMITS
20 pF All pins except USB pins
(and pins under test tied to
AC ground)
10 pF
20 pF
Revision 1.3 (07-12-05) 24 SMSC USB2231/USB2232
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Datasheet
Chapter 8 Packaging
Figure 8.1 USB2231/USB2232 128-Pin TQFP Package Outline
Table 8.1 USB2231/USB2232 128-Pin TQFP Package Parameters
MIN NOMINAL MAX REMARKS
A ~ ~ 1.20 Overall Package Height
A1 0.05 ~ 0.15 Standoff
A2 0.95 ~ 1.05 Body Thickness
D 15.80 ~ 16.20 X Span
D1 13.80 ~ 14.20 X body Size
E 15.80 ~ 16.20 Y Span
E1 13.80 ~ 14.20 Y body Size
H 0.09 ~ 0.20 Lead Frame Thickness
L 0.45 0.60 0.75 Lead Foot Length
L1 ~ 1.00 ~ Lead Length
e 0.40 Basic Lead Pitch
q0
W 0.13 0.18 0.23 Lead Width
R1 0.08 ~ ~ Lead Shoulder Radius
R2 0.08 ~ 0.20 Lead Foot Radius
ccc ~ ~ 0.08 Coplanarity
o
Notes:
1. Controlling Unit: millimeter.
2. Tolerance on the true position of the leads is ± 0.035 mm maximum.
Package body dimensions D1 and E1 do not include the mold protrusion.
3. Maximum mold protrusion is 0.25 mm.
4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5. Details of pin 1 identifier are optional but must be located within the zone indicated.
~7
o
Lead Foot Angle
SMSC USB2231/USB2232 25 Revision 1.3 (07-12-05)
DATASHEET
5th Generation Hi-Speed USB Flash Media and CIR Controller with Integrated Card Power FETs
Chapter 9 GPIO Usage
Table 9.1 GPIO Usage
ACTIVE
NAME
LEVEL SYMBOL DESCRIPTION AND NOTE
Datasheet
GPIO1 H Flash Media Activity LED Indicates media activity. Media or USB
GPIO2 H EE_CS Serial EE PROM chip select
GPIO3 H V_BUS USB V bus detect
GPIO4 H EE_DIN/
EE_DOUT/
xDID
GPIO5 H HS_IND/
SD_CD
GPIO6 H A16/ROMEN A16 address line connect for DFU or
GPIO7 H EE_CLK/
UNCONF_LED
GPIO8 L MS_PWR_CTRL/
CRD_PWR0
GPIO9 L CF_PWR_CTRL CompactFlash Card Power Control
GPIO10 L SM_PWR_CTRL/
CRD_PWR1
GPIO11 L SD/MMC_PWR_CTRL/
CRD_PWR2
GPIO12 H MS_ACT_IND/
Media Activity/
CIR_SD
cable must not be removed with LED lit.
Serial EE PROM input/output and xD
Identify
HS Indicator LED or SD Card Detect
Switch input
debug LED indicator optional.
Serial EE PROM clock output or
Unconfigured LED.
Memory Stick Card Power Control, or
Internal Power FET0.
SmartMedia Card Power Control, or
Internal Power FET1.
SD/MMC Card Power Control, or
Internal Power FET2.
Memory Stick Activity Indicator, or
Media Activity LED or CIR Receiver
Shutdown.
Note 9.1 Function assignment may change with ROM code revision or external firmware use. ROM
Code -00 cannot be used, external firmware must be used to obtain proper functionality.
Subsequent ROM codes will contain proper functionality.Consult firmware release notes for
exact functionality for that release.
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DATASHEET
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