SMSC LPC47M997 User Manual

LPC47M997
Product Features
3.3 Volt Operation (SIO Block is 5 Volt Tolerant)  LPC Interface  ACPI 1.0/2.0 Compliant  Fan Control
Fan Speed Control Outputs (2)
Fan Tachometer Inputs (2)
Programmable Wake-up Event Interface  PC98, PC99, PC01 Compliant  Dual Game Port Interface  MPU-401 MIDI Support  General Purpose Input/Output Pins (37)  ISA Plug-and-Play Compatible Register Set  Intelligent Auto Power Management  System Management Interrupt  2.88MB Super I/O Floppy Disk Controller
Licensed CMOS 765B Floppy Disk Controller
Software and Register Compatible with SMSC's
Proprietary 82077AA Compatible Core
Supports Two Floppy Drives
Configurable Open Drain/Push-Pull Output Drivers
Supports Vertical Recording Format
16-Byte Data FIFO
100% IBM Compatibility
Detects All Overrun and Underrun Conditions
Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for Reduced Power Consumption
DMA Enable Logic
Data Rate and Drive Control Registers
480 Address, Up to 15 IRQ and Three DMA Options
Enhanced Digital Data Separator
2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates
Programmable Precompensation Modes
LPC Super I/O with Hardware Monitoring Block
Data Brief
Keyboard Controller
8042 Software Compatible
8 Bit Microcomputer
2k Bytes of Program ROM
256 Bytes of Data RAM
Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
Asynchronous Access to Two Data Registers and One Status Register
Supports Interrupt and Polling Access
8 Bit Counter Timer
Port 92 Support
Fast Gate A20 and KRESET Outputs
Serial Ports
Two Full Function Serial Ports
High Speed 16C550A Compatible UARTs with
Send/Receive 16-Byte FIFOs
Supports 230k and 460k Baud
Programmable Baud Rate Generator
Modem Control Circuitry
480 Address and 15 IRQ Options
Infrared Port
Multiprotocol Infrared Interface
IrDA 1.0 Compliant
SHARP ASK IR
480 Addresses, Up to 15 IRQ
Multi-Mode Parallel Port with ChiProtect  Standard Mode IBM PC/XT, PC/AT, and PS/2
Compatible Bi-directional Parallel Port
Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
IEEE 1284 Compliant Enhanced Capabilities Port (ECP)
ChiProtect Circuitry for Protection
960 Address, Up to 15 IRQ and Three DMA Options
SMSC LPC47M997 Page 1 Rev. 01-12-07
PRODUCT PREVIEW
LPC Interface
Multiplexed Command, Address and Data Bus
Serial IRQ Interface Compatible with Serialized IRQ
Support for PCI Systems
PME Interface
Hardware Monitor
Monitor Power supplies (+2.5V, +3.3V, +5V, +12V, +1.8V, +1.5V, Vccp (processor voltage), and VCC or HVSB)
Remote Thermal Diode Sensing for Two External Temperature Measurements
Internal Ambient Temperature Measurement
Limit Comparison of all Monitored Values
System Management Bus (SMBus) Interface
THERM# Pin for out-of-limit Temperature or Voltage
Indication
RESET# Pin for generating 20msec Low Reset Pulse
Configurable offset for internal or external temperature channels
Phoenix Keyboard BIOS ROM  128 Pin QFP, lead-free RoHS compliant
package, 3.2mm footprint
ORDERING INFORMATION
Order Number:
LPC47M997-NW for 128 pin, QFP lead-free RoHS compliant package
Rev. 01-12-07 Page 2 SMSC LPC47M997
PRODUCT PREVIEW
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2007 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMS C is a re gis te red trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
SMSC LPC47M997 Page 3 Rev. 01-12-07
PRODUCT PREVIEW
Block Diagram
CLK32
CLOCKI
SER_IRQ PCI_CLK
LAD[3:0]
LFrame
LDRQ
PCI_RESET
LPCPD
IO_PME*
IO_SMI*
GP1[0:7]*
GP2[0:2,4:7]* GP3[0:7]*, GP4[0:3]* GP5[0:7]*, GP6[0:1]*
SDA SCL
VID0 VID1
VID2 VID3
12V_IN/VID4
+5V_IN +3.3V_IN +2.5V_IN
+1.8V_IN
+1.5V_IN
Vccp_IN
HVCC
A0/RESET#/THERM#/
HVSS
XNOR_OUT
CLOCK
GEN
SERIAL
IRQ
LPC
Bus Interface
Power Mgmt
General
Purpose
I/O
SMBus
Hardware
Monitoring
IRTX2*
IRRX2*
(Data, Address, and Control lines)
SMC PROPRIETARY 82077 COMPATIBLE
VERTICAL
FLOPPYDISK
CONTROLLER CORE
J1X, J1Y*
J2B1, J2B2*
J1B1, J1B2*
J2X, J2Y*
Game Port Fan Control2nd Infrared Port
Internal Bus
LPC47M997
(128 QFP)
WDATA
WCLOCK
RCLOCK
RDATA
FAN2*
FAN1*
DIGITAL DATA
SEPARATOR WITH WRITE
PRECOM-
PENSATION
FAN_TACH2*
FAN_TACH1*
(see LPC47B27x)
Keyboard/Mouse
LED1*
LEDs
Multi-Mode
Parallel Port
with
ChiProtect
FDC MUX
High-Speed
16550A
UART
PORT 1
High-Speed
16550A
UART
PORT 2
MPU-401
Serial Port
8042
controller
LED2*
PD[7,0] Busy, Slct, PE,
/
ERROR, ACK
STROBE, INIT, SLCTIN, ALF
TXD1, RXD1 CTS1, RTS1 DSR1, DTR1 DCD1, RI1
TXD2 (IRTX)*, RXD2 (IRRX)*
CTS2*, RTS2 * DSR2*, DTR2* DCD2*, RI2*
MIDI_IN*
MIDI_OUT*
KCLK, MCLK KDATA, MDATA
GateA20* KRESET*
P12*, P16*, P17*
TM
DIR, STEP,
DSKCHG, DS0, DS1*
DRVDEN0*, DRVDEN1*
D1+
D0+
D1-
D0-
INDEX, WRTPRT
WGATE, HDSEL
MTR0, MTR1*,TRK0,
RDATA, WDATA
Note 1: This diagram does not show power and ground
connections. Note 2: Functions with "*" are located on multifunctional pins.
This diagram is designed to show the various functions available on the chip (not pin layout).
Figure 1 - LPC47M997 Block Diagram
Rev. 01-12-07 Page 4 SMSC LPC47M997
PRODUCT PREVIEW
A
y
y
y
g
g
y
Package Outline
Figure 2 - 128 PIN QFP Package Outline, 14x20x2.7 Body, 3.2 mm Footprint
Table 1 - 128 PIN QFP Package Parameters
A1 A2
D
D1
E
E1
H L
L1
e
θ
W R1 R2
ccc
Notes:
1. Controlling Unit: millimeter.
2. Tolerance on the position of the leads is ± 0.04 mm maximum.
3. Package body dimensions D1 and E1 do not include the mold protrusion. Maximum mold protrusion is 0.25 mm.
4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5. Details of pin 1 identifier are optional but must be located within the zone indicated.
MIN NOMINAL MAX REMARKS
~ ~ 3.4 Overall Package Height
0.05 ~ 0.5 Standoff
2.55 ~ 3.05 Bod
23.00 23.20 23.40 X Span
19.90 20.00 20.10 X bod
17.00 17.20 17.40 Y Span
13.90 14.00 14.10 Y bod
0.09 ~ 0.20 Lead Frame Thickness
0.73 0.88 1.03 Lead Foot Len ~ 1.60 ~ Lead Len
o
~ 7
0
0.10 ~ 0.30 Lead Width
0.08 ~ ~ Lead Shoulder Radius
0.08 ~ 0.30 Lead Foot Radius ~ ~ 0.08 Coplanarit
0.50 Basic Lead Pitch
o
Thickness
Size
Size
Lead Foot Angle
th
th
SMSC LPC47M997 Page 5 Rev. 01-12-07
PRODUCT PREVIEW
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