SMSC LAN9512 User Manual

LAN9512

USB Hub with Integrated 10/100 Ethernet Controller

PRODUCT FEATURES

Datasheet

Highlights

Two downstream ports, one upstream port

—Two integrated downstream USB 2.0 PHYs

—One integrated upstream USB 2.0 PHY

Integrated 10/100 Ethernet MAC with full-duplex support

Integrated 10/100 Ethernet PHY with HP Auto-MDIX

Implements Reduced Power Operating Modes

Minimized BOM Cost

—Single 25 MHz crystal (Eliminates cost of separate crystals for USB and Ethernet)

—Built-in Power-On-Reset (POR) circuit (Eliminates requirement for external passive or active reset)

Target Applications

Desktop PCs

Notebook PCs

Printers

Game Consoles

Embedded Systems

Docking Stations

Key Benefits

USB Hub

—Fully compliant with Universal Serial Bus Specification Revision 2.0

—HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps) compatible

—Two downstream ports, one upstream port

—Port mapping and disable support

—Port Swap: Programmable USB diff-pair pin location

—PHY Boost: Programmable USB signal drive strength

—Select presence of a permanently hardwired USB peripheral device on a port by port basis

—Advanced power saving features

—Downstream PHY goes into low power mode when port power to the port is disabled

—Full Power Management with individual or ganged power control of each downstream port.

—Integrated USB termination Pull-up/Pull-down resistors

—Internal short circuit protection of USB differential signal pins

High-Performance 10/100 Ethernet Controller

—Fully compliant with IEEE802.3/802.3u

—Integrated Ethernet MAC and PHY

—10BASE-T and 100BASE-TX support

—Fulland half-duplex support with flow control

—Preamble generation and removal

—Automatic 32-bit CRC generation and checking

—Automatic payload padding and pad removal

—Loop-back modes

—TCP/UDP checksum offload support

—Flexible address filtering modes

–One 48-bit perfect address

–64 hash-filtered multicast addresses

–Pass all multicast

–Promiscuous mode

–Inverse filtering

–Pass all incoming with status report

—Wakeup packet support

—Integrated Ethernet PHY

–Auto-negotiation

–Automatic polarity detection and correction

–HP Auto-MDIX

–Energy Detect

Power and I/Os

—Three PHY LEDs

—Eight GPIOs

—Supports bus-powered and self-powered operation

—Internal 1.8v core supply regulator

—External 3.3v I/O supply

Miscellaneous features

—Optional EEPROM

—Optional 24MHz reference clock output for partner hub

—IEEE 1149.1 (JTAG) Boundary Scan

Software

—Windows 2000/XP/Vista Driver

—Linux Driver

—Win CE Driver

—MAC OS Driver

—EEPROM Utility

Packaging

—64-pin QFN, lead-free RoHS compliant

Environmental

—Commercial Temperature Range (0°C to +70°C)

—±8kV HBM without External Protection Devices

—±8kV contact mode (IEC61000-4-2)

—±15kV air-gap discharge mode (IEC61000-4-2)

SMSC LAN9512

DATASHEET

Revision 1.0 (04-20-09)

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

ORDER NUMBERS:

LAN9512-JZX FOR 64-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (0 TO +70°C TEMP RANGE)

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 [phone], FAX [phone]

Copyright © 2009 SMSC or its subsidiaries. All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.

SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Revision 1.0 (04-20-09)	2	SMSC LAN9512
	DATASHEET

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

Table of Contents

Chapter 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1.2 USB Hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1.3 Ethernet Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1.4 EEPROM Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1.5 Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1.6 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Chapter 2 Pin Description and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1 Port Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1.1 Port Power Control Using a USB Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1.2 Port Power Control Using a Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.2 Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Chapter 3 EEPROM Controller (EPC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.1 EEPROM Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.1.1 Hub Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.2 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.3 EEPROM Auto-Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.4 An Example of EEPROM Format Interpretation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Chapter 4 Operational Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.1 Absolute Maximum Ratings*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.2 Operating Conditions** . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.3 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

4.3.1 Operational Current Consumption & Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . 39

4.4 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.5 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.5.1 Equivalent Test Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.5.2 Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.5.3 EEPROM Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

4.6 Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Chapter 5 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

5.1 64-QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

SMSC LAN9512	3	Revision 1.0 (04-20-09)
	DATASHEET

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

List of Figures

Figure 1.1 Internal Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2.1 LAN9512 64-QFN Pin Assignments (TOP VIEW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 2.2 Port Power Control with USB Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 2.3 Port Power Control with Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 2.4 Port Power with Ganged Control with Poly Fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 4.1 Output Equivalent Test Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 4.1 EEPROM Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 5.1 LAN9512 64-QFN Package Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 5.2 LAN9512 Recommended PCB Land Pattern. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Revision 1.0 (04-20-09)	4	SMSC LAN9512
	DATASHEET

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

List of Tables

Table 2.1 EEPROM Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.2 JTAG Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.3 Miscellaneous Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 2.4 USB Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 2.5 Ethernet PHY Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 2.7 No-Connect Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 2.8 64-QFN Package Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 2.9 Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 3.1 EEPROM Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 3.2 Configuration Flags Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 3.3 Hub Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 3.4 Config Data Byte 1 Register (CFG1) Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 3.5 Config Data Byte 2 Register (CFG2) Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 3.6 Config Data Byte 3 Register (CFG3) Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 3.7 Boost_Up Register (BOOSTUP) Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 3.8 Boost_3:2 Register (BOOST32) Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 3.9 Status/Command Register (STCD) Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 3.10 EEPROM Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 3.11 Dump of EEPROM Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 3.12 EEPROM Example - 256 Byte EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 4.1 Operational Current Consumption & Power Dissipation (VDD33IO = VDD33A = 3.3V) . . . . . 39 Table 4.2 I/O Buffer Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 4.3 100BASE-TX Transceiver Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 4.4 10BASE-T Transceiver Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 4.5 EEPROM Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 4.6 LAN9512 Crystal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 5.1 LAN9512 64-QFN Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

SMSC LAN9512	5	Revision 1.0 (04-20-09)
	DATASHEET

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

Chapter 1 Introduction

1.1Block Diagram

LAN9512

JTAG	TAP			EEPROM
	Controller	USB 2.0	10/100	Controller
			Ethernet
		Hub
USB	Upstream		Controller	Ethernet
DP/DM
	USB PHY			PHY

EEPROM

Ethernet

Downstream	Downstream
USB PHY	USB PHY
USB	USB
DP/DM	DP/DM

Figure 1.1 Internal Block Diagram

1.1.1Overview

The LAN9512 is a high performance Hi-Speed USB 2.0 hub with a 10/100 Ethernet controller. With applications ranging from embedded systems, desktop PCs, notebook PCs, printers, game consoles, and docking stations, the LAN9512 is targeted as a high performance, low cost USB/Ethernet and USB/USB connectivity solution.

The LAN9512 contains an integrated USB 2.0 hub, two integrated downstream USB 2.0 PHYs, an integrated upstream USB 2.0 PHY, a 10/100 Ethernet PHY, a 10/100 Ethernet Controller, a TAP controller, and a EEPROM controller. A block diagram of the LAN9512 is provided in Figure 1.1.

The LAN9512 hub provides over 30 programmable features, including:

PortMap (also referred to as port remap) which provides flexible port mapping and disabling sequences. The downstream ports of the LAN9512 hub can be reordered or disabled in any sequence to support multiple platform designs’ with minimum effort. For any port that is disabled, the LAN9512 automatically reorders the remaining ports to match the USB host controller’s port numbering scheme.

PortSwap which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment of USB signals (D+/D-) to connectors avoiding uneven trace length or crossing of the USB differential signals on the PCB.

PHYBoost which enables four programmable levels of USB signal drive strength in USB port transceivers. PHYBoost attempts to restore USB signal integrity that has been compromised by system level variables such as poor PCB layout, long cables, etc..

Revision 1.0 (04-20-09)	6	SMSC LAN9512
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USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

1.1.2USB Hub

The integrated USB hub is fully compliant with the USB 2.0 Specification and will attach to a USB host as a Full-Speed Hub or as a Full-/High-Speed Hub. The hub supports Low-Speed, Full-Speed, and High-Speed (if operating as a High-Speed hub) downstream devices on all of the enabled downstream ports.

A dedicated Transaction Translator (TT) is available for each downstream facing port. This architecture ensures maximum USB throughput for each connected device when operating with mixed-speed peripherals.

The hub works with an external USB power distributed switch device to control VBUS switching to downstream ports, and to limit current and sense over-current conditions.

All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+ and D- pins and all required pull-down and pull-up resistors on D+ and D- pins. The over-current sense inputs for the downstream facing ports have internal pull-up resistors.

Two external ports are available for general USB device connectivity.

1.1.3Ethernet Controller

The 10/100 Ethernet controller provides an integrated Ethernet MAC and PHY which are fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant. The 10/100 Ethernet controller also supports numerous power management wakeup features, including “Magic Packet”, “Wake on LAN” and “Link Status Change”. These wakeup events can be programmed to initiate a USB remote wakeup.

The 10/100 Ethernet PHY integrates an IEEE 802.3 physical layer for twisted pair Ethernet applications. The PHY block includes support for auto-negotiation, full or half-duplex configuration, auto-polarity correction and Auto-MDIX. Minimal external components are required for the utilization of the integrated PHY.

The Ethernet controller implements four USB endpoints: Control, Interrupt, Bulk-in, and Bulk-out. The Bulk-in and Bulk-out Endpoints allow for Ethernet reception and transmission respectively. Implementation of vendor-specific commands allows for efficient statistics gathering and access to the Ethernet controller’s system control and status registers.

1.1.4EEPROM Controller

The LAN9512 contains an EEPROM controller for connection to an external EEPROM. This allows for the automatic loading of static configuration data upon power-on reset, pin reset, or software reset. The EEPROM can be configured to load USB descriptors, USB device configuration, and the MAC address.

1.1.5Peripherals

The LAN9512 also contains a TAP controller, and provides three PHY LED indicators, as well as eight general purpose I/O pins. All GPIOs can serve as remote wakeup events when LAN9512 is in a suspended state.

The integrated IEEE 1149.1 compliant TAP controller provides boundary scan via JTAG.

1.1.6Power Management

The LAN9512 features three variations of USB suspend: SUSPEND0, SUSPEND1, and SUSPEND2. These modes allow the application to select the ideal balance of remote wakeup functionality and power consumption.

SUSPEND0: Supports GPIO, “Wake On LAN”, and “Magic Packet” remote wakeup events. This suspend state reduces power by stopping the clocks of the MAC and other internal modules.

SMSC LAN9512	7	Revision 1.0 (04-20-09)
	DATASHEET

USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

SUSPEND1: Supports GPIO and “Link Status Change” for remote wakeup events. This suspend state consumes less power than SUSPEND0.

SUSPEND2: Supports only GPIO assertion for a remote wakeup event. This is the default suspend mode for the LAN9512.

Revision 1.0 (04-20-09)	8	SMSC LAN9512
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USB Hub with Integrated 10/100 Ethernet Controller

Datasheet

Chapter 2 Pin Description and Configuration

VDD33A 49

EXRES 50

VDD33A 51

RXP 52

RXN 53

VDD33A 54

TXP 55

TXN 56

VDD33A 57

USBDM0 58

USBDP0 59

XO 60

XI 61

VDD18USBPLL 62

USBRBIAS 63

VDD33A 64

VDD18ETHPLL	TEST4	VDD33IO	CLK24 OUT	CLK24 EN	GPIO7	GPIO6	AUTOMDIX EN	TEST3	VDD33IO	VDD18CORE	GPIO5	GPIO4	GPIO3	TEST2	VDD33IO
48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33

SMSC

LAN9512 64 PIN QFN

(TOP VIEW)

VSS

1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16
USBDM2	USBDP2	USBDM3	USBDP3	VDD33A	NC	NC	NC	NC	VDD33A	VBUS DET	nRESET	TEST1	PRTCTL2	VDD18CORE	PRTCTL3

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

TCK

TDO

TDI

TMS nTRST VDD33IO EEDI EEDO EECS EECLK

nSPD_LED/GPIO2 nLNKA_LED/GPIO1 nFDX_LED/GPIO0 VDD33IO

NC

NC

NOTE: When HP Auto-MDIX is activated, the TXN/TXP pins can function as RXN/RXP and vice-versa NOTE: Exposed pad (VSS) on bottom of package must be connected to ground

Figure 2.1 LAN9512 64-QFN Pin Assignments (TOP VIEW)

SMSC LAN9512	9	Revision 1.0 (04-20-09)
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						USB Hub with Integrated 10/100 Ethernet Controller
							Datasheet
				Table 2.1 EEPROM Pins
NUM					BUFFER
PINS		NAME	SYMBOL		TYPE		DESCRIPTION
1		EEPROM Data	EEDI		IS	This pin is driven by the EEDO output of the
		In			(PD)	external EEPROM.
1		EEPROM Data	EEDO		O8	This pin drives the EEDI input of the external
		Out				EEPROM.
1		EEPROM Chip	EECS		O8	This pin drives the chip select output of the external
		Select				EEPROM.
1		EEPROM Clock	EECLK		O8	This pin drives the EEPROM clock of the external
						EEPROM.
				Table 2.2 JTAG Pins
NUM					BUFFER
PINS		NAME	SYMBOL		TYPE		DESCRIPTION
		JTAG Test Port	nTRST		IS	This active low pin functions as the JTAG test port
1		Reset				reset input.
						Note:	This pin should be tied high if it is not
							used.
1		JTAG Test	TMS		IS	This pin functions as the JTAG test mode select.
		Mode Select
1		JTAG Test Data	TDI		IS	This pin functions as the JTAG data input.
		Input
1		JTAG Test Data	TDO		O12	This pin functions as the JTAG data output.
		Out
		JTAG Test	TCK		IS	This pin functions as the JTAG test clock. The
1		Clock				maximum operating frequency of this clock is
						25MHz.
			Table 2.3 Miscellaneous Pins
NUM					BUFFER
PINS		NAME	SYMBOL		TYPE		DESCRIPTION
		System Reset	nRESET		IS	This active low pin allows external hardware to
1						reset the device.
						Note:	This pin should be tied high if it is not
							used.
		Ethernet	nFDX_LED		OD12	This pin is driven low (LED on) when the Ethernet
		Full-Duplex			(PU)	link is operating in full-duplex mode.
1		Indicator LED
		General	GPIO0		IS/O12/	This General Purpose I/O pin is fully programmable
		Purpose I/O 0			OD12	as either a push-pull output, an open-drain output,
					(PU)	or a Schmitt-triggered input.

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USB Hub with Integrated 10/100 Ethernet Controller

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Table 2.3 Miscellaneous Pins (continued)

NUM				BUFFER
PINS		NAME	SYMBOL	TYPE	DESCRIPTION
		Ethernet Link	nLNKA_LED	OD12	This pin is driven low (LED on) when a valid link is
		Activity Indicator		(PU)	detected. This pin is pulsed high (LED off) for
		LED			80mS whenever transmit or receive activity is
					detected. This pin is then driven low again for a
					minimum of 80mS, after which time it will repeat
					the process if TX or RX activity is detected.
1					Effectively, LED2 is activated solid for a link. When
					transmit or receive activity is sensed, LED2 will
					function as an activity indicator.
		General	GPIO1	IS/O12/	This General Purpose I/O pin is fully programmable
		Purpose I/O 1		OD12	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		Ethernet Speed	nSPD_LED	OD12	This pin is driven low (LED on) when the Ethernet
		Indicator LED		(PU)	operating speed is 100Mbs, or during auto-
					negotiation. This pin is driven high during 10Mbs
1					operation, or during line isolation.
		General	GPIO2	IS/O12/	This General Purpose I/O pin is fully programmable
		Purpose I/O 2		OD12	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		General	GPIO3	IS/O8/	This General Purpose I/O pin is fully programmable
1		Purpose I/O 3		OD8	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		General	GPIO4	IS/O8/	This General Purpose I/O pin is fully programmable
1		Purpose I/O 4		OD8	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		General	GPIO5	IS/O8/	This General Purpose I/O pin is fully programmable
1		Purpose I/O 5		OD8	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		General	GPIO6	IS/O8/	This General Purpose I/O pin is fully programmable
1		Purpose I/O 6		OD8	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		General	GPIO7	IS/O8/	This General Purpose I/O pin is fully programmable
1		Purpose I/O 7		OD8	as either a push-pull output, an open-drain output,
				(PU)	or a Schmitt-triggered input.
		Detect	VBUS_DET	IS_5V	This pin detects the state of the upstream bus
		Upstream			power. The Hub monitors VBUS_DET to determine
		VBUS Power			when to assert the USBDP0 pin's internal pull-up
					resistor (signaling a connect event).
1					For bus powered hubs, this pin must be tied to
					VDD33IO.
					For self powered hubs, refer to the LAN9512
					reference schematics.
		Auto-MDIX	AUTOMDIX_EN	IS	Determines the default Auto-MDIX setting.
1		Enable			0 = Auto-MDIX is disabled.
					1 = Auto-MDIX is enabled.
1		Test 1	TEST1	-	Used for factory testing, this pin must always be left
					unconnected.

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		Table 2.3 Miscellaneous Pins (continued)
NUM				BUFFER
PINS	NAME	SYMBOL		TYPE	DESCRIPTION
1	Test 2	TEST2		-	Used for factory testing, this pin must always be
					connected to VSS for proper operation.
1	Test 3	TEST3		-	Used for factory testing, this pin must always be
					connected to VDD33IO for proper operation.
1	24 MHz Clock	CLK24_EN		IS	This pin enables the generation of the 24 MHz
	Enable				clock on the CLK_24_OUT pin.
1	24 MHz Clock	CLK24_OUT		08	This pin outputs a 24 MHz clock that can be used
					a reference clock for a partner hub.
1	Test 4	TEST4		-	Used for factory testing, this pin must always be left
					unconnected.
			Table 2.4 USB Pins
NUM				BUFFER
PINS	NAME	SYMBOL		TYPE	DESCRIPTION
1	Upstream	USBDM0		AIO	Upstream USB DMINUS signal.
	USB DMINUS 0
1	Upstream	USBDP0		AIO	Upstream USB DPLUS signal.
	USB
	DPLUS 0
1	Downstream	USBDM2		AIO	Downstream USB peripheral 2 DMINUS signal.
	USB DMINUS 2
1	Downstream	USBDP2		AIO	Downstream USB peripheral 2 DPLUS signal.
	USB DPLUS 2
1	Downstream	USBDM3		AIO	Downstream USB peripheral 3 DMINUS signal.
	USB DMINUS 3
1	Downstream	USBDP3		AIO	Downstream USB peripheral 3 DPLUS signal.
	USB DPLUS 3
	USB Port Power	PRTCTL2		IS/OD12	When used as an output, this pin enables power to
	Control 2			(PU)	downstream USB peripheral 2.
1					When used as an input, this pin is used to sample
					the output signal from an external current monitor
					for downstream USB peripheral 2. An overcurrent
					condition is indicated when the signal is low.
					Refer to Section 2.1 for additional information.
	USB Port Power	PRTCTL3		IS/OD12	When used as an output, this pin enables power to
	Control 3			(PU)	downstream USB peripheral 3.
1					When used as an input, this pin is used to sample
					the output signal from an external current monitor
					for downstream USB peripheral 3. An overcurrent
					condition is indicated when the signal is low.
					Refer to Section 2.1 for additional information.

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USB Hub with Integrated 10/100 Ethernet Controller

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Table 2.4 USB Pins (continued)

NUM			BUFFER
PINS	NAME	SYMBOL	TYPE	DESCRIPTION
	External USB	USBRBIAS	AI	Used for setting HS transmit current level and on-
1	Bias Resistor			chip termination impedance. Connect to an
				external 12K 1.0% resistor to ground.
	USB PLL +1.8V	VDD18USBPLL	P	Refer to the LAN9512 reference schematics for
1	Power Supply			additional connection information.
	Crystal Input	XI	ICLK	External 25 MHz crystal input.
1				Note: This pin can also be driven by a single-
				ended clock oscillator. When this method
				is used, XO should be left unconnected
1	Crystal Output	XO	OCLK	External 25 MHz crystal output.
		Table 2.5 Ethernet PHY Pins
NUM			BUFFER
PINS	NAME	SYMBOL	TYPE	DESCRIPTION
	Ethernet TX	TXN	AIO	Negative output of the Ethernet transmitter. The
1	Data Out			transmit data outputs may be swapped internally
	Negative			with receive data inputs when Auto-MDIX is
				enabled.
	Ethernet TX	TXP	AIO	Positive output of the Ethernet transmitter. The
1	Data Out			transmit data outputs may be swapped internally
	Positive			with receive data inputs when Auto-MDIX is
				enabled.
	Ethernet RX	RXN	AIO	Negative input of the Ethernet receiver. The receive
1	Data In			data inputs may be swapped internally with
	Negative			transmit data outputs when Auto-MDIX is enabled.
	Ethernet RX	RXP	AIO	Positive input of the Ethernet receiver. The receive
1	Data In Positive			data inputs may be swapped internally with
				transmit data outputs when Auto-MDIX is enabled.
	+3.3V Analog	VDD33A	P	Refer to the LAN9512 reference schematics for
7	Power Supply			connection information.
1	External PHY	EXRES	AI	Used for the internal bias circuits. Connect to an
	Bias Resistor			external 12.4K 1.0% resistor to ground.
	Ethernet PLL	VDD18ETHPLL	P	Refer to the LAN9512 reference schematics for
1	+1.8V Power			additional connection information.
	Supply

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		Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad
NUM				BUFFER
PINS	NAME		SYMBOL	TYPE	DESCRIPTION
	+3.3V I/O		VDD33IO	P	+3.3V Power Supply for I/O Pins.
	Power				Refer to the LAN9512 reference schematics for
5
					connection information.
	Digital Core		VDD18CORE	P	+1.8 V power from the internal core voltage
	+1.8V Power				regulator. All VDD18CORE pins must be tied
2	Supply Output				together for proper operation.
					Refer to the LAN9512 reference schematics for
					connection information.
1	Ground		VSS	P	Ground
Note
2.1
	Note 2.1 Exposed pad on package bottom (Figure 2.1).
			Table 2.7 No-Connect Pins
NUM				BUFFER
PINS	NAME		SYMBOL	TYPE	DESCRIPTION
6	No Connect		NC	-	These pins must be left floating for normal device
					operation

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