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LAN91C100FD REV. D
FEAST Fast Ethernet
Controller with Full
Duplex Capability
PRODUCT FEATURES
Dual Speed CSMA/CD Engine (10 Mbps and 100
Mbps)
Compliant with IEEE 802.3 100BASE-T Specification
Supports 100BASE-TX, 100BASE-T4, and 10BASE-
T Physical Interfaces
32 Bit Wide Data Path (into Packet Buffer Memory)
Support for 32 and 16 Bit Buses
Support for 32, 16 and 8 Bit CPU Accesses
Synchronous, Asynchronous and Burst DMA
Interface Mode Options
128 Kbyte External Memory
ORDER NUMBER(S):
Data Brief
Built-In Transparent Arbitration for Slave Sequential
Access Architecture
Flat MMU Architecture with Symmetric Transmit and
Receive Structures and Queues
MII (Media Independent Interface) Compliant MAC-
PHY Interface Running at Nibble Rate
MII Management Serial Interface
Seven Wire Interface to 10 Mbps ENDEC
EEPROM-Based Setup
Full Duplex Capability
LAN91C100-FD 208-PIN QFP PACKAGE
LAN91C100-FD-SS FOR 208-PIN QFP LEAD-FREE ROHS COMPLIANT PACKAGE
LAN91C100-FD FOR 208-PIN TQFP PACKAGE
LAN91C100-FD-ST FOR 208-PIN TQFP LEAD-FREE ROHS COMPLIANT PACKAGE
SMSC LAN91C100FD REV D PRODUCT PREVIEW Revision 1.0 (09-22-08)
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FEAST Fast Ethernet Controller with Full Duplex Capability
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2008 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses withou t prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.0 (09-22-08) 2 SMSC LAN91C100FD REV D
PRODUCT PREVIEW
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FEAST Fast Ethernet Controller with Full Duplex Capability
General Description
The LAN91C100FD is designed to facilitate the implementation of first generation Fast Ethernet
adapters and connectivity products. For this first generation of products, flexibility dominates over
integration. The LAN91C100FD is a digital device that implements the MAC portion of the CSMA/CD
protocol at 10 and 100 Mbps, and couples it with a lean and fast data and control path system
architecture to ensure the CPU to packet RAM data movement does not cause a bottleneck at 100
Mbps.
Total memory size is 128 Kbytes, equivalent to a total chip storage (transmit plus receive) of 64
outstanding packets. The LAN91C100FD is software compatible with the LAN9000 family of products
and can use existing LAN9000 drivers (ODI, IPX, and NDIS) in 16 and 32 bit Intel X86 based
environments.
Memory management is handled using a unique MMU (Memory Management Unit) architecture and a
32-bit wide data path. This I/O mapped architecture can sustain back-to-back frame transmission and
reception for superior data throughput and optimal performance. It also dynamically allocates buffer
memory in an efficient buffer utilization scheme, reducing software tasks and relieving the host CPU
from performing these housekeeping functions. The total memory size is 128 Kbytes (external),
equivalent to a total chip storage (transmit and receive) of 64 outstanding packets.
FEAST provides a flexible slave interface for easy connectivity with industry-standard buses. The Bus
Interface Unit (BIU) can handle synchronous as well as asynchronous buses, with different signals
being used for each one. FEAST's bus interface supports synchronous buses like the VESA local bus,
as well as burst mode DMA for EISA environments. Asynchronous bus support for ISA is supported
even though ISA cannot sustain 100 Mbps traffic. Fast Ethernet could be adopted for ISA-based nodes
on the basis of the aggregate traffic benefits.
Two different interfaces are supported on the network side. The first is a conventional seven wire
ENDEC interface that connects to the LAN83C694 for 10BASE-T and coax 10 Mbps Ethernet
networks. The second interface follows the MII (Media Independent Interface) specification draft
standard, consisting of 4 bit wide data transfers at the nibble rate. This interface is applicable to 10
Mbps or 100 Mbps networks. Three of the LAN91C100FD’s pins are used to interface to the two-line
MII serial management protocol. Four I/O ports (one input and three output pins) are provided for
LAN83C694 configuration.
The LAN91C100FD is based on the LAN91C100 FEAST, functional revision G modified to add full
duplex capability. Also added is a software-controlled option to allow collisions to discard receive
packets. Previously, the LAN91C100 supported a “Diagnostic Full Duplex” mode. Under this mode
the transmit packet is looped internally and received by the MAC. This mode was enabled using the
FDUPLX bit in the TCR. In order to avoid confusion, the new, broader full duplex function of the
LAN91C100FD is designated as Switched Full Duplex, and the TCR bit enabling it is designated as
SWFDUP. When the LAN91C100FD is configured for SWFDUP, it’s transmit and receive paths will
operate independently and some CSMA/CD functions will be disabled. When the controller is not
configured for SWFDUP it will follow the CSMA/CD protocol.
SMSC LAN91C100FD REV D 3 Revision 1.0 (09-22-08)
PRODUCT PREVIEW
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A
R
A
S
L
D
R
Block Diagram
SERIA
Addre ss
EEPROM
FEAST Fast Ethernet Controller with Full Duplex Capability
Data
Control
BUS
INTERFACE
UNIT
R
FIFO
W
FIFO
RBITE
MEMORY
MANAGEMENT
UNIT
RAM
DIRECT
MEMORY
ACCESS
25 MHz
MEDIA
CCES
CONTROL
10 Mb
Interface
100
Media
I nde pende nt
nterface
Figure 1 LAN91C100FD Block Diagram
Revision 1.0 (09-22-08) 4 SMSC LAN91C100FD REV D
PRODUCT PREVIEW
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FEAST Fast Ethernet Controller with Full Duplex Capability
Package Outlines
Figure 2 208 Pin QFP Package Outline
Table 1 208 Pin QFP Package Parameters
MIN NOMINAL MAX REMARK
A ~ ~ 4.07 Overall Package Height
A1 0.05 ~ 0.5 Standoff
A2 3.17 ~ 3.67 Body Thickness
D 30.35 ~ 30.85 X Span
D1 27.90 ~ 28.10 X Body Size
E 30.35 ~ 30.85 Y Span
E1 27.90 ~ 28.10 Y body Size
H 0.09 ~ 0.20 Lead Frame Thickness
L 0.45 0.60 0.75 Lead Foot Length
L1 ~ 1.30 ~ Lead Length
e 0.50 Basic Lead Pitch
q0
W 0.10 ~ 0.30 Lead Width
R1 0.08 ~ ~ Lead Shoulder Radius
R2 0.08 ~ 0.25 Lead Foot Radius
ccc ~ ~ 0.08 Coplanarity
o
Notes:
1. Controlling Unit: millimeter.
2. Tolerance on the true position of the leads is ± 0.04 mm maximum.
3. Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
~7
o
Lead Foot Angle
5. Details of pin 1 identifier are optional but must be located within the zone indicated.
SMSC LAN91C100FD REV D 5 Revision 1.0 (09-22-08)
PRODUCT PREVIEW
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FEAST Fast Ethernet Controller with Full Duplex Capability
Figure 3 208 Pin TQFP Package Outline
Table 2 208 Pin TQFP Package Parameters
MIN NOMINAL MAX REMARK
A ~ ~ 1.60 Overall Package Height
A1 0.05 ~ 0.15 Standoff
A2 1.35 ~ 1.45 Body Thickness
D 29.80 ~ 30.20 X Span
D1 27.90 ~ 28.10 X Body Size
E 29.80 ~ 30.20 Y Span
E1 27.90 ~ 28.10 Y body Size
H 0.09 ~ 0.23 Lead Frame Thickness
L 0.45 0.60 0.75 Lead Foot Length
L1 ~ 1.00 ~ Lead Length
e 0.50 Basic Lead Pitch
q0
W 0.17 0.22 0.27 Lead Width
R1 0.08 ~ ~ Lead Shoulder Radius
R2 0.08 ~ 0.20 Lead Foot Radius
ccc ~ ~ 0.08 Coplanarity
o
Notes:
~7
o
Lead Foot Angle
1. Controlling Unit: millimeter.
2. Tolerance on the true position of the leads is ± 0.04 mm maximum.
3. Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5. Details of pin 1 identifier are optional but must be located within the zone indicated.
Revision 1.0 (09-22-08) 6 SMSC LAN91C100FD REV D
PRODUCT PREVIEW
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