Silicon Laboratories Si3210, Si3215, Si3216 User Manual
Si321xPPQx-EVB
Parallel Port
Power In
PCM TXPCM RX
Audio
Generator/
Analyzer
On-Board
PCM Clock
Generator
GND +3.3 V +5 V VIN
ProSLIC Motherboard
PC running ProSLIC LINC
software
RJ-11
Port
Si321x Daughter Card
EVALUATION BOARD FOR THE Si3210/15/16 PROSLIC
Description
This document describes the operation of the Silicon
Laboratories ProSLIC
devices supported by this document are the Si3210/15/
16 and Si3210M/15M/16M; both Si3201 and discrete
interface topologies are included. Schematics and
layouts are provided for the various ProSLIC products.
The ProSLIC evaluation platform is designed to provide
observation of the ProSLIC’s functionality. The ProSLIC
platform consists of a ProSLIC motherboard, a devicespecific daughter card, and the ProSLIC LINC™
software. The ProSLIC LINC software is a Windows
based program that can run in Microsoft Windows
environments.
Equipment requirements:
PC running Windows NT, 2000, or XP
25-pin D male-male cable
+5 V, 0.5 A power supply
+3.3 V, 0.5 A power supply (optional)
+12 V, 0.5 A power supply (Si3210, Si3215, Si3216)
Optional equipment:
Balanced audio generator and analyzer
(e.g., Audio Precision System 2 and/or HP TIMS set and/
or Wandel and Goltermann PCM-4)
®
device evaluation platform. The
8 kHz PCM signal generator and analyzer
(e.g., Audio Precision System 2 and Audio Precision SIA2322 and/or Wandel and Goltermann PCM-4)
Features
Silicon Laboratories ProSLIC device
All components necessary for linecard
implementation
Selectable secondar y pr ote ct ion
Control I/O through standard Parallel Port
®
On-board PCLK and FSYNC clock generation for
stand-alone operation
PCM I/O set up for Audio Precision System 2 or
Wandel and Goltermann PCM-4
Full access to PCM highway
Multiple daughter cards may be stacked for multi-
channel evaluation and daisy chain control
ProSLIC power selection (3.3 or 5 V)
Related Documentation
ProSLIC LINC™ User Guide
®
Functional Block Diagram
Rev. 1.2 7/08 Copyright © 2008 by Silicon Laboratories Si321xPPQx-EVB
Si321xPPQx-EVB
1. Introduction
The ProSLIC Si321x evaluation platform is a modular
system consisting of a generic motherboard and one or
more Si321x device-specific daughter cards. Using the
EVB hardware and ProSLIC LINC™ software, one can
easily configure, control, and monitor Si321x operation.
Up to eight Si321x daughter cards may be stacked
vertically and accessed using uniquely-assigned
timeslots on the common PCM interface and the SPI in
daisy-chain mode.
1.1. ProSLIC LINC evaluation software
The ProSLIC LINC software is an executable program
that allows control and monitoring of the ProSLIC. It
utilizes the primary LPT port of a standard PC to
communicate to the ProSLIC’s SPI port.
To install the software, insert the Silicon Laboratories
ProSLIC CD into the computer. The setup routine can
be invoked by running the setup.exe program in the root
directory of the CD.
Invoking the ProSLIC LINC is achieved by double
clicking the ProSLIC LINC icon. Refer to the ProSLIC
LINC User Guide for software operation.
1.2. Si321xPPT-EVB ProSLIC Evaluation Board Description
Si321x EVB daughter cards currently supported by this
hardware solution are listed in Table 1 along with
supporting hardware schematics and layout references
included in this data sheet.
Table 1. Supported Si321x EVB Daughter Cards
EVB Daughter Card Board
Description
Si3210/5/6 QFN with Si3201
integrated line interface
Si3210/5/6 QFN with discrete
line interface
Si3210/5/6M QFN with Si3201
integrated line interface
Si3210/5/6M QFN with discrete
line interface
Schematic
Figures
1, , 3 4, 5, 6
7, , 9 10, 11 , 12
13, 14, 15 16, 17, 18
19, 20, 21 22, 23, 24
Layout
Figures
Motherboard hardware schemat ics are foun d in Figures
25, 26, and 27.
All power and signal connections are made to the
motherboard as described in Table 2.
Signal requirements for ProSLIC operation are PCLK,
FS, and Serial IO. The ProSLIC motherboard has a
local oscillator with a programmable logic device to
provide the ProSLIC PCLK FS signals. The DIP switch
(S2) sets the PCLK frequency and controls the FS
enable. See Table 3 for S2 settings. Factory default
setting is for a 2.048 MHz PCLK with F5 enabled. JP3
and JP4 select this internal clock source or an exter nal
PCM clock source. The ProSLIC motherboard ha s been
designed to directly connect to an Audio Precision SIA2322 Serial Interface Adapter through the 15 pin dconnectors, P2 and P3 (not installed). See Table 5 for
the Audio Precision settings. The ProSLIC evaluation
board has also been designed to interface with a
Wandel and Goltermann PCM-4 through J8, J9, J10,
and J11 (not installed). See Table 6 for PCM-4 settings.
A header, J5 (not installed), allows access to the
ProSLIC’s PCM signals for connection to other PCM
testing devices or an actual telephone system PCM
bus. TIP and RING of the two wire analog interface is
present at the RJ-11 connector, J1.
The ProSLIC evaluation board is voltage-programmable
with specific jumper settings. JP1 selects 3 or 5 V
ProSLIC operation. JP2 selects 3 or 5 V PCM source
level compatibility. These should be placed on the
expected setting. Table 4 shows a summary of JP1–4
settings.
Power is connected to the ProSLIC at J3 and J4, and
supply connections are summarized in Table 1. The 5 V
is always required for the buffers, U2 and U3, to
interface to the parallel port. The ProSLIC can be
powered from 5 V or 3 V with the placement of a jumper
on JP1. The Protection Return connections on J6 are to
be connected to an appropriate ground for TIP/RING
fault testing. This return is tied to signal ground on
board, although it has a dedicated trace for high-current
conditions. Serial control of the ProSLIC is achieved by
toggling select bits of a standard parallel port. The
parallel port connection is available at P1 and J1.
The ProSLIC card can be daisy-chained by simply
stacking the cards. Stack up to eight cards by aligning
JS1–JS6 and pressing together. The ProSLIC LINC
Software allows channel-specific commands by clicking
the Daisy Chain button.
2 Rev. 1.2
Si321xPPQx-EVB
Table 2. Motherboard Power Connections
J2, J3, J4
Si321x Si321xM
VBRING NC NC
VBHI NC NC
VBLO NC NC
GND
GND GND
GND
+3 V +3.3 V
+5 V +5 V +5 V
+VIN +9 to 12 V
Notes:
1. All three GND connection points are electrically
connected on the board.
2. +3.3 V is only necessary if that is the desired VDD for
operation. Si321x chooses +3.3 V or +5 V based on
the SP1 of the motherboard (see schematic).
3. This may be changed based on application-specific
circuits. Consult the dc-dc converter spreadsheet for
other possible values.
1
2
3
GND
+3.3 V
+5 V
1.3. ProSLIC Evaluation Board Setup
To prepare the ProSLIC evaluation board for use,
perform the following steps:
1. Set power supplies to 3.3 V, 5 V, and 12 V.
2. With these supplies off, connect them to J3 and J4
corresponding to the silk screen designators.
3. Connect the PC’s parallel port (LPT1) to P1 (or J1)
using a 25-pin D male-to-male cable.
4. Select the on-board PCM clock source, or select an
1
2
3
external PCM source, and connect an Audio
Precision SIA-2322 to P2 and P3 or a Wandel and
Goltermann PCM-4 to J8, J9, J10, and J11.
5. TIP/RING connection can be made from the RJ-11 to
a phone or telephony test equipment.
6. Invoke the ProSLIC LINC software.
7. Turn the power supplies on and press the ProSLIC
evaluation board reset button (S1).
8. Click the “Reinitialize” button in the ProSLIC LINC
software panel
The ProSLIC is now ready to perform its linecard
function.
Table 3. On-Board PCLK Settings (S2)
S2-1,2,3 S2-4 S2-5 S2-6 S2-7 S2-8
PCLK frequency Unused Unused Unused Unused FS enable
0,0,0 = 8.192 MHz
x x x x 0 = FS disabled
0,0,1 = 4.096 MHz
0,1,0 = 2.048 MHz
0,1,1 = 1.024 MHz
1,x,x = 512 kHz
Note: 1 = on.
Table 4. JP1–4 Settings
Jumper Function
JP1
JP2
JP3
JP4
VDD Level Select
VPCM Level Select
FSYNC Level Select
PCLK Source Select
Jumper Location
1–2 2–3
+3 V +5 V 1–2
+3 V +5 V 2–3
Internal External 1–2
Internal External 1–2
1 = FS enabled
Default Factory
Setting
Rev. 1.2 3
Si321xPPQx-EVB
Table 5. Audio Precision SIA-2322 DIP Switch Setting
Receiver Mode Transmitter Mode
00111001 00000010 11111101 01111001 0000001 00000010 11111101 01111001
Note: 256 kHz PCLK and 8 kHz FS.
Table 6. Wandel and Goltermann PCM-4 Settings
General Configuration 2.14
General Configuration 3.13
General Configuration 4.13
For µ-law Add the Following:
General Configuration 7.12
General Configuration 7.22
4 Rev. 1.2
2. Schematics
FSYNC
DRX
SDO
SDI
PCLK
SCLKDTX
VBAT
/RESET
/CS
/INT
+VDC
VCC
VCC
VCC
SDITHRU
RING
TIP
/INT
SCLK
SDO
DRX
FSYNC
TIP_ext
RING_ext
PCLK
DTX
/RESET
/CS
SDI
TEST
PCM Bus Control Bus
Note 5: D1 = Central Semi CMR1U-02M or equivalent
Note 4: L1 = Delevan or Sumida SPD127 series or equivalent
see application note for value selection
Note 3: C30 to be Tantalum or Ceramic
Note 2: All capacitors are 100V, 20% unless otherwise noted
Note 1: All resistors are 1/10 W, 1% unless otherwise noted
RFILT
TIP
RING
Protection
CFILT
* These component need to be
selected appopriatedly for the
corresponding VDC voltage level.
See the data sheet and the AN45
app note for component value.
1-2: VCC=3.3V
2-3: VCC=5V
Note 4
--Single point connection
to ground plane
Over V
Note 5
Localized ground traces
ProSLIC
CTC CRC
F1
500mAF1500mA
C14
0.1uF
C14
0.1uF
L2
47 uH
150 mAL247 uH
150 mA
11223344556
6
J1
RJ-11J1RJ-11
C6
22 nFC622 nF
R17
200
R17
200
R102
90.9k
R102
90.9k
R5
100k
RBATR5100k
RBAT
Q8
2222
QBATDQ82222
QBATD
12
C15
0.1 uF
C15
0.1 uF
L1
100 uH
LSWL1100 uH
LSW
Q9
2222Q92222
C25
10 uF
C25
10 uF
Q7
FZT953
QBATQ7FZT953
QBAT
+
C18
4.7 uF+C18
4.7 uF
R105
100k
R105
100k
R1
200k
RTDC
R1
200k
RTDC
Test PointTest Point
12
C30
10 uF
10V
C30
10 uF
10V
R8
470
RTAC
R8
470
RTAC
R36 37.4kR36 37.4k
R3
200k
RRDC
R3
200k
RRDC
C31NIC31
NI
R9
470
RRAC
R9
470
RRAC
R29
665K
R29
665K
C32NIC32
NI
Tip1NC2Ring3VBAT4VBATH5NC6GND7VDD
8
NC
9
SRINGE
10
STIPE
11
NC
12
IRINGN
13
IRINGP
14
ITIPN
15
ITIPP
16
GND
epad
U2
Si3201U2Si3201
C33NIC33
NI
R4
105kR4105k
+
C19
4.7 uF+C19
4.7 uF
R28 26.1kR28 26.1k
C26
0.1uF
C26
0.1uF
R104
90.9k
R104
90.9k
D1
ES1D
DSW
D1
ES1D
DSW
R16
200
RSW
R16
200
RSW
R20
56.2k
RMONL
R20
56.2k
RMONL
12
C16
0.1 uF
C16
0.1 uF
R18
0.68
RVDC
1/4 W
R18
0.68
RVDC
1/4 W
Test PointTest Point
R19
56.2k
RMONH
R19
56.2k
RMONH
R7
4.02kR74.02k
R2115R21
15
C20
0.1 uF
C20
0.1 uF
SCLK
34
SDI
33
SDO
32
/CS
35
/INT
36
PCLK
37
DRX
38
DTX
1
FSYNC
2
/RESET
3
ITIPP
24
ITIPN
25
IRINGP
22
IRINGN
21
STIPDC
11
STIPE
13
SRINGDC
12
SRINGE
15
STIPAC
16
SRINGAC
17
CAPM10CAPP
8
IGMP20IGMN
18
SVBAT
14
IREF
7
DCDRV
30
DCFF
29
SDCL
5
VDDD
26
VDDA2
23
SDCH
4
VDDA1
6
GNDD
27
SDITHRU
31
QGND
9
GNDA
19
TEST
28
U1
Si3210-FM
U1
Si3210-FM
R14
40.2k
RREF
R14
40.2k
RREF
R15
243
RGM
R15
243
RGM
+
C1
10 uFCL10V+C1
10 uFCL10V
C3
220 nF
CTACC3220 nF
CTAC
+
C2
10 uFCM10V+C2
10 uFCM10V
C4
220 nF
CRACC4220 nF
CRAC
Test PointTest Point
R26
40.2k
R26
40.2k
Test PointTest Point
12
C17
0.1 uF
C17
0.1 uF
Test PointTest Point
11223
3
J2J2
R6
4.02kR64.02k
12
C34
10 uF
10V
C34
10 uF
10V
R2
105kR2105k
C10
0.1uF
CFF
C10
0.1uF
CFF
C9
10 uF
CBATC910 uF
CBAT
C5
22 nFC522 nF
Test PointTest Point
Si321xPPQx-EVB
Rev. 1.2 5
Figure 1. Si321x QFN with Si3201 Schematic (1 of 3)
Si321xPPQx-EVB
SDI1
/CS1_TEST
/CS0
SDI0
SDI
VCC
+VDC
/CS
SDI
TEST
SDITHRU
SCLK
DRX
FSYNC
PCLK
/RESET
SDO
DTX
/INT
(Farside)
SPI assignment:
To use /CS0, apply a zero Ohm resistor to R45 and R46
do not install R44
To use /CS1, apply a zero Ohm resistor to R44
do not install R45 and R46
To use SDI0, apply a zero Ohm resistor to R43 and R47
do not install R42 and R48
To use SDI1, apply a zero Ohm resistor to R42 and R48
do not install R43 and R47
R450R45
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
JS4
CONN SOCKET 5x2
JS4
CONN SOCKET 5x2
112
2
334
4
556
6
778
8
9910
10
JS5
CONN SOCKET 5x2
JS5
CONN SOCKET 5x2
R42NIR42
NI
R25
56.2k
R25
56.2k
R47 0R47 0
1
1
3
3
2
2
4
4
JS2
CONN SOCKET 2x2/SM
JS2
CONN SOCKET 2x2/SM
R48 NIR48 NI
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
JS3
CONN SOCKET 5x2
JS3
CONN SOCKET 5x2
R430R43
0
R460R46
0
1
1
3
3
2
2
4
4
JS6
CONN HDR 2x2/SM
JS6
CONN HDR 2x2/SM
R44NIR44
NI
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9910
10
JS1
CONN SOCKET 5x2
JS1
CONN SOCKET 5x2
Figure 2. Si321x QFN with Si3201 Schematic (2 of 3)
6 Rev. 1.2
Si321xPPQx-EVB
TIP
TIP_ext
RING_ext
RING
GR-1089
component
GR-1089
Intra-Building
component
R41 10R41 10
c
D5
NI
P1101CA2
c
D5
NI
P1101CA2
c
D4
Thyristor-Diode
P1101SC
c
D4
Thyristor-Diode
P1101SC
1 2
RF1
F1250T
RF1
F1250T
c
D3
Thyristor-Diode
P1101SC
c
D3
Thyristor-Diode
P1101SC
R40 10R40 10
1 2
RF2
F1250T
RF2
F1250T
Figure 3. Si321x QFN with Si3201 Schematic (3 of 3)
Rev. 1.2 7
Si321xPPQx-EVB
3. Si321x-FM-DC1 Bill of Materials
Table 7. Si321x-FM-DC1 Bill of Materials
Item Qty Ref Value Rating Tol Dielectric PCB
Footprint
14C1,C2,
C30,C34
2 2 C3,C4 220 nF 100 V ±20% X7R 1812 18121C224MATA AVX
3 2 C5,C6 22 nF 100 V ±20% X7R 1206 12061C223MATA AVX
4 2 C9,C25 10 µF 100 V ±20% Elec C100[6238]6
5 3 C10,C14,
C26
6 4 C15,C16,
C17,C20
7 2 C18,C19 4.7 µF 16 V ±20% X7R 1206 C1206X7R160-475MNE Venkel
10 1 D1 ES1D DO-214 ES1D Central
11 2 D3,D4 Thyristor-
12 1 F1 500 mA F1206[60X6
13 4 JS1,JS3,
JS4,JS5
14 1 JS2 SOCKET
15 1 JS6 HDR 2x2/
16 1 J1 RJ-11 RJ11-6-SMT 555077-2 AMP
17 1 J2 HEADER
18 1 L1 100 µH 1.7 A IND[220X15
19 1 L2 47 µH 150 mA IND-
20 1 Q7 FZT953 SOT-223 FZT953 Zetex
21 2 Q8,Q9 2222 SOT-23 MMBT2222 Motorola
22 2 RF1,RF2 TeleLink F350[145X1
23 2 R1,R3 200 k 1/10 W ±1% 0805 CR0805-10W-2003FT Venkel
24 2 R2,R4 105 k 1/10 W ±1% 0805 CR0805-10W-1053FT Venkel
25 2 R5,R105 100 k 1/10 W ±1% 0805 CR0805-10W-1003FT Venkel
26 2 R6,R7 4.02 k 1/10 W ±1% 0805 CR0805-10W-4021FT Venkel
10 µF 10 V ±20% X7R 1206 C1206X7R100-106MNE Venkel
.3MMR
0.1 µF 100 V ±20% X7R 1206 12061C104MATA AVX
0.1 µF 16 V ±20% X7R 0603 0603YC104MATA AVX
DO-214 P1101SC Littelfuse
Diode
0]
SOCKET
5x2
2x2/SM
SM
3X1
CONN2X5-
SSQ
CONN2X2-
100-SSM
CONN2X2-
100-TSM
CONN-1X3 2303-6111TN 3M
0]SPD
NLC3225
57]
Mfr Part Number Mfr
ECA-2AM100 Pana-
sonic
Semi
SSQ 500 Bel Fuse
Inc.
SSQ-1-05-24-F-D Samtec
SSM-102-L-DV-TR Samtec
TSM-102-02-T-DV Samtec
SPD127-104 API
Delevan
NLC322522T-470K TDK
F1250T Littelfuse
8 Rev. 1.2
Si321xPPQx-EVB
Table 7. Si321x-FM-DC1 Bill of Materials (Continued)
Item Qty Ref Value Rating Tol Dielectric PCB
Footprint
27 2 R8,R9 470
(Si3210-FM)
4.7 k
(Si3215-FM)
4.7 k
(Si3216-FM)
28 2 R14,R26 40.2 k 1/10 W ±1% 0805 CR0805-10W-4022FT Venkel
29 1 R15 243 1/10 W ±1% 0805 CR0805-10W-2430FT Venkel
30 2 R16,R17 200 1/10 W ±5% 0805 CR0805-10W-201JT Venkel
31 1 R18 0.68 1/4 W ±5% 1206 CR1206-4W-R68JT Venkel
32 3 R19,R20,
R25
33 1 R21 15 1/10 W ±1% 0805 CR0805-10W-15R0FT Venkel
34 1 R28 26.1 k 1/10 W ±1% 0805 CR0805-10W-2612FT Venkel
35 1 R29 665 k 1/10 W ±1% 0805 CR0805-10W-6653FT Venkel
36 1 R36 37.4 k 1/10 W ±1% 0805 CR0805-10W-3742FT Venkel
37 2 R40,R41 10 1/10 W ±1% 0805 CR0805-10W-10R0FT Venkel
38 4 R43,R45,
R46,R47
39 2 R102,R104 90.9 k 1/10 W ±1% 0805 CR0805-10W-9092FT Venkel
40 3 GND, TIP,
RING
41 1 U1 Si3210-FM MLF38N5X7
42 1 U2 Si3201 SOIC16 Si3201-FS Rev E Silabs
56.2 k 1/10 W ±1% 0805 CR0805-10W-5622FT Venkel
0 1/10 W ±1% 0805 CR0805-10W-0000FT Venkel
Test Point 151-205 Mouser
Si3215-FM MLF38N5X7
Si3216-FM MLF38N5X7
1/10 W ±1% 0805 CR0805-10W-4700FT Venkel
CR0805-10W-4701FT
CR0805-10W-4701FT
-0.5P
-0.5P
-0.5P
Mfr Part Number Mfr
Si3210-FM Rev E Silabs
Si3215-FM Rev C
Si3216-FM Rev C
Not Installed Components
43 3 C31,C32,
C33
44 1 D5 P1101CA2 95 V DO-214AA-3 P1101CA2 Te ccor
45 3 R42,R44,
R48
Rev. 1.2 9
Si321xPPQx-EVB
Figure 4. Si321xFM-DC1-EVB with Si3201 Primary Assembly
Figure 5. Si321xFM-DC1-EVB with Si3201 Primary Side
Figure 6. Si321xFM-DC1-EVB with Si3201 Secondary Side
10 Rev. 1.2
/RESET
TEST
/INT
SDO
SCLK
SDI
/CS
PCLK
DRX
DTX
FSYNC
SDITHRU
VBAT
+VDC
VCC
VCC
/CS
SDO
SDI
SCLK
/INT
SDITHRU
TIP
RING
TEST
DRX
DTX
FSYNC
/RESET
PCLK
TIP_EXT
RING_EXT
PCM Bus
Control Bus
Note 5: D1 = Central Semi CMR1U-02M or equivalent
Note 4: L1 = Delevan or Sumida SPD127 series or equivalent
see application note for value selection
Note 3: C30 to be Tantalum or Ceramic
Note 2: All capacitors are 100V, 20% unless otherwise noted
Note 1: All resistors are 1/10 W, 1% unless otherwise noted
TIP
RING
Protection
CFILT
1-2: VCC=3.3V
2-3: VCC=5V
Note 4
--Single point connection
to ground plane
Over V
Note 5
Localized ground traces
* These component need to be
selected appopriatedly for the
corresponding VDC voltage level.
See the data sheet and the AN45
app note for component value.
RFILT
R29
665K
R29
665K
C33
0.1 uF
C33
0.1 uF
C25
10 uF
C25
10 uF
Q5
CZT5551
QRPQ5CZT5551
QRP
12345
6
J1
RJ-11J1RJ-11
Q6
CZT5551
QTNQ6CZT5551
QTN
L1
100 uHL1100 uH
R102
100k
R102
100k
R18
0.68
1/4 W
R18
0.68
1/4 W
Q1
CMPT5401
QTPQ1CMPT5401
QTP
Test PointTest Point
C26
0.1uF
C26
0.1uF
12
C15
0.1 uF
C15
0.1 uF
Q3
CMPT5401
QRDNQ3CMPT5401
QRDN
R4
100k
RRSE45
R4
100k
RRSE45
Q2
CMPT5401
QRNQ2CMPT5401
QRN
Q4
CMPT5401
QTDNQ4CMPT5401
QTDN
Q9
MMBT2222Q9MMBT2222
12
C30
10 uF
10V
C30
10 uF
10V
Test PointTest Point
Test PointTest Point
R1
200k
RTDC
R1
200k
RTDC
R8
470
RTAC
R8
470
RTAC
R3
200k
RRDC
R3
200k
RRDC
R19 56.2kR19 56.2k
R9
470
RRAC
R9
470
RRAC
Test PointTest Point
R1010RTBP
R1010RTBP
R104
100k
R104
100k
Test PointTest Point
R5
100k
RBATR5100k
RBAT
R7
80.6
RRER780.6
RRE
Q8
MMBT2222Q8MMBT2222
R12
5.1k
RRBN
R12
5.1k
RRBN
C32
0.1 uF
C32
0.1 uF
R2115R21
15
R6
80.6
RTER680.6
RTE
R23
3.0k
RRBN0
R23
3.0k
RRBN0
R13
5.1k
RTBN
R13
5.1k
RTBN
12
C16
0.1 uF
C16
0.1 uF
R1110RRBP
R1110RRBP
C10 0.1uFC10 0.1uF
R28 26.1kR28 26.1k
11223
3
J2J2
R105
100k
R105
100k
Q7
FZT953Q7FZT953
R17
200
R17
200
R14
40.2k
RREF
R14
40.2k
RREF
R26
56.2k
R26
56.2k
R15
243
RGM
R15
243
RGM
C1
10 uFCLC1
10 uF
CL
C3
220 nF
CTAC
C3
220 nF
CTAC
C2
10 uFCMC2
10 uF
CM
C31
0.1 uF
C31
0.1 uF
C9
10 uFC910 uF
12
C17
0.1 uF
C17
0.1 uF
C4
220 nF
CRAC
C4
220 nF
CRAC
Test PointTest Point
C5
22 nF
CTCC522 nF
CTC
C6
22 nF
CRCC622 nF
CRC
D1
ES1DD1ES1D
12
C34
10 uF
10V
C34
10 uF
10V
R16
200
R16
200
C8
0.1uF
CTBNC80.1uF
CTBN
C7
0.1uF
CRBNC70.1uF
CRBN
C14
0.1uF
C14
0.1uF
SCLK
34
SDI
33
SDO
32
/CS
35
/INT
36
PCLK
37
DRX
38
DTX
1
FSYNC
2
/RESET
3
ITIPP
24
ITIPN
25
IRINGP
22
IRINGN
21
STIPDC
11
STIPE
13
SRINGDC
12
SRINGE
15
STIPAC
16
SRINGAC
17
CAPM10CAPP
8
IGMP20IGMN
18
SVBAT
14
IREF
7
DCDRV
30
DCFF
29
SDCL
5
VDDD
26
VDDA2
23
SDCH
4
VDDA1
6
GNDD
27
SDITHRU
31
QGND
9
GNDA
19
TEST
28
U1
Si3210-FM
ProSLIC
U1
Si3210-FM
ProSLIC
R2
100k
RTSE
R2
100k
RTSE
F1
500mAF1500mA
R36 37.4kR36 37.4k
R24
3.0k
RTBN0
R24
3.0k
RTBN0
R20 56.2kR20 56.2k
L2
47 uH
150 mAL247 uH
150 mA
Si321xPPQx-EVB
Rev. 1.2 11
Figure 7. Si321x QFN with Discrete Evaluation Circuit (1 of 3)
Si321xPPQx-EVB
/CS1_TEST
/CS0
SDI0
SDI
SDI1
+VDC
VCC
/CS
SDI
DRX
PCLK
TEST
FSYNC
/RESET
SCLK
SDITHRU
SDO
/INT
DTX
(Farside)
Chain 0
Chain 1
Chain 0
Chain 1
SPI assignment:
To use /CS0, apply a zero Ohm resistor to R45 and R46
do not install R44
To use /CS1, apply a zero Ohm resistor to R44
do not install R45 and R46
To use SDI0, apply a zero Ohm resistor to R43 and R47
do not install R42 and R48
To use SDI1, apply a zero Ohm resistor to R42 and R48
do not install R43 and R47
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
JS3
CONN SOCKET 5x2
JS3
CONN SOCKET 5x2
R44NIR44
NI
R430R43
0
1
1
3
3
2
2
4
4
JS6
CONN HDR 2x2/SM
JS6
CONN HDR 2x2/SM
R450R45
0
R47 0R47 0 R42
NI
R42
NI
R25
56.2k
R25
56.2k
R48 NIR48 NI
1
1
3
3
2
2
4
4
JS2
CONN SOCKET 2x2/SM
JS2
CONN SOCKET 2x2/SM
R460R46
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9910
10
JS1
CONN SOCKET 5x2
JS1
CONN SOCKET 5x2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
JS4
CONN SOCKET 5x2
JS4
CONN SOCKET 5x2
112
2
334
4
556
6
778
8
9910
10
JS5
CONN SOCKET 5x2
JS5
CONN SOCKET 5x2
Figure 8. Si321x QFN with Discrete Evaluation Circuit (2 of 3)
12 Rev. 1.2
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