Siemens TDA4340X Datasheet

Stereo Decoder/Noise Blanker TDA 4340X

1 Overview

1.1 Features

• Internal reference voltage source

• Adjustment free oscillator with
ceramic resonator 456 kHz

• Pilot dependent mono/stereo switching with
hysteresis

• Stereo indicator output

• Analogue control of mono/stereo change over (stereo noise control, SNC)

• Pilot canceller (19 kHz)

• Adjacent channel noise suppression (114 kHz)

• MUTE facility

• Analogue control of deemphasis (high cut control, HCC).

• Stereo inputs for additional signal source at output amplifiers

• Interference noise detector with integrated high-pass filter

• (IF level signal or MPX input)

• MPX input low-pass filter

• Noise blanking at MPX demodulator outputs

• Input and output level adjustable (resistor values)

P-DSO-20-1

Type Ordering Code Package

TDA 4340X Q67000-A5058 P-DSO-20-1

1.2 Application

The TDA 4340X is an integrated circuit providing the stereo decoder function and noise
blanking for FM car radio applications.

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1.3 Pin Configuration

(top view)

TDA 4340X

P-DSO-20-1

Figure 1

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1.4 Pin Definitions and Functions

Pin No. Function

1 Phase detector output, PLL loop filter
2 Oscillator pin (456 kHz)
3 Ground
4 Reference current pin, external reference resistor
5 Positive supply voltage
6 Interference detector input, noise detector input
7 Timing capacitor for monoflop (gate time)

Low voltage applied turns off oscillator, phase detector, pilot detector, SNC
and changes the time constant for HCC, noise gate monoflop

8 Hold capacitor for noise detector average level

Low voltage applied mutes the stereo decoder output, noise level capacitor

TDA 4340X

9 Auxiliary input left, output amplifier left
10 Audio signal output left
11 Audio signal output right
12 Auxiliary input right, output amplifier right
13 HCC timing/hold capacitor, deemphasis right
14 HCC timing/hold capacitor, deemphasis left
15 Input for HCC voltage
16 Input for SNC voltage
17 Input for reference level control voltage (HCC and SNC)
18 Pilot indicator output, open collector, active low
19 Pilot detector output

Low voltage applied switches the stereodecoder to mono state

20 Input for MPX signal

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1.5 Functional Block Diagram

TDA 4340X

Figure 2
Block Diagram

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TDA 4340X

2 Circuit Description

Power Supply, Reference Current

A temperature stable, low noise reference voltage generator is used for better ripple
rejection and for the generation of a reference current. This current is used as a time
base for the deemphasis, the gate time of the pulse former, and the pilot cancellation,
avoiding temperature and tolerance effects.

MPX Input, MPX Filter

Adjusting the value of the input resistor, the MPX input can be adapted to the output level
of the FM demodulator. A 4-pole low-pass filter determines the bandwidth of the MPX
signal.

Voltage Controlled Oscillator, Phase Detector

The 456 kHz oscillator and the frequency dividers are used as walsh function generators
(suppression of 3rd order harmonics) for:

– 38 kHz for the stereo decoder
– 19 kHz inphase for phase detector and pilot cancellation
– 19 kHz quadrature for the phase detector.

The phase detector locks the on-chip 19 kHz signal to the pilot tone in the MPX signal at
90° phase.

Pilot Detector, Pilot Indicator, Pilot Cancellation

The voltage at the pilot detector output is proportional to the pilot tone input level. If that
level is high enough, the pilot indicator output is activated and the pilot Cancellation
turned on: a 19 kHz signal proportional to the voltage at the pilot detector output is added
to the MPX signal with inverse polarity, cancelling the 19 kHz pilot tone.

Interference Detector, Noise Detector, Pulse Former

The signal from the interference input (MPX or field strength signal) passes a 4-pole
high-pass to the noise blanking circuitry. The average noise level is stored on an external
capacitor. The interference detector compares the actual noise level with that stored on
the capacitor and triggers the pulse former if there is a significant difference. The pulse
former generates a gate pulse for the HCC block. During that pulse time the outputs of
the deemphasis circuit are switched to hold mode.

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