The window discriminator compares an input voltage to a defined voltage window. The
digital outputs show whether the input voltage is below, within or above this window.
The TCA 965 B window discriminator is especially suitable as a tracking or
compensating controller with a dead band in control engineering and for the selection of
DC voltages within a certain tolerance of the required setpoint value in measurement
engineering. When it is used as a Schmitt trigger, switching frequencies up to a typical
value of 50 kHz are possible.
Semiconductor Group11998-02-10
Functional Description
TCA 965 B
Amplifier Amp 3 increases the voltage of the reference source
R to V
= 2 x V
Stab
REF
. The
amplification factor can be altered by external wiring. With direct setting of the window,
the input voltage appears on amplifier Amp 1 (
comparator K2 (
V
) and the lower edge voltage on comparator K1 (V7).
6
With indirect setting of the window, the input voltage appears on inputs
the center voltage is connected to amplifier A1 (
V
The voltage applied to the input (
) of amplifier Amp 2 is subtracted symmetrically from
9
V
V
), the upper edge voltage on
8
V
and V7, while
6
).
8
the output voltage of amplifier Amp 1 and added. The comparators switch with
hysteresis. The logic gates have open-collector outputs.
If the inhibit input A or B is connected to ground, output A or B will always be high.
+
VV
S
1115
R
REF
20 kΩ20 kΩ
_
Amp 3
+
10
V
Stab
V
V
V
V
7
7
Amp 1
8
8
V = 1
Amp 2
9
9
V = 1
6
6
_
+
+
_
Outputs A, B, C, D are open-collector
+
K1
_
+
K2
_
1
_
<
1
1
1
2
4
13
3
12
14
IEB00091
A
Inhibit A
C
D
Inhibit B
B
Block Diagram
Semiconductor Group21998-02-10
Pin Configuration
(top view)
TCA 965 B
TCA 965 B
GND
A
D
Inhibit A
V
REF
V
V
1
2
3
4
5
6
6
7
7
14
13
12
11
10
9
8
IEP00292
B
C
Inhibit B
V
+
S
V
Stab
V
9
V
8
Pin Definitions and Functions
PinSymbolPin Function in
Direct SettingIndirect Setting
of Window
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
A
D
Inhibit A
V
REF
V
6
V
7
V
8
V
9
V
Stab
+ V
S
Inhibit B
C
B
GND
Logic output A
Logic output D = A @ B (AND)
Connected to GND: logic output A = HIGH
Internal
Upper edge voltage
Lower edge voltage
Input voltage
GND
Internal
V
V
REF
Stab
= 3 V
Input voltage
Input voltage V
Center voltage
Half window width
= 6 V
Supply voltage
Connected to GND: logic output B = HIGH
Logic output C = A @ B (NAND)
Logic output B
V
6/7
6/7
Semiconductor Group31998-02-10
TCA 965 B
Absolute Maximum Ratings
Maximum ratings for ambient temperature
ParameterSymbolLimit ValuesUnit
T
= – 25 to 85 °C
A
min.max.
Supply voltage (pin 11)
Difference in input voltage between pins 6, 7, 8
Input voltage (pins 6, 7, 8, 9)
Output current (pins 2, 3, 13, 14)
Output voltage (pins 2, 3, 13, 14)
independent of
Voltage on V
V
REF
S
(pin 5)
Output current of stabilized voltage (pin 10)
Inhibit input voltage (pins 4, 12)
Junction temperature
Storage temperature
Thermal resistance system - airP-DIP-14-1
Operating Range
V
V
V
I
V
V
I
V
T
T
R
S
I
I
Q
Q
R
10
IH
j
stg
th SA
–
–
–
30
15
30
V
V
V
–50mA
–
–
–
30
8
V
V
–10mA
–7V
–55
150
125
°C
°C
–80K/W
Supply voltage
Ambient temperature
V
T
S
A
4.530V
–2585°C
Semiconductor Group41998-02-10
Characteristics
V
= 10 V; TA= 25 °C
S
TCA 965 B
ParameterSymbolLimit ValuesUnitTest
Condition
min. typ.max.
Current consumption
I
S
–
5
7
mA
V
,
V
2
Input current
(pins 6, 7, 8)
Input current, pin 9
I
I
–I
–
I
–
20
400
50
3000
nA
nA
Input offset voltage in
direct setting of window
V
IO
–20
20
mV
Input offset voltage in
indirect setting of window
V
IO
–50
50
mV
Input-voltage range on
pins 6, 7, 8
V
I
1.5
V
S
–1
V
∆
V
I
Input-voltage range on
pin 9
Differential input voltage
V
V
(
V
I
–(
6
8
50
V
–
V
)
8
9
+
V
)–
V
9
7
V
13
13
S
/2
mV
V
V
=
V
13
QH
<13V
Test
Circuit
1
1
1
1
2
1
2
Reference voltage
Stabilized voltage on
pin 10
TC of reference voltage
Sensitivity of reference
voltage to supply-voltage
variation
Output reverse current
Output saturation voltage
Hysteresis of window
edges
Inhibit threshold
Inhibit current
Switching frequency
V
5
V
10
αV
5
∆V5/∆V
I
QH
V
QL
V
– V
U
V
4, 12
I
4, 12
f
dir
f
ind
2.8
5.536
3.2
6.5
0.4
S
2
V
V
mV/K
mV/V
I
= 0
REF
V
> 7.9 V
S
––10µA––
100
500
L
18
22
1
–
–
– 100
2050–
–
200
800
35
1.8
–µA––
–
mV
mV
mV
V
kHz
kHz––
I
= 10 mA
Q
I
= 50 mA
Q
1
1
2
Semiconductor Group51998-02-10
TCA 965 B
V
S
Ι
S11
11
6
Ι
62
3
13
Ι
Ι
7
7
TCA 965B
14
10
Ι
8
Ι
8
5
RLRLRLR
ΙΙ
QH2
Ι
QH3
Ι
QH13
Ι
QH14
L
===
V
V
6
V
7
91412
8
Ι
Ι
Test Circuit 1
Direct Setting of Window
V
9
VV
==
4
5
12
V
10
V
QL14
V
QL13
V
QL3
V
QL2
IES00086
Semiconductor Group61998-02-10
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