Siemens SLx 24C64 Technical data

SLE 24C64

Standard EEPROM ICs

SLx 24C64

64 Kbit (8192 × 8 bit)

Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus

Data Sheet 1999-02-02

Edition 1999-02-02

Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München

© Siemens AG 1999.

All Rights Reserved.

Attention please!

As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies.

The information describes the type of component and shall not be considered as assured characteristics.

Terms of delivery and rights to change design reserved.

For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide (see address list).

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group.

Siemens AG is an approved CECC manufacturer.

Packing

Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport.

For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred.

Components used in life-support devices or systems must be expressly authorized for such purpose!

Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG.

1A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.

2Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.

SLx 24C64
Revision History:		Current Version: 1999-02-02
Previous Version:		05.98, 07.98
Page	Page	Subjects (major changes since last revision)
(in previous	(in current
Version)	Version)
Changes in the complete		P-DIP-8-4 changed to P-DIP-8-3, P-DSO-8-3 changed to P-DSO-8-2.
document
3	4	Text was changed to “Typical programming time 5 ms for up to
		32 bytes”.
4	5	SLA 24C64-D-3, SLA 24C64-D-3/P, SLA 24C64-S-3
		and SLA 24C64-S-3/P deleted.
4	5	Voltage changed from 4.5 V...5.5 V to 2.7 V...5.5 V.
4	5	Text “3 V types with automotive temperature range
		(– 40 °C … + 125 °C)” deleted.
4	5	Package (TSSOP, die, wafer delivery) added.
6	7	Footnote added “Values are temperature ….”
6	7	Text changed to “The device with a voltage range of 2.7 … 5.5. V is
		available …”.
11, 12	13, 15	The erase/write cycle is finished latest after 10 8 ms.
14	15	Text added “(see figure 10)”.
18	19	Figure 13: “CSW” changed to “CSR”.
21	23	The write or erase cycle is finished latest after 10 4 ms.
22	24	Line “Supply voltage”: Text deleted.
23	24	Supply current (write) 3 mA 1 mA.
23	24	Line added “Supply current (read)”.
24	26	The line “erase/write cycle” removed.
24	26	Chapter 8.4 “Erase and Write Characteristics” added.

Page Protection Mode™ is a trademark of Siemens AG.

I2C Bus

Purchase of Siemens I2C components conveys the license under the Philips I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips.

64 Kbit (8192 × 8 bit) Serial CMOS	SLx 24C64
EEPROMs, I2C Synchronous 2-Wire Bus

Preliminary

1 Overview

1.1Features

•Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes

•Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only)

•Low power CMOS

P-DIP-8-3

•VCC = 2.7 to 5.5 V operation

•Two wire serial interface bus, I2C-Bus compatible

•Three chip select pins to address 8 devices

•Filtered inputs for noise suppression with

Schmitt trigger

•	Clock frequency up to 400 kHz
•	High programming flexibility	P-DSO-8-2

–Internal programming voltage

–Self timed programming cycle including erase

–Byte-write and page-write programming, between 1 and 32 bytes

–Typical programming time 5 ms for up to 32 bytes

•High reliability

–Endurance 106 cycles1)

–Data retention 40 years1)

–ESD protection 4000 V on all pins

•8 pin DIP/DSO packages

•Available for extended temperature ranges

– Industrial:

− 40 °C to + 85 °C

– Automotive: − 40 °C to + 125 °C

1)Values are temperature dependent, for further information please refer to your Siemens sales office.

Semiconductor Group

4

1999-02-02

SLx 24C64

Ordering Information

Type	Ordering Code	Package	Temperature	Voltage
SLA 24C64-D	Q67100-H3768	P-DIP-8-3	– 40 °C … + 85 °C	2.7	V...5.5 V
SLA 24C64-D/P	Q67100-H3762
SLA 24C64-S	Q67100-H3767	P-DSO-8-2	– 40 °C … + 85 °C	2.7	V...5.5 V
SLA 24C64-S/P	Q67100-H3761
SLE 24C64-D	Q67100-H3238	P-DIP-8-3	– 40°C … + 125 °C	2.7	V...5.5 V
SLE 24C64-D/P	Q67100-H3758
SLE 24C64-S	Q67100-H3239	P-DSO-8-2	– 40°C … + 125 °C	2.7	V...5.5 V
SLE 24C64-S/P	Q67100-H3757

Other types are available on request:

–Temperature range (– 55 °C … + 150 °C)

–Package (TSSOP, die, wafer delivery)

1.2Pin Configuration

P-DIP-8-3

P-DSO-8-2

CS0			1		8			VCC
CS1			2	7				WP
CS2			3	6				SCL
VSS			4	5				SDA

CS0			1	8			VCC
CS1			2	7			WP
CS2			3	6			SCL
VSS			4	5			SDA
				IEP02124

IEP02125

Figure 1

Pin Configuration (top view)

Semiconductor Group

5

1999-02-02

SLx 24C64

Pin Definitions and Functions

Table 1

Pin No.	Symbol	Function
1, 2, 3	CS0, CS1, CS2	Chip select inputs
4	VSS	Ground
5	SDA	Serial bidirectional data bus
6	SCL	Serial clock input
7	WP	Write protection input
8	VCC	Supply voltage

Pin Description

Serial Clock (SCL)

The SCL input is used to clock data into the device on the rising edge and to clock data out of the device on the falling edge.

Serial Data (SDA)

SDA is a bidirectional pin used to transfer addresses, data or control information into the device or to transfer data out of the device. The output is open drain, performing a wired AND function with any number of other open drain or open collector devices. The SDA bus requires a pull-up resistor to VCC.

Chip Select (CS0, CS1, CS2)

The CS0, CS1 and CS2 pins are chip select inputs either hard wired or actively driven to VCC or VSS. These inputs allow the selection of one of eight possible devices sharing a common bus.

Write Protection (WP)

WP switched to VSS allows normal read/write operations.

WP switched to VCC protects the EEPROM against changes (hardware write protection).

Semiconductor Group

6

1999-02-02

SLx 24C64

2 Description

The SLx 24C64 device is a serial electrically erasable and programmable read only memory (EEPROM), organized as 8192 × 8 bit. The data memory is divided into 256 pages. The 32 bytes of a page can be programmed simultaneously.

The device conforms to the specification of the 2-wire serial I2C-Bus. Three chip select pins allow the addressing of 8 devices on the I2C-Bus. Low voltage design permits operation down to 2.7 V with low active and standby currents. All devices have a minimum endurance of 106 erase/write cycles1).

The device operates at 5.0 V ± 10% with a maximum clock frequency of 400 kHz and at 2.7 ... 5.5 V with a maximum clock frequency of 100 kHz. The device with a voltage range of 2.7 … 5.5. V is available in two temperature ranges for industrial and automotive applications. The EEPROMs are mounted in eight-pin DIP and DSO packages or are also supplied as chips.

1) Values are temperature dependent, for further information please refer to your Siemens Sales office.

Semiconductor Group

7

1999-02-02

SLx 24C64

V SS	V CC	CS0	CS1	CS2	WP
		Chip Address				Programming
							Control
			Control
			Logic				H.V. Pump
	Start/
	Stop
	Logic
			Serial
SCL			Control
			Logic
SDA
			Address		X		EEPROM
			Logic		DEC
							Page Logic
							Y DEC
							Dout/ACK
							IEB02525

Figure 2

Block Diagram

Semiconductor Group

8

1999-02-02

SLx 24C64

3 I2C-Bus Characteristics

Access to the SLx 24C64 device is given via the I2C bus. This bidirectional bus consists of two wires SCL and SDA for clock and data. The protocol is master/slave oriented, where the serial EEPROM always takes the role of a slave.

				VCC
	Slave 1	Slave 2	Slave 3	Slave 4
	SCL
Master	SDA
	Slave 5	Slave 6	Slave 7	Slave 8
				VCC
				IES02183

Figure 3

Bus Configuration

Master	Device that initiates the transfer of data and provides the clock for transmit
	and receive operations.

Slave Device addressed by the master, capable of receiving and transmitting data.

Transmitter The device using the SDA as output is defined as the transmitter. Due to the open drain characteristic of the SDA output the device applying a low level wins.

Receiver The device using the SDA as input is defined as the receiver.

Semiconductor Group

9

1999-02-02