Siemens HYM322005S-60, HYM322005GS-50, HYM322005GS-60, HYM322005S-50 Datasheet
2M × 32-Bit Dynamic RAM Module
(Hyper Page Mode - EDO Version)
• SIMM modules with 2 097 152 words by 32-bit organization
for PC main memory application
• Fast access and cycle time
50 ns access time
84 ns cycle time (-50 version)
60 ns access time
104 ns cycle time (-60 version)
• Hyper page mode - EDO capability with
20 ns cycle time (-50 version)
25 ns cycle time (-60 version)
• Single + 5 V (± 10 %) supply
HYM 322005S/GS-50/-60
• Low power dissipation
max. 2200 mW active (-50 version)
max. 1980 mW active (-60 version)
CMOS – 22 mW standby
TTL – 44 mW standby
• CAS-before-RAS refresh, RAS-only-refresh, Hidden refresh
• 4 decoupling capacitors mounted on substrate
• All inputs, outputs and clock fully TTL compatible
• 72 pin Single in-Line Memory Module
• Utilizes four 1M × 16 -DRAMs in SOJ-42 packages
• 1024 refresh cycles / 16 ms
• Optimized for use in byte-write non-parity applications
• Tin-Lead contact pad HYM 322005S
• Gold-Lead contact pad HYM 322005GS
• single sided module with 20.32 mm (800 mil) height
Semiconductor Group 1
1 9.96
HYM 322005S/GS-50/-60
2M × 32-Bit EDO-Module
The HYM 322005S/GS-50/-60 is a 8 MByte EDO - DRAM module organized as 2 097 152 words by
32-bit in a 72-pin single-in-line package comprising four HYB 5118160BSJ 1M × 16 EDO - DRAMs
in 400 mil wide SOJ-packages mounted together with four 0.2 µF ceramic decoupling capacitors on
a PC board.
Each HYB 5118165BSJ is described in the data sheet and is fully electrically tested and processed
according to Siemens standard quality procedure prior to module assembly. After assembly onto
the board, a further set of electrical tests is performed.
The speed of the module can be detected by the use presence detect pins.
The common I/O feature on the HYM 322005S/GS-50/-60 dictates the use of early write cycles.
Ordering Information
Type Ordering Code Package Descriptions
HYM 322005S-50 Q67100-Q2066 L-SIM-72-10 EDO - DRAM module
(access time 50 ns)
HYM 322005S-60 Q67100-Q2067 L-SIM-72-10 EDO - DRAM module
(access time 60 ns)
HYM 322005GS-50 Q67100-Q2068 L-SIM-72-10 EDO - DRAM module
(access time 50 ns)
HYM 322005GS-60 Q67100-Q2069 L-SIM-72-10 EDO - DRAM module
(access time 60 ns)
Semiconductor Group 2
VSS 1 DQ0 2
DQ16 3 DQ1 4
DQ17 5 DQ2 6
DQ18 7 DQ3 8
DQ19 9 VCC 10
N.C. 11 A0 12
A1 13 A2 14
A3 15 A4 16
A5 17 A6 18
N.C. 19 DQ4 20
DQ20 21 DQ5 22
DQ21 23 DQ6 24
DQ22 25 DQ7 26
DQ23 27 A7 28
N.C. 29 VCC 30
A8 31 A9 32
RAS3
33 RAS2 34
N.C. 35 N.C. 36
HYM 322005S/GS-50/-60
2M × 32-Bit EDO-Module
Pin Names
A0-A9 Address Inputs
DQ0-DQ31 Data Input/Output
- CAS3 Column Address Strobe
CAS0
- RAS3 Row Address Strobe
RAS0
WE
V
CC
V
SS
PD Presence Detect Pin
N.C. No Connection
Read/Write Input
Power (+ 5 V)
Ground
N.C. 37 N.C. 38
VSS 39 CAS0
CAS2
41 CAS3 42
CAS1
43 RAS0 44
RAS1
45 N.C. 46
WE
47 N.C. 48
DQ8 49 DQ2450
DQ9 51 DQ2552
DQ10 53 DQ26 54
DQ11 55 DQ27 56
DQ12 57 DQ28 58
VCC 59 DQ29 60
DQ13 61 DQ30 62
DQ14 63 DQ31 64
DQ15 65 N.C. 66
PD0 67 PD1 68
PD2 69 PD3 70
N.C. 71 VSS 72
40
Pin Configuration
Presence Detect Pins
-50 -60
PD0 N.C. N.C.
PD1 N.C. N.C
PD2
PD3
V
SS
V
SS
N.C.
N.C.
Semiconductor Group 3
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