This device is a 64 MBit dynamic RAM organized 4 194 304 by 16 bits. The device is fabricated in
SIEMENS/IBM most advanced first generation 64Mbit CMOS silicon gate process technology. The
circuit and process design allow this device to achieve high performance and low power dissipation.
This DRAM operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or
LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)160T to be packaged in a 500
mil wide TSOP-54 plastic package. These packages provide high system bit densities and are
compatible with commonly used automatic testing and insertion equipment.
Ordering Information
TypeOrdering
Code
HYB 3164160T-50on requestP-TSOPII-54-1 500 mil DRAM (access time 50 ns)
HYB 3164160T-60on requestP-TSOPII-54-1 500 mil DRAM (access time 60 ns)
HYB 3165160T-50on requestP-TSOPII-54-1 500 mil DRAM (access time 50 ns)
HYB 3165160T-60on requestP-TSOPII-54-1 500 mil DRAM (access time 60 ns)
* Pin 35 is A12 for HYB 3164160T and N.C. for HYB 3165160T
Pin Configuration
Semiconductor Group7
TRUTH TABLE
HYB 3164(5)160T-50/-60
4M x 16-DRAM
FUNCTION
Standby
Read:Word
Read:Lower Byte
Read:Upper Byte
Write:Word
(Early-Write)
Write:Lower Byte
(Early-Write)
Write:Upper Byte
(Early Write)
Read-ModifyWrite
Fast Page Mode
Read (Word)
Fast Page Mode
Read (Word)
1st
Cycle
2nd
Cycle
RAS LCASUCASWRITEOEROW
ADD
COL
ADD
HH - XH - XXXXX
LLHHLROWCOL
LLHHLROWCOL
LHLHLROWCOL
LLLLXROWCOL
LLHLXROWCOL
LHLLXROWCOL
LLLH - LL - H ROWCOL
LH - LH - LHLROWCOL
LH - LH - LHLn/aCOL
I/O1I/O16
High Impedance
Data Out
Lower Byte:Data Out
Upper-Byte:High-Z
Lower Byte:High-Z
Upper Byte:Data Out
Data In
Lower Byte:Data Out
Upper-Byte:High-Z
Lower Byte:High-Z
Upper Byte:Data Out
Data Out, Data In
Data Out
Data Out
Fast Page Mode
Early Write(Word)
Fast Page Mode
Early Write(Word)
Fast Page Mode
RMW
Fast Page Mode
RMW
RAS only refresh
CAS-before-RAS
refresh
Test Mode Entry
Hidden Refresh
(Read)
Hidden Refresh
(Write)
1st
Cycle
2nd
Cycle
1st
Cycle
2st
Cycle
LH - LH - LLXROWCOL
LH - LH - LLXn/aCOL
LH - LH - LH - LL - H ROWCOL
LH - LH - LH - LL - H n/aCOL
LHHXXROWn/a
H - L LLHXXn/a
H - L LLLXXn/a
L-H-LLLHLROWCOL
L-H-LLLLXROWCOL
Data In
Data In
Data Out, Data In
Data Out, Data In
High Impedance
High Impedance
High Impedance
Data Out
Data In
Semiconductor Group8
HYB 3164(5)160T-50/-60
4M x 16-DRAM
Block Diagram for HYB 3164160T
Semiconductor Group9
HYB 3164(5)160T-50/-60
4M x 16-DRAM
Block Diagram for HYB 3165160T
Semiconductor Group10
HYB 3164(5)160T-50/-60
4M x 16-DRAM
Absolute Maximum Ratings
Operating temperature range..............................................................................................0 to 70 ˚C
Storage temperature range.........................................................................................– 55 to 150 ˚C
Input/output voltage..................................................................................-0.5 to min (Vcc+0.5,4.6) V
Power supply voltage....................................................................................................-0.5V to 4.6 V
Power dissipation......................................................................................................................1.0 W
Data out current (short circuit)..................................................................................................50 mA
Note
Stresses above those listed under „Absolute Maximum Ratings“ may cause permanent damage of
the device. Exposure to absolute maximum rating conditions for extended periods may effect device
reliability.
DC Characteristics
T
= 0 to 70 ˚C,
A
V
= 0 V,
SS
V
= 3.3 V ± 0.3 V, (values in brackets for HYB 3165160T)
CC
ParameterSymbolLimit ValuesUnit Note
min.max.
Input high voltage
Input low voltage
Output high voltage (LVTTL)
V
V
V
IH
IL
OH
2.0Vcc+0.3V1)
– 0.30.8V1)
2.4–V
Output „H“ level voltage (Iout = -2mA)
Output low voltage (LVTTL)
V
OL
–0.4V
Output „L“level voltage (Iout = +2mA)
Output high voltage (LVCMOS)
V
OH
Vcc-0.2 -V
Output „H“ level voltage (Iout = -100uA)
Ouput low voltage (LVCMOS)