Siemens BTS734L1 Datasheet

Smart Two Channel Highside Power Switch
PROFET® BTS 734 L1
Features
Overload protection
Current limitation
Short-circuit protection
Thermal shutdown
Overvoltage protection
(including load dump)
Fast demagnetization of inductive loads
Reverse battery protection
Undervoltage and overvoltage shutdown
with auto-restart and hysteresis
Open drain diagnostic output
Open load detection in ON-state
CMOS compatible input
Loss of ground and loss of V
Electrostatic discharge (ESD) protection
1
)
protection
bb
Product Summary
Overvoltage Protection Operating voltage
On-state resistance Nominal load current Current limitation
Application
µC compatible power switch with diagnostic feedback
for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitive loads
Replaces electromechanical relays, fuses and discrete circuits
V
bb(AZ)
V
bb(on)
43 V
5.0 ... 34 V
active channels: one two parallel
R
ON
I
L(NOM)
I
L(SCr)
40 20
4.8 7.3 A 19 19 A
m
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection functions.
Pin Definitions and Functions
Pin Symbol Function
1,10, 11,12, 15,16, 19,20 3 IN1 Input 1,2, activates channel 1,2 in case of 7 IN2 logic high signal 17,18 OUT1 Output 1,2, protected high-side power output 13,14 OUT2 of channel 1,2. Design the wiring for the max.
4 ST1 Diagnostic feedback 1,2 of channel 1,2, 8 ST2 open drain, low on failure 2 GND1 Ground 1 of chip 1 (channel 1) 6 GND2 Ground 2 of chip 2 (channel 2) 5,9 N.C. Not Connected
V
bb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance
short circuit current
Pin configuration
Vbb1
GND1 2 19 V
IN1 3 18 OUT1
ST1 4 17 OUT1
N.C. 5 16 V
GND2 6 15 V
IN2 7 14 OUT2
ST2 8 13 OUT2
N.C. 9 12 V
Vbb10 11 V
(top view)
20 V
bb bb
bb bb
bb bb
)
1
With external current limit (e.g. resistor R connection, reverse load current limited by connected load.
=150 Ω) in GND connection, resistor in series with ST
GND
Semiconductor Group 1 10.96
Block diagram
Two Channels; Open Load detection in on state;
3
4
1
Signal GND
Chip 1
IN1
ST1
GND1
ESD
Voltage
source
V
Logic
Voltage
sensor
Logic
Overvoltage
protection
Charge pump
Level shifter
Rectifier
Chip 1
Current
limit
unclamped
ind. loads
Open load
detection
Gate
protection
Limit for
Temperature
sensor
R
O1
GND1
BTS 734 L1
+ V
bb
Leadframe
OUT1
17,18
Load GND
Load
7
8
6
Signal GND
Chip 2
Logic and protection circuit of chip 2
(equivalent to chip 1)
IN2
ST2
GND2
Chip 2
PROFET
Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20
R
O2
GND2
+ V
Leadframe
bb
OUT2
13,14
Load
Load GND
Maximum Ratings
at
= 25°C unless otherwise specified
j
T
Parameter Symbol Values Unit
Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection
T
= -40 ...+150°C
j,start
V V
bb bb
43 V 34 V
Semiconductor Group 2
BTS 734 L1
)
Maximum Ratings at
T
= 25°C unless otherwise specified
j
Parameter Symbol Values Unit
Load current (Short-circuit current, see page 5)
)
Load dump protection
)
3
R
= 2 Ω,
I
t
= 200 ms; IN = low or high,
d
each channel loaded with
2
V
LoadDump
R
= 2.8 Ω,
L
=
U
+
V
,
A
U
s
Operating temperature range Storage temperature range Power dissipation (DC) (all channels active)
5)
T T
= 13.5 V
A
= 25°C:
a
= 85°C:
a
I
L
V
Load dump
T
j
T
stg
P
tot
self-limited A
)
4
-40 ...+150
60 V
°C
-55 ...+150
3.8
W
2.0
Inductive load switch-off energy dissipation, single pulse V
= 12V,
bb
I
= 4.8 A, Z
L
I
= 7.3 A, Z
L
see diagrams on page 10
Electrostatic discharge capability (ESD
T
= 150°C5),
j,start
= 44 mH, 0 Ω one channel:
L
= 44 mH, 0 Ω two parallel channels:
L
E
V
AS
ESD
0.65
1.5
1.0 kV
(Human Body Model) Input voltage (DC) Current through input pin (DC) Current through status pin (DC)
see internal circuit diagram page 8
V I I
IN ST
IN
-10 ... +16 V ±2.0
mA
±5.0
J
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ max
Thermal resistance junction - soldering point
junction - ambient
)
2
Supply voltages higher than V 150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input protection is integrated.
3)
R
= internal resistance of the load dump test pulse generator
I
4)
V
Load dump
)
5
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm connection. PCB is vertical without blown air. See page 16
)
6
Soldering point: upper side of solder edge of device pin 15. See page 16
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
5)
5),6)
each channel:
one channel active:
all channels active:
require an external current limit for the GND and status pins, e.g. with a
bb(AZ)
R
thjs
R
thja
2
(one layer, 70µm thick) copper area for V
-- -- 11
--
--
40 33
K/W
--
--
bb
Semiconductor Group 3
Electrical Characteristics
BTS 734 L1
Parameter and Conditions,
at Tj = 25 °C,
V
= 12 V unless otherwise specified
bb
each of the two channels
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT) IL = 2 A each channel,
two parallel channels,
T
= 25°C:
j
T
= 150°C:
j
T
= 25°C:
j
Nominal load current one channel active:
two parallel channels active:
Device on PCB5),
T
= 85°C,
a
T
150°C
j
Output current while GND disconnected or pulled
up; V
= 30 V,
bb
Turn-on time Turn-off time IN to 10%
R
= 12 Ω
L
T
,
Slew rate on 10 to 30% Slew rate off
70 to 40%
V
= 0, see diagram page 9
IN
)
7
IN to 90%
=-40...+150°C
j
7)
V V
7)
OUT
OUT
R
,
,
R
L
L
= 12 Ω
= 12 Ω
T
,
,
=-40...+150°C:
j
T
=-40...+150°C:
j
V V
OUT OUT
: :
Symbol Values Unit
min typ max
R
ON
I
L(NOM)
I
L(GNDhigh)
t
on
t
off
dV/dt
on
-dV/dt
off
--
36 67
18
4.4
6.7
4.8
7.3
-- -- 10 mA
80 80
180 250
350 450
0.1 -- 1 V/µs
0.1 -- 1 V/µs
m
40 75
20
-- A
µs
Operating Parameters
)
Operating voltage
8
Undervoltage shutdown Undervoltage restart
T
=-40...+150°C:
j
T
=-40...+150°C:
j
T
Undervoltage restart of charge pump see diagram page 14
T
=-40...+150°C:
j
Undervoltage hysteresis
V
bb(under)
Overvoltage shutdown Overvoltage restart Overvoltage hysteresis Overvoltage protection
I
= 40 mA
bb
=
V
bb(u rst)
-
V
bb(under)
)
9
T
=-40...+150°C:
j
T
=-40...+150°C:
j
T
=-40...+150°C:
j
T
=-40...+150°C:
j
Standby current, all channels off V
= 0
IN
)
7
See timing diagram on page 12.
8)
At supply voltage increase up to
9)
see also
V
ON(CL)
in circuit diagram on page 8.
V
= 5.6 V typ without charge pump,
bb
=-40...+25°C:
j
T
=+150°C:
j
T
=25°C
j
T
=150°C:
j
:
V
bb(on)
V
bb(under)
V
bb(u rst)
V
bb(ucp)
V
bb(under)
V
bb(over)
V
bb(o rst)
V
bb(over)
V
bb(AZ)
I
bb(off)
V
5.0 --
3.5 --
-- -- 5.0
-- 5.6 7.0 V
-- 0.2 -- V
34 -­33 -- -- V
-- 0.5 -- V
42 47 -- V
OUT
--
--
V
bb
16 24
- 2 V
34 V
5.0 V
7.0
43 V
40
µA
50
V
Semiconductor Group 4
BTS 734 L1
)
j
Parameter and Conditions,
at Tj = 25 °C,
V
= 12 V unless otherwise specified
bb
Leakage output current (included in
= 0
=
I
GND1
+
I
GND2
10)
,
V
IN
,
IN
V
Operating current
I
GND
each of the two channels
I
bb(off
= 5V,
=-40...+150°C
T
one channel on:
two channels on:
Protection Functions
Initial peak short circuit current limit,
diagrams, page 13)
each channel,
(see timing
two parallel channels
Repetitive short circuit current limit,
T
=
T
each channel
j
jt
two parallel channels
(see timing diagrams, page 13)
Initial short circuit shutdown time
T T
(see page 11 and timing diagrams on page 13)
Output clamp (inductive load switch off) at V
ON(CL)
= Vbb - V
OUT
Thermal overload trip temperature Thermal hysteresis
)
=-40°C:
j
T
=25°C:
j
T
=+150°C:
j
T
=-40°C:
j,start
= 25°C:
j,start
11)
Symbol Values Unit
min typ max
I
L(off)
I
GND
I
L(SCp)
-- -- 20
--
--
47 35 21
1.8
3.6
55 44 26
µ
48mA
66 54 34
twice the current of one channel
I
L(SCr)
t
off(SC)
V
ON(CL)
T
jt
T
jt
--
--
--
--
19 19
2.5
--
--
3
----ms
41 47 -- V
150 -- -- °C
-- 10 -- K
A
A
A
Reverse Battery
)
Reverse battery voltage Drain-source diode voltage
= - 4.8 A,
L
I
)
10
Add
11
12
)
)
I
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest V
ON(CL)
Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 8).
ST
, if
j
T
I
ST
= +150°C
> 0
12
(V
out
> Vbb)
-
V
bb
-
V
ON
-- -- 32 V
-- 600 -- mV
Semiconductor Group 5
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