Sharp MZ-800, MZ-1P16, MZ-1E20 Service Manual

SHARP

SERVICE MANUAL

CODE :

OOZMZ8OOIIIIE

PERSONAL COMPUTER

MODEL

MZ-800
MZ-1P16
MZ-1E20

Table of contents

t,

Specification

..

2.

Parts identification

..

3.

Systemdiegram

..

4.

Systemdescriplion

..

4·',

Memorymep

..

4-2.

CustomLSI

.....

4-2-1.

Memoryconlroller

...

4-2-2.

VOcontroller

..

4-2-3. Clock generator end

timing

generator

..

4-2-4. Display address generator

...

4-2-5. Scroll control circuit .....

. .................................... 4

................................................... 6

..

9

9
9

.

.......................

12

.. ......... 12

..

.....

13

. ......................................... 15

4·2·6. VRAMdeta

inputloutpulcircuil

..

4-2-7. Register functions

....

. ............................................................. 20

4-2-8. Pal1etcircuit .....

..

...........

25

4-2-9.

CRTC

register

map

•.

.

................................

26

4-2-10.

ROMconfigufation

...

.. ............................................. 27

4-3. 8255 Programmable Peripheral Interface

...

4-4. 8253 Programmable Interval

Timer

..

.........

................................ 27

..

......

31

4-5. Printer interface

..

4-6. Programmable sound generator

.•

4-7. Joystick

..

4-8.Systemswitchsetups

...

5.

Powersupply

.....

MZ-1P16

.....

. ..................................................

31

.................................................................. 34

. ........

35

. .....................................................

35

..

......................................................... 35

. ...................................................

35

SHARP CORPORATION

1

SpedfIution

-f-

I-

t I

;:'

-

:::.

..

.

Dicpl'vmethod

.CoIor

8'lm.p

.....

thod

-

Resolution

PCGmalhocl

320

>e

200

...

,

,..

OP 320>e2OO

10<121

~~

>e

2OO

10<121

Colo<

..

slgn ....... 1

_I---

----

~of18co1ort;

Se'Mn.ndchl.KtIt

Se.Mn 900'.ochltac:t

...

"'coIofl

ChOHn

out

of

1ScaIO,.

~

......

tlon

_+---+

==",-

~

__

~keOfI8caIO"

Cen"onlclinterl_

=:!.~-dtofd

~n~l~naISPllk"

P\o!point

..

VI""'output

Joystick

RF,VIDEO

,AnalagRG8woth

tI

••

Ml-820FI

I'ntlrlac.'

Ml-700 -

"'ItB

W.fJOO-8ItB

CG

- "'1t8

~h'ndling



~_Ienc:oc*

M!~7~moo.only

~

-

''''''''

180< '''',

c:oIora

~0:010010

~

•••

glnl"'ed

-

...,.

~~

Cen"-Mitc:hldtaMl

interl_

C%rInCOderIPALI
'ThI1'lfmlna',oldd

fO<IheRGBllrmlnl'

AlAR,

compatibll

ijo'flitickdldlcatedl

~

-

~

----+

TO'_

:::.O'-

"'"'

......

--,

"'

c----I'

~""c:::"'2:::.:ii_

RS-232C OP

Joyllick

density MZ-88,03

-o;;t;;;",,,ixp<lntlr

PlOt

printer

ATAAlcompat,bll
W-1E19,MZ·1Fl1

MZ.'0'lcomPl~

:~'.:::",PI"~

_

Ml-1P18

St.ttu.SC£I011

2.

Parts identification

I Front

view

I

Definable keys

RF

connector

Main keyboard

Channel knob
(home TV

channel selection)

BW/color select switch

Composite connector

RGB

connector

EXT cassette jack

Dip switch

(home

TC

cable connection)

Data recorder

POWER

lamp

Cursor

control keys

Expantion

slot

External

printer

output connector

Joystick connector

DELETE

and INSERT keys

RESET

switch

Power input

Volum!! control

2

MZ-1P16

power

supply socket (+SV)

POWER

switch

~ilZ-800

MZ-800

3. System diagram

MZ-1A18

AAMfile

MZ-1A25

Expansion RAM

MZ-1E19

MZ-1x17

MZ interface

MZ-1E20 MZ-1U06

1 U06 interfacing

PWB

Expansion

VO

box

MZ-1P16

Plot printer

MZ-1D04

12", 8-tone,

monochrome

CAT

MZ-1D19

14", 18-color, AGBI, CAT

/I~

0,

'J).oh

,

MZ-1E05

MZ-1F19

M

FD

interface

Single

floppy

disk drive

MZ-1T04

MZ-811 connection
tape recorder

MZ-8BI03

AS-232C card

MZ-SOP5(K)

MZ-1F02

Dual MFD drive

SO-column,

dot

matrix

printer

25.

/1~

JOYSTICK

ATAAI

compatible

3

MZ·1F11

MZ-6F03

MZ

driver

MZ

blank media

MZ-2Z046

DISK BASIC

MZ-2Z047

CP/M

MZ-1C30 MZ-1F19

Expansion cable

Single floppy disk drive

MZ-1C30 MZ-1F02

Expansion cable

Dual MFD drive

4. System description

Basic RAM, 64KB

KEY

CMT

VF

AMP

r-

--,

I MZ-1R18 slol I
I

(dedicated) I

L

___

-.J

PPI
8255

CTC
8253

PSG

SN76489

Expansion

slot-l

[2]'

MFD MZ-1F02

MZ-800

16

KB

l

r---'

I

l.

MZ-1P16

OP

I

r-

---

-,

L

_~

Plot printer I

l

,.--J

PlO
Z-80

PlO

MlSOP5K printer

Printer interface

r----+----.J

Joystick interface

4

VRAM

16

KB

CRTC

(Semi-cuslom)

r-

-----,

I VRAM I

I

16

KB

(OP)

HZ-1R25

L

_____

J )

--~

RS-232C

MZ-8BI03

RGBI

Video

(ATARI compatible)

o

o 0

TV

MZ-1D19

CJ1

-~

Option 16

KB

RESET

GDG

VRAM

ADR.

BUS

'17.73

MHz

VRAM DATA BUS

I-

00

~~~

t

-u

RGBI

0"

u.,

~

I

~CustomlC

OSC

556

Monitor, J I

--ffi]

16KBROM

:'~::::::~

CSROiI.1

(27128

,I

i

0=

3.547 MHz

cPU~

LJ

[

1 Z-80A

t...

OSCJ

Cursor

556

·1

RAS

VRAS

WE

CAS

ADDRESS BUS

£

~

"

0

'Cij

1

DATA BUS

T

J

"

..

CONTROL BUS

c.

)(

w --c=

Bus

driver

dn'

Peripheral

VO

bus

CTC

~

Z-80A

~rl

8253

PlO

If

fi

I

1""

General purpose

input

bus '

.~

lci7Jt

&J

PC21

II~~

~

DATA

RECORDER

AMP

L--+

___

,

PA5

PA4

SP

~

PBI

PRINTER

DATA BUS

'1L\2-

CTRLBUS I L/"""'I

PAf

I

~

r I

~fl,--I

~~--'-I

~CTRLBUS

';~

System switch

..)J

(MZ

+--+

Centronics)

External

printer

bus

aJ

,

Q.

.'

CD

iil

3

-

4-1.

Memory

map

The MZ-800 has a different

memory

map depending on

o MZ-800

memory

map

FFFF"

EOOO

0000

COOO

AOOO

01000

--

4000

2000

1000

MAIN

o-RAM

64K.

O-RAM

MZ-700

mode

r---,

~

~

ROM

~

~

VRAM

MZ-800

mode

MAIN

o-RAM

64 KB

O-RAM

MZ-800

the mode. To have

compatibility

with

the MZ-700, it has

two

modes

of

the MZ-700

mode

and MZ-800 mode.

O

[J

D

OVOR"';:

__

,

I I I I

: :

In:

lml:

~

__

J L

__

J

,.--,

1 I
1 I

: IIV) I

1 I

1 I

L

__

oJ

~

640

)(

200

mode

VRAM

320 x 200

mode

NOTE:

r--..,

1 1

:

eX):

1 1

,-

__

.J

Item within

dotted

lin.

represents

an

option

unit

MZ·1R25

Memory

map

changes

after

initial

program

loading

$0000

SI

000

$2000

$8000

SEooo

SFFFF

® Power on (resel)

MZ-800

mode

MON. ROM

CG.ROM

DRAM

V-RAM
(320x2oo

mode)

DRAM

MON. ROM

@

At

start

of

monitor

MZ-700

mode

$0000

r------,

MON.

ROM

$1000

r-----;

LD

A, 08H

OUT (CE),

A

=>

DRAM

SDOOO

V-RAM
SEooo
SE010

I<.!'Y.

nM~K

MON. ROM

SFFFF

•

Memory

map at

power

on is in the MZ-800

mode

as

in

®,

but

it

changes

to

the MZ-700

mode

by the

monitor

ROM

when

the

monitor

program

starts.

After

transferring the

CG

data

to

the

VRAM

PCG

area

from

the

CG

ROM at @, the

memory

map

then returns

to

®.

• When the system

program

is completed

to

load,

the

memory

map goes

into

the MZ-700

mode

if

the

system switch (SW1) is set

to

ON side.

If

set

to

OFF

side,

it

changes

to

the MZ-800 mode, then the

memory

map

as

in @. During those changes, all

memory

spaces are composed

of

RAM and isolated

from

ROM and VRAM.

IN

(EOH),

A

=>

©

Wril.

10

PeG

from

CG

MZ-7oo

mode

$0000

$1000

$2000

MON. ROM

CG.ROM

D-RAM

@ System operation

MZ-7oo & 800 modes

$0000

D-RAM

IN

(El

H), A

~

6

SCOOO

V-RAM (CG)

SDOOO

SEooo

V-RAM

SE010

MON. ROM

SFFFF

SFFFF

L...

___

---'

• Depression

of

the manual reset switch assumes

memory

map transition in order

of

®

~ ® ~ @ ~

®,

similar

as in the case

of

power

on.

• However, depression

of

the reset switch in conjunc-

tion

with

the I CTRL I key assumes the

memory

map

of

@ after being changed once

to

the

MZ-700

or

MZ-800

mode

depending on the state

of

the system switch.

In

the case

of

the

MZ-800 mode,

it

is set

to

the plane I.

IT

(4-color mode)

of

the

320 x 200 mode.

MZ-800

~

port

SEO

MODE

-

Function o

SOOOO

- S7FFF

to

DRAM.

0000

1000

2000

3000

4000

DRAM

5000

6000

7000

8000

I

9000

I

I

Aooo

I

I

BOOO

I

COOO

I
I

Dooo

I

I

EOOO

I

E070

Fooo

I

I

FFFF

L

__

..J

Memory Sank Control

SEl

SE2

SE3 SE4

MZ-7oo

mode

MZ-SOO

mode

-

MZ-7oo

mode

MZ-SOO

mode

MZ-7oo

mode

MZ-800

mode

o Soooo -

SFFFF

o SEooo -

SFFFF

o

SOOOO -$OFFF

o

$0000 -SFFFF

o SEooo -

SFFFF

o

SOOOO -$OFFF o SOOOO -$OFFF

to

DRAM.

to

DRAM.

to

monitor

to

VRAM,

key

to

monitor

to

monitor

to

monitor

ROM.

timer,

and

ROM.

ROM. ROM.

monitor

ROM.

o

Slooo

- $CFFF o

Slooo

- SlFFF

to

DRAM

to

CG

ROM.

o

Soooo

- $FFFF o S2000 - $7FFF

to

VRAM,

key

and

timer,

and

$Cooo

-

SDFFF

monitor

ROM.

to

DRAM.

o

$8000 -

SBFFF

to

VRAM

(NOTE).

o SEooo

-

SFFFF

to

monitor

ROM.

i--l

,---,

MONITOR

'--I

1--'

MONITOR

MONITOR

I I

ROM

I

I

I

I

ROM

ROM

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

DRAM

CG
ROM

DRAM

I

I

I

V

RAM

I

r--

---

I

I

I

I

(NOTE)

I

I
I

I
I

I

DRAM

I

I

V

RAM

I

V

RAM

B

I

KEY, TIMER

DRAM

I

I

MONITOR

MONITOR
ROM

I

ROM

I

L

__

J

Area

within

dotted

line

does

not

involve

change.

DEY,

nMER

MONITOR
ROM

MONITOR
ROM

----1

(NOTE): In

the

case

of

320 x 200

mode,

contents

of

$8000 - $9FFF are

transferred,

instead,

and

those

after

$Aooo are

transferred

to

DRAM.

Power

on

or

RESET

input

7

MZ-800

~rt

OUT

(SE5)

OUT

(SEe)

IN

(SEO)

IN

(SE1)

MODE

MZ-700

mode

MZ-800

mode

MZ-700

mode

MZ-800

mode

MZ-700

mode

MZ-800

mode

MZ-700

mode

MZ-800

mode

Function

o

SDOOO

- S7FFF o

SEOOO -SFFFF

o

SDOOO -SFFFF o SEOOO -SFFFF

o S1000 - S1FFF o S1000 -

S1

FFF

o S1000 - S1FFF

o S1000 -

S1

FFF

prohibited.

prohibited.

returned

to

returned

to

toCG

ROM.

toCG

ROM.

returned

to

returned

to

the

state

be-

the

state be-

o

SCOOO -SCFFF

o $8000 - SBFFF

the

state ba-

the

state ba-

fore

prohi-

fore

prohi-

toVRAM

(PCG

to

VRAM

fore

CG

was

fore

CG

was

bited. bited.

RAM).

(NOTE).

set.

set.

o

SCOOO -SCFFF

o $8000 -

SBFFF

to

DRAM.

to

DRAM.

0000

r--l

I--l

1--'

1--,

,---,

1--,

,---,

r--,

I

I

I

I

I

I

I

I

I

I

I

I

1000

I

B B

I

I

I

R

Q8

I

ROM

ROM

2000

I

I

I

I

I

I

I

I

I

I

I

I

I

I

3000

I

I

I

I

I

I

I

I

I

I

4000

I

I

I

I

I

I

I

I

I

I

5000

I

I

I

I

I

I

I

I

I

I

I

I

8000

I

I

I

1

I

I

7000

1

I

1

1

I

I

'1

I

I

I

I

8000

I

1

9000

I

1

V

RAM

I

1

Aooo

I

I

----

DRAM

1

I

Booo

1

I

(NOTE)

Cooo

I

~

I

V

RAM

I

(CGRAM)

I

1

DOOO

1

I

I

Eooo

I

I

I

I

Prohibited

State

before

1

I

I

prohibited

I

I

I

Fooo

Prohibited

State

before

I

I

I

I

I

prohibited

I

I

1

I

I

I

L

__

J

FFFF

L

__

-.l

L

__

-.l

L

__

.J

8

MZ-800

4-2. Custom

LSI

The custom

LSI

is a 100-pin single

chip

LSI

on which the

MZ-800

memory

controller (I/O controller) and

CRT

controller, etc. are contained.

4-2-1. Memory controller

Used

for

the control

of

the

memory

bank. Addressing

of

DRAM, ROM, and VRAM is conducted by selection I/O

address,

$EO

- $E6, using OUT

or

IN

command.

I/O

Signal

Device (I/O)

address name

4-2-2. 1/0 controller

In this I/O controller is created the select signal

for

assignment

of

MZ-800 internal device.

See

Table-2

for

relation

of

internal device vs

I/O

address.

Function

FF

Port

B,

printer data

output

FE

CPR

Z80A Port A, printer control and

timer

interrupt

FD

PlO (I/O)

Port B control (Mode

0)

FC

Port A control (Mode

3)

F2

PSG

PSG

(0)

PSG

output

port

F1

JOY

JOYSTICK

(I)

Joystick-2

input

port

FO

Joystick-1

input

port

FO

--

(0)

Pallet

write

E6

1

--

--

(110)

Memory

bank control

EO
D7

Control

port

output

D6

C53

8253 (I/O)

Counter-2

(NOTE):

Mapped

to

E007

- E004 in the

D5

Counter-1 MZ-700 mode.

D4

Counter-O

D3

Control

D2

KEY

8255

(110)

Port

C,

cassette, etc.

(NOTE):

Mapped

to

E003 -EOOO

in the

D1

Port

B,

key

input

MZ-700 mode.

DO

Port A, key strobe

output

CF

0

CE

I/O

CRTC

register

CD

--

--

0

CC

0

$E008

--

--

I/O

TEMP, HBLK

input;

and 8253

GO

ON/OFF

output

for

the MZ-700

mode

only.

* When above I/O address is accessed,

it

makes 10WR active

for

OUT

or

lORD

for

IN

command.

9

MZ-800

Pin

Signal name

1/0

Functional description

Note

No.

1

CPU

0

CPU

clock (3.547 MHz)

2

5V

-

Power

supply

3

GND -

Ground

4

ADO

I

I

I

CPU

address bus

19

ADF

20

DTO

I

I

1/0

CPU

data bus

27

on

28

GND -

Ground

-----0---

VCC

Power

supply

29

-

--30

MREO

I

CPU

MREQ signal

Negative logic

--

31

RD

I

CPU

RD

signal

Negative logic

32

WR

I

CPU

WR

signal

Negative logic

33

RFSH I

CPU

RFSH signal

Negative logic

34

IORQ

I

CPU

lORQ

signal

Negative logic

e----,.;-----

I---

I

CPU

Ml

signal

Negative logic

35

Ml

---36-

--

SEL1

0

System RAM address

multiplexer

select signal

37

CASB 0

System RAM

column

address strobe signal

~8

INH5 0

Inhibit bank (OUT

$E5)

select signal (uH" = Inhibit).

OPEN

f------

0

Vertical blanking signal

Negative logic

39

VBLN

1--

40

GND

-

41

VRAS 0

VRAM

RAS

control signal

Negative logic

42

IJCli:S

0

VRAM CAS control signal

Negative logic

-

43

VADO

I

I

0

VRAM address signal (multiplexer

output)

50

VAD7

_._--

51

VOE

0

VRAM

output

enable

Negative logic

52

VCC

-

Power

supply

53

GND

-

Ground

54

VRWR

0

VRAM

write

signal

Negative logic

55

VAO

I

I

1/0

VRAM data bus (standard RAM)

62

VA7

---

63--f--

VCO

I I

1/0

VRAM data bus (option RAM)

70

VC7

I----

i

,--

I-----

SBCR

0

Color sub-carrier wave

--ii--

I----

RED

0

Video signal, red

--73--

BLUE 0

Video signal, blue

-~---

----GREN

0

Video signal, green

1-----

YITN 0

Brightness control signal

75

1-------

VSYN

0

Vertical sync signal

Negative logic

76

77

HSYN

0

Horizontal sync signal

Negative logic

f---

--

GND

78

-

------

-.

---

79

VCC

-

80

CLKO

I

Clock

input

(17.7344 MHz)

-_

..

_---

81

CROM

0

ROM chip enable

Negative logic

-8-2-

KEY

0

8255 chip enable

Negative logic

---a3-

f------NTpL

I NTSC/PAL selection (PAL -

"L")

GND

--

--------f----

I Test pin

("H"

- test mode)

GND

~~=p~SD~

I

MZ-700/800

mode

selection

("L"

= MZ-700 mode)

86

lOWR 0

Sum

of

CS

and

WR

of

1/0

controlled

by

the

custom

IC

Negative logic

C---

S7

--

lORD

0 Sum

of

CS

and

RD

of

1/0

controlled

by

the custom

IC

Negative logic

-------aa--

--------cR

S

0

1/0

$BO

- $B4 chip enable

OPEN

89

SIO

0

1/0

$F4

$F7

chip enable

OPEN

90

RSTO

0

Reset

output

Negative logic

f--

-----

I

Manual reset

input

Negative logic

91

MNRT

92

PORT

---

I

Power on reset

input

Negative logic

93

WTGD 0 Wait signal

to

CPU

Open drain

94

JOY

0 Joystick chip enable

Negative logic

95

CPR

0

PlO chip select

Negative logic

96

PSG

0 76489 chip select

Negative logic

97

CKMS

0

8253 musical interval clock

1------g8

53G

0 8253 musical interval ONIOFF gate signal

---

99

C53

0 8253 chip enable

Negative logic

100

TEMP

I MZ-700 mode, $E800

tempo

input

* Term "OPEN" represents the signal

not

used on the board.

10

MZ-800

Pin

conflgur.tlon

GNO

ADO

AOl

AD'

AD7

...

AOO

AOA

ADO

ADC
AOO

AD'

OTO

on

072
073

0"

0"

on
on

GNO

TlM'

m

~G

JOY

IIOIIT

IIISTO

CI"$

IOWR

TEST

KEY

C&3

CKMS

CIJR

MOO

MNIfT

SIC

lORD

MOO'

Mm

CJIIOM

""IIJ

lO!SH

lilT

~

VI[R

VJIA!"

VADO

VA02

VA04

VAD6

WJr

~

SEll

[NHS

GND

~

VAD' VADJ

VAOS

VA07

GNO

.....

......

~TN

G"N

BlUE

••

0

sac.

VC>

VCI

vet;

\IC4

VC,

VC2

VC.

\/CO

VA7

VAB
VAS

VM

VA3

VA2
VA1

VAD

.....

GNO

Custom

LSI

block diagram

VSYN

SBCR

HSYN

VBlN

CKMS

CPU

CLKO
NTPL

ADO

- F

DTO

-7

RD
WR
MREO
M1

10RO

RFSH

CROM
SEL1
CASB
INHS

CPR
KEY
C53

53G

JOY

PSG

CRS

SIO

lORD

10WR

WTGD

,16

8

I

Clock generator &
timing

generator

CPU

address

CPU

CPU

VF

CONTROL

t--

Memory

I--

controller

----

110

controller

WAIT

controller

•

--1

Display address

generator

-

~

DATA I

)~

MPX

I

R~iSplay

contro

T

.--

register

+

~

Rscroll

register~

I--

Scroll circuit

!

t

~

MPX

l

VRAM address
controller

!

r

MPX

l

1 VRAM 1

-I

Timing control 1

VRAS

11

8

VCAS

VRWR

VADO-7

VROE

Vcc

2,

29,

52,

79,

pin

GND

3,

28,

40,

53,

78 pin

PORT

MNRT

RESET

I

-

Input
BUFF

-

Pallet
circuit

Shift

register

~

VRAM data

110

circuit

, 8

8

VAO-7

VCO-7

RSTO

MOD7

TEMP

RED
GREN
BLUE
YITN

1·

4-2-3. Clock generator and

timing

generator

Oscillation

from

the

crystal oscillator is divided

to

create

the

CPU

clock, horizontal sync, vertical sync, and dis­play address control signals.
Since the

low

state

of

signal is used

for

NTPL (NTSCI

PAL

selection)

with

the MZ-800, the

CPU

clock

of

3.547 MHz is derived

from

the

crystal frequency

of

17.734 MHz by

dividing

it

1/5.

NTPl

1>-----'

CK32 (112)

001

(114)

To

displ.-v

.dd

.....

generator

Clock generator and

timing

generator

circuits

IO,splay

mode

'egoslll')

OM02

t>----+---'

OTO-7
ICPU

dala)

IScroll regosted

,-----,

sw

Scroll

control

SSA

Display address

generator

block

diagram

VSYN

12

4-2-4. Display address generator

1)

Display address generation

MZ-800

• Display address increments

from

left

to

right

as

beginning

from

the

home

position at the upper left

corner

of

the

CRT

screen (address $000). The first

display line dominates address

$000 through $027.

Because a screen

frame

consists

of

200

rasters, the

address at the

right

side

of

the

bottom

corner is

as

follows:

(200 x 40) - 1 = 7999 =

$1

F3F

• The address counter stops counting

for

a horizontal
flyback line and stored in the address latch circuit.
When the horizontal flyback line terminates, the
address latch

output

is preset in the address counter

(display address generator).

• Address is generated even

while

the vertical flyback

line is active and

it

makes the counter reset before

termination

of

the

vertical flyback line.

2)

Display address generation in the MZ-700 mode

• Because characters are displayed under the

PCG

method

in the MZ-700 mode, address is generated

for

each character and

the

same address is used

for

displaying

of

one character. The 3-bit horizontal line

counter is provided

to

count horizontal lines

to

generate

the

address

(LCO -LC2)

for

selection

of

the
character front.
Display address increments

from

left

to

right having

the

uppermost

left corner

of

the screen

for

the home
position.
Since

25

lines are used

to

develop displaying

of

characters composed

of

8 x 8 dots, the address at

the

right

of

the

bottom

lines becomes

$3EF.

3)

Display address

multiplexed

with

CPU

address

• Address used

to

write

data

to

the

VRAM is latched in

order

to

avoid

CPU

wait. Display modes

of

640 dots

and

320

dots

are assigned by the mode switch

(DMD2).

• Display address is

multiplexed

with

the VRAM

write

address in the

timing

of

DISP which has the

timing

that

the display address and

CPU

address may

become a pseudo cycle steal.

I

MZ-800

4-2-5. Scroll

1)

Scrolling is possible

for

both

horizontal

and

vertical

directions

by

means

of

software

offset.

The

following

four

registers are

use~

for

scroll

control.

a.

Scroll start address register: SSA (7-bit)

b.

Scroll end address register: SEA (7-bit)

c.

Scroll

width

register:

SW

= SEA-SSA (7-bit)

d. Scroll offset register:

SOF (10-bit)

(

x y z

I

SEA

+--

__

I

I

I

I

!

l,

___

_

)

---

2)

Control

of

scroll starts

by

the

initialization

of

the

scroll control register.

SSA

= $0

SEA = $7D
SW

= $7D

SOF = $0

3)

Way

of

smooth

scrolling

SOF = $0 ~ $5

Programming

"SOF =

$5"

makes

the

display

screen
shifted one line up.
The highest line (address:

$0 - $27) is then assigned

to

the

lowest

line

($1

F18

-.:

$1

F3F).

As

normal

scroll

involves

updating

of

the data

for

the

lowest

line,

the

data

of

address

$1

F18 -$1

F3F

are

updated.

SOF = $5 ~ $0

By reducing the value

of

SOF

by

"5",

it

makes the

screen shifted one line

down.

SEAL-

____________________________

~

13

4)

Line scroll

SOF =

$O~

$28

Programming

"SOF =

$28"

makes

the

display screen

shifted

eight

lines up. Data on the highest line

therefore shifted

to

the

bottom

line.

Programming

"$28 ~ $0"

makes the

display

screen

shifted

eight

lines

down,

and

the

line

on

the

bottom

moves

to

the

highest

line.

5)

Screen

split

Appropriate

deviation

of

SSA. SEA, and

SW

permits

to

divide

the

screen

into

three sections

of

®,

® and

©.

Though

the

section ® is

permitted

to

scroll, sections

® and © are

not

permitted

to

scroll.

See the

figure

to

explain

with.

@

SSA-.

®

SEA-.

©

Assume

now

that

the

top

of

the

section ® is on the

5th line

(40 raster) and

the

top

of

the section © is on

the 18th line (144 raster).

Attention

must

be paid to

the fact

that

values SSA and SEA are used

for

assigning lines. Scroll registers are set

with

the

following

values.

SSA

= $19

SEA

=

$5A
SW = $41
SOF = $0

In

this

occasion,

it

needs

to

initialize

the

screen that

has been displayed.

"SOF =

$5"

must

be program-

med

to

scroll ® one line. Then,

only

the

section ® is

shifted

up, and

the

highest

line

of

® moves

to

the

bottom

line

of

®.

Programming

"SOF =

$A"

makes

it

scrolled one

more

line.

SOF ~ SW

Scroll offset (SOF)

should

necessarily be

within

a

range

of

the

scroll

width.

Display is

not

assured

with

SOF set greater than SW.

Scroll and and

control

circuit

hardware

• Block diagram

Start address

SEA-SOF

10

DA(MA)

10

7 SEA

DA(MA)

7

Scroll

width

SOF

c

Scroll offset

Relation

of

display address. SEA. SSA. vs

SOF

Display address

m

I k

j i

SSA

SSA SSA

SSA SSA SSA

6

5

4 3 2

SEA

SEA

SEA SEA SEA

SEA

6

5

4 3

2

SOF

SOF SOF

SOF

SOF SOF

9

8

7

6

5

Screen left end address

o Line 0

0 0

0 0

1 Line

0

0 0 0 0

2 Line

0

0 0 0

0

3 Line

0

0 0 0 0

8 Line

0 0 0

0

1

16 Line

0 0

0 0

24 Line

0 0 0

1

192 Line

0

199 Line

Relation

of

SW vs

SOF

SW>

SOF

h

SSA

1

SEA

1

SOF

4

0

0
0
0

0

1
1

0

0

14

MZ-800

Scroll

control

register

SSA: Scroll start address

Increment

of

SSA: $5

Minimum

value

of

SSA:

$0

Maximum

value

of

SSA:

$78

MSB

LSB

N

6

5

4 3 2

SEA: Scroll end address

Increment

of

SEA: $5

Minimum

value

of

SEA:

$5

Maximum

value

of

SEA:

$70

MSB

LSB

N

6

5

4 3

2

SW:

Scroll

width

Increment

of

SW:

$5

Minimum

value

of

SW:

$5

Maximum

value

of

SW:

$70

Relation

of

SW. SEA. vs SSA

SW

= SEA - SSA

SW>

SSA

MSB

LSB

N

6

5 4 3

2

S~

I

SOF: Scroll offset

Increment

of

SOF:

$5

Minimum

value

of

SOF:

$0

(without

offset)

Maximum

value

of

SOF: $3E8

MSB

LSB

SOF

1 I

7

6 5

4

3

2

S~F

I

MSB

LSB

SOF

21

__________

1

9

S~F

1

S~A

I

f e d I c

b a

-

-

0

SEA I

I

S~F

IS~F

S~F

I

-

SOF

3 2

I

I

I

0

0 0 0 0 0

0

0

1 0

0 0 0

First line

1 0 0 0

0 0

1 1 0 0

0

1

0 0

0 0 0 0

Second line

0

0 0 0 0 0 0

Second line

1

0 0

0

0

0 0

0 0 0 0

0

0

0

Twenty

fifth line

0

0 0 0 0

MZ-800

Concept of

the

scroll control circuit

Scroll method

• Scrolling by means

of

VRAM address conversion.

Range of scroll

• y-axis programmable.
BASIC console

command compatible

•

x-axis fixed

Scroll sequence

• The scroll start address is termed

"SSA"

and end

address

"SEA".

•

Execution

of

scroll,

with

offset given

from

the

CPU.

• One line (line

S)

starting

from

SSA disappears

from

the display screen.

• A new line (line S') is added

to

SEA. Line S' is the

same refresh

memory

as

the line

S.

The contents

of

the

memory

was erased (nullified by the

CPU)

before

the execution.

x

Fig-a Scroll area

_________

(640/320)

SS'/!

ABCDE

ABC

1

23456

1234

r--

XYZ

Line

S

~

OPORSTU

9876543

Fig-b Screen before scroll

SSA

ABCDE

A

BC

-

XYZ

OPORSTU

SEA

I--

9876543

Line

S'

Fig-c Line after scroll

15

Execution of scrolling by address conversion

• Scroll offset (SOF) is the count

of

lines which the

CPU

gives

to

the

CRTC.

For instance, the

following

must

be observed

to

perform scrolling.

3-line scroll:

SOF

3

=

OF

x 3

5-line scroll:

SOF

5

=

OF

x 5

And,

to

scroll one

more

line after 5-line scroll;

5-line scroll:

SOF5'

= SOF5 +

OF = OF

x 6

Display screen

000

SOF

SSA

t----''-------------i

A Scroll screen

o

SW

SEA

1-----1

OB

IF400

(FAOO)

• Display address DA is the signal created in the

CRTC
display address generation circuit and arranged in
their

order

from

the

upper

left corner

of

the screen.

The

bottom

right

address is 1

F400

in the 640 x

200

mode.

• Display

memory

address

DMA

represents the VRAM

address corresponding

to

DA.

Since

scroll is executed by means

of

address conver-

sion, the

order

of

DMA

may

not

be

the same

as

DA,

necessarily.

•

CPU

address

MA

is the VRAM address

that

obtained

from

the

CPU

through

the

CRTC.

To lighten burden

on the

CPU, a circuit is added

to

make order

of

DA

identical

to

order

of

MA

arrangement.

VRAM

~DMA

Fig-d Address conversion

4-2-6.

VRAM

data

input/output

circuit

1.

Nothing intervenes

for

input

and

output

of

data in the

case

of

the MZ-700 mode.

2.

MZ-800

mode

• Write
Read

data

(RD)

from

the VRAM and

write

data (WD)

from

the

CPU

are subjected

to

logical operation

accordi'1~

to

the direction

from

the

write

format

register (WF) and its result

is

written.

•

Read
For

plane read data from the VRAM, data to

be

read

by the

CPU

are arranged in accordance with the

direction

of

the read format register

(RF).

* Logic circuit

11"'0

-1

~".n.

•.

t.

11

)

\/eo

-1

t

Pl

IMII.IJJ,IV!

Read

data from the VRAM and write data from the

CPU

are subjected to logical operation

(OR,

XOR,

RESET,

etc.) and its result is used

for

the write data.

VRAM

acee

..

timing

1)

MZ-700 mode

See

separate page

for

display timing chart.

The

VRAM

is

configured in the following manner in

this instance.

VA

vc

(option)

$0000

Not used

$2000

Not

used

CG

area

$3000

TEXT area

ATB area

$3FFF

16

MZ-800

As the

PCG

method

is

adopted for the MZ-700 mode,

the text and ATB areas are

actually mapped to $0000

-

$OFFF.

So, the VRAM address

has

the following

relation

with the display character position.

1 2 3

40

:1::

1

0001

1-1

======t=a

I I I I I

I I I I I I

I I I I I I

251

03CO

I I I

-_-_~~~~

2)

MZ-800 mode
As

the bit map method is used for the MZ-800 mode,

it

is possible to four screens

of

320 x 200

dots and

two

screens (maximum)

of

640'x

200

data.

The

cycle steal method is used

for

this mode.

i)

320 x 200

dots

See

separate page

for

the timing chart

duing

display and

CPU

read timing.

What

i.

p.eudo

cycle steal
With the MZ-800, the pseudo cycle steal method is
adopted

for

VRAM accessing.

LOAO~

u

x:~~.

===:x

OISP.

addr

..

s X

cpu

address X

OISP.

add

re

..

I--

OISP.

clcle I

CPU

clcle I

OISP.

clcle

As shown in the figure, a next display data fetch and

CPU

accessing are multiplexed during a display period.

Because accessing

of

the VRAM while characters are on
display causes the screen to blink with the MZ-700
mode,

it

awaits

for

blinking to complete before

acces-

sing

of

the VRAM. But, with the cycle steal method it

enhances faster screen processing

as

it

enables to

access the

VRAM during a display period. Because

it

is

not a complete cycle steal with the MZ-800 but timing is

taken using a

wait

in order to synchronize with the

CPU

cycle

for

accessing from the

CPU,

it

is therefore called

"pseudo cycle steal

H

•

•

MZ-800

ClK

VRAS

VCAS
VOE

VAD

0-7

VAO

-7

lOAD

MZ-700 MODE DISPLAY TIMING

56.3ns

r=:

451ns

...

1

~--------------~,

,'----

''-_----'I

,

~

ROW X

COL.

X ATB. adr. X ROW X COL. X

DUMMY

adr. • X X

'-----v-----'

'---'-'-'-''--''-'-----'

'---v----'

'----------'

~

__

-.J

'----

text

adr.

CG.

adr.

---

----

--~C=>>----<C=>>--------<C=>>------<c=>>-----

text

DATA

ATB. DATA

CG.DATA

invalid

DATA

(shift register)

'

....

-----'

,

....

_---

MZ-SOO

MODE (320 X 200 dot)

ClK

\

..

DISP.

cycle

.1

..

CPU

cycle

VRAS

-.J

\

\

VCAS

\

\

VOE

\

\

\

VADO

-7

~

ROW

X

COL.

X

COL.

X

ROW

X

COL.

II

(IV)

plane adr.

I

(III)

plane adr.

CPU

adr. latch DATA

VCO

-7

------

C=>>-------<C=>>-------<C=>>---------<

I plane DATA

II

plane DATA

CPU

read DATA

VAO

- 7

---------C=>-----<C=>>-----<C=>~----------~

III

plane DATA

IV

plane DATA

CPU

read DATA

lOAD

,

,

17

•

1)

320 x 200 dots
See the figure

below

for

VRAM configuration and

CRT

character display position.

VA

ve

(option)

$0000

0 0

1 1

2

2

I
I

40

I

I

I

I

I

Plane I

I

I

I

I
I
I

I
I

I

($1F3F

)

7999

Not

used

$2000

0

0

1 1

2

2

I

I

I

I
I
I
I

I
I
I
I

Plane

II

I

I

I

I

I

7999

Not

used

$3FFF

2)

640 X

200

dots

Because

it

operates in the cycle steal mode,

two

bytes

of

display data are fetched

during

one byte
display cycle. (See the chart in separate page.)
See the figure

below

for

VRAM configuration and

CRT

character display position.

$0000

($1F3F )

$2000

($3F3F)

$3FFF

0

2

4

I

I

I

80

I

I

I

I
I

15988

Not

used

1---,

---

3

5

:

79

I

I

I

I

I

I

15999

Not

used

VA

(Plane

I)

0

2

4

I

I
I
I

I

--,---

3

:,

I

I

I

I

I

I

I

ve

(option)

(Plane

Ill)

>

Plane

III

Plane

IV

18

2

; I : I

I I

: I

I I

I

2~

17960

(Raster)

2

3
2

40

---"DJ

~

I

I

I

I

----hd

7999

----

eRT display position

2 3 4 80

o

I ' I ' t'

I-~EJ

80

__

--l--H

I
I

I

I

200

"'-159-20--1---+-1

~::::::::::::::::::

i

'''''

I

eRT

display

position

•

MZ-800

MZ-800

800 MODE (640 X 200

dot)

DISP. cycle

-I·

CPU

cycle

-I·

DISP. cycle

VRAS

,'---

___

----~I

\~--

__

----_~I

\'-----

VCAS

\'---~/

''---~

\~-----------~

\'-----

VOE

,'-------/

,

VAD 0 - 7

~

ROW

X'__

__

CO_L_.

----'X'__

__

C_O_L._~'C~'__

______

_:_--~X

X'-

__

--,--_

'---;;~

N+1th

adr.

'------C~

~===N=+=-2th~ad-r.~~

VA 0 - 7

-------~~~----~~~----~<==>~------------------~

I plane N th DATA I plane

N+l

th DATA

cPU

read

DATA

vc

0 - 7

----------~~~----~~~----~<==>~---------------~

III

plane

Nth

DATA 1II plane

N+

1th DATA

CPU

read DATA

LOAD
(sift register)

LJ

CPU

and

VRAM

accessing

1.

Accessing

of

the

VRAM

by

the

CPU

is carried

out

in

the cycle steal

mode

(MZ-800

mode

only)

during

the

flyback period

of

the

display

under

the

control

of

the

CRT

controller.

2.

Even

when

there is

no

accessing

from

the

CPU

in

the

CPU

cycle, such

as

VRAS, VCAS, VOE, etc. are

outputted

in

the

timing

of

the

read cycle at all times.

3.

Write

to

the

VRAM is carried

out

after

logical opera-

tion

of

the

read and

write

data

by

means

of

the

read-modify-write

method.

But, in

the

case

of

the

320

x

200, 16-color

mode,

data are

written

in

two

CPU

cycles as

there

is a need

of

writing

to

Plane IV.

See separate

paper

for

timing

chart.

4.

CPU

wait

1)

Write

• As there is a

one-byte

buffer

in

the

CRT

controller,

write

to

the

VRAM

from

the

CPU is carried

out

through

the

buffer. But, actual

write

to

the

VRAM is

cpu

cycle

<D

done

by

the

CRT

controller.

Therefore,

there

would

be

no

need

of

wait

under

almost

any

condition

in

the

MZ-800

mode.

• Even in

the

MZ-700

mode,

wait

is issued

when

there

are

more

than

two

writes

in a

display

period.

Display

period

Flyback period

HBLN

~r-.-----------1.l"

'--

_____ _

~:~~w:R-----LJ~<D~-----t-L----~®l--,~rl-,-:------

~t..._J

<D@

WAIT

------------4,,\

".)r.

)l"-----

'-

______

J

2)

Read
Wait

is issued

along

with

the

CPU

write

action

both

during

displaying

and

flyback

periods

to

perform

reading

operation

in

synchronization

with

the

CPU

cycle.

DISP. cycle

cpu

cycle@

~-

-I-

..

------.--------

-_.

r-'I

.~

------------

VRAS

-.J

\

\ r

VCAS

~

\

\~-----------

V

OE

~

\

VADO-7

~

ROW

X

COL.

~~~======~----x'--~~==x~====~x===~~~x

ROW

X'--

__

C_O_L.

_________

X

CPU

adr. latch

DATA

I.

III

plane DISP. adr.

11.

IV

plane

VRWR

L-.J

VA

0-7

----~CJ:J___{

I plane

)>--------<c=::)>-----c=>-~

read

DATA

write

DATA

VC

0,-7

-----~

1II plane

)>---------<c=::)>-----c=>>-----QD---(

IV plane

}--

19

DISP.

DATA

4-2-7. Register

functions

VRAM

configuration

• One

or

two

chips

of

16

KB

VRAM

are used.

•

In

the

case

of a single

16

KB

VRAM

chip,

it

handles

320 x 200

dots, 4 colors,

or

640 x 200

dots 1 color.

•

In

the case

of

two

16

KB

VRAM

chips,

it

handles

320

x 200 dots, 16

colors,

640 x 200

dots, 4 colors,

320 x

200 dots, 4

colors, 2 frames,

or

640 x 200

dots,

1

color,

two

frames.

* Discussed

next

are

about

functions

of

the

custom

LSI.

There

may

be

some

restrictions

because

the

standard

version

of

the

MZ-800

incorporates

only

one

16

KB

RAM.

Display

mode

register

(OUT

&HCE)

• It consists

of

four

bits

which

are used

to

represent

display

method,

resolution,

and

display

screen

(color

plane) in

combined

way.

Display

mode

register

(DMD)

MZ-800

•

DMD

3, 2:

Display

method

and

resolution

DMD

3

o

2

o

Bit map, 320 x 200

o I 1 I Bit map,

64~~

_____

_

1

-i

0 I MZ-700

mode

-----~--

----------------+------------------------~~-----

1 1 I Prohibited

•

DMD

1, 0:

Display

screen

designation

DMD DMD

320 x 200

640

x 200

I

MZ-700

1

0

-~=

0 0

Frame A, Planes I and n

Frame A, Plane I Normal

0 1

Frame

B,

Planes

ID

and

IV

Frame

B,

Plane

ID

(NOTE)

Prohibited

1

0

Planes

I,

n,

m,

and

IV

Planes

I,

m I Prohibited

1 1 Prohibited

NOTE: 640 x 200, Plane B IS Plane

m,

not

Plane

n.

• With the MZ-800, DMD 1 ~ 0,

DMD

0 =

O.

Table-'

VRAM

configuration

and

display

mode

VRAM

I

Display Display

Color

combination

DMD

VRAM configuration

Resolution

~:~~c~

_________

~

___

..

~_~______

i 0010'

'"me

(NOTEI

_ _ 3 2

__

'I

0

_I : ItIVTI'

1

320

x 200

140010<5,

F"mJ

I. n I 0 0 1 0 I 0

16

KB

8000

H

f----

~

___

~_B_F_F_F

-VA-0--7

--vc-o-.,

-----llltl I

F"me

+ n

l~

-

~o

1~+-;

""'"

I I

11

j

r-Ll

320 x 200

140010<5

(eme

B 1

rn,

;---1

~-i

-~

l 0

+r~-

H G G G

-t-------+--~t-

--

---

32

KB

__

-=-~

"

on

"

1'6

0010<5

I

F"me

~I.

~~-f

I 0

_1_'

r

T'

vcr

~010'

l:am~-____f--~---1-l-~~---~-

8000 0 G

t

640 x 200 i

I-~ame

B I

ill

I 0 i 1 I 0

i,l

1

[ 1 i I ! i

I III I 1-------- I ---1---1-----+----

I I I I

BFFF

+.1.

4 colors Frame A I I.

ill

i 0 i 1 i 1 i 0

!

+----:-

I ! I :

~-~--

--------------~~---------~

I

~0-2-c5-h-~r-nae-cs-te-r-s-t-II-8

0010<5

!"me A I

AGB

I,

fo

T~

i;-

640 x

200

(NOTE)

Except

for

the MZ-700 mode, actual display colors are produced by the pallet.

20

MZ-800

VRAM

to

CPU

interface

• As the

CRTC

bus is

completely

separated

from

the

CPU

bus, read and

write

of

the

VRAM is carried

out

through

the

CRTC.

Therefore, interfacing

with

the

CPU

is

done

via

the

read register

or

write

register in

the

CRTC.

• VRAM access

by

the

CRTC

is

done

under

the pseudo

cycle steal mode.

•

Not

only

read and

write

are

for

the

accessing

with

the CPU,

it

permits

to read

multiple

number

of

screen

data logical operational results and

to

write

the

read-modify-write

of

the

logical operational results

for

the data already

written.

So,

it

has

two

registers

of

the read

format

register and the

write

format

register.

• It

permits

CPU

access

to

the

non-display

plane in the

display

mode

according

to

the

BI

A

bit

and

it

enables

selection

of

data

buffer

and

two

screens,

when

the

32

KB

VRAM is used.

a)

Read

format

register

(RF)

(OUT &

CD)

MSB

LSB

I

SR~I:G

r~",r'''~]

~A

I

IV

!

III

11

* NOTE: Same as the

bit

B/A

of

the

write

format

register.

21

• SRCH/S I

NG

"0":

Single

color

data read .....

Reads

the

data

of

the

color

plane,

1,

IT,

rn,

or

N,

specified

by

"1

".

NOTE:

Only

one

item

should

be

"1"

out

of

I,

IT,

rn,

and

N.

If

it

is

"1"

for

more

than

two

or

non-existence

of

the VRAM

may

not

assure

the

data read.

"1":

Specified

color

search .....

"1"

is retu rned

for

the

bit

of

the

color

specified by

0/1

of

I,

IT,

rn,

and

N.

NOTE:

Depending on

the

display

more,

color

combination

is

permitted

for

the

bit

com-

bination

of

L

IT,

ID,

N;

ID,

N;

I,

IT;

I; and

ID.

Bit

combination

otherwise

will

be dis-

regarded.

•

B/A

(ex. For

the

640 x 200, 4-color mode,

combination

becomes possible

for

I and

ID,

and

IT

and N are disregarded.

CPU

access plane change

MZ-800

--->

"0":

Frame A access .....

Accesses

the

frame

A (planes I and

IT

for

the 320

x

200, 4-color

mode;

plane I

for

the 640 x 200,

1-color mode).

"1":

Frame B access .....

Accesses

the

(planes

ID

and N

for

the 320 x 200,

4-color

mode;

plane

IT

for

the 640 x 200, 1-color

mode).

• L

IT,

ID,

N .....

Color

plane designation.

I

f

I

!

MZ-800

Table-2 Display mode

vs

read format register

Display

mode

SRCH/SING

B/A

IV

m

n

Function (NOTE)

--------------r---------------+--------+---------~----~----_+----_r----~--------------------__i

Single

color

data read

320 x 200.

4116 colors

640 x 200.

1/4

colors

Frame

A:

"0"

o

Frame B:

"1"

o

o

o

Plane I data read

o o o

Plane n data read

~--~-----+-----+----~-----------------------

o

o o

Plane m data read

o

o

o

Plane

IV

data read

-----------~--------------~---------~--------_+----_+----~----4_----+_--------------------~

Specified

color

search

-----

-~-.---

c---

320 x 200.

4 colors

320

x 200.

16 colors

640

x 200.

1

color

640 x 200.

4 colors

MZ-700

(*):

Refer to the display frame

of

Table-1.

NOTES:

1

1

0

•

Read

for

the

non-existing

VRAM

are

not

assured

.

o

x

0

1

x

0

•

The

above

parameter

has

to

be

set

up

for

the

MZ-700

mode.

*

B/A

must

be

set

to

"0"

for

the

standard

MZ-800

(without

MZ1

R25).

x

x

x

x

o

o

o
o
o
o

o

1
x
x
x
x

x
x
x
x

0

22

x

o o

T.

n

dot

search

x

o

I, n

dot

search

x

o

T.

n

dot

search

x

L n

dot

search

o

x

x

m.W

dot

search

x

x

m.

W

dot

search

o

x x

m.

IV

dot

search

x

x

m.

IV

dot

search

o o o

T.1f.

m.

IVC

dot

search

o o

L1f. m.

IVC

dot

search

o o

T.

n.

m. IV.

dot

search

o

I.

n.

m. IV.

dot

search

o o

T.

n.

m.

IV.

dot

search

1

1

1

L

n.

m.

IV.

dot

search

x x

0

T.

dot

search

x

x

1

I.

dot

search

0

x

x

m.

dot

search

1 x

x

m.

dot

search

0

x

0

T.

m.

dot

search

0

x

1

L m.

dot

search

1

x

0

T.

m.

dot

search

1

x

1

I.

m.

dot

search

0

0

1

Data. ATB.

CG

area read

MZ-800

b)

Write

format

register

(WR) (OUT &

CC)

•

WMD

0 - 2 .....

Selects

the

logical

operational

mode

for

read-

modify-write

.

•

B/A

(NOTE)

Standard MZ-800

--->

"0":

Frame A access .....

• I, Il,

rn,

IV .....

Frame A is accessed

for

the

display

mode.

"1":

Frame B access .....

Color

plane

designation

Frame B is accessed

for

the

display

mode.

Write
mode

'2

1 0

IV

ill

IT

VD : VRAM data

WMD

B/",:

Color

plane Function

[WD:

Write

data 1

-SINGLE-- .

+-

0 0 1 0 (*)

0/1

-~

0/1-

-----lc~~~I-;ne

of;;1~WD,

wri;---------

WRITE

~

320 x 200, i

Color

plane

of

"0":

Fixed

o r

0-

--t

r

-

1

-

11

Frame

A:

0 I

o~T,

~/~

+,1,'~/01,

-

4/16

colors

jcolor

pl~~~--;:;-0Y-WD

<:BVO--------

OIl

I 640 x 200,

,Color

plane

of

"0":

Fixed

----t---

---j

,--

t---r-

--;1

I---~'

----------

-------.-------

o I

__

~

01

Frame

B:

1

:_~/~

.j,_~l_i_

0~~0/1:

1/4

colors

ll~-:;~~;~~

~:~~:::F~;

VD

______ _

0-1

I 1 I

,I

1

iColorplaneof"l":WD.VD

-,1

-~

-Iu=i=-

('F~::

i

;;;;:-;oo@,

!

:;;~~:~~';:f::~~,:::',:,O;--'

-------

I

r-~--.

_

0/~_+0/-1_·1i

_

x--~--~"li

~2~I:r~o~_~

(Character

write

to

the

graphic

plane)

'L

x

I,

0/1

~

OIl

OIl i OIl

I.

.'

I

Color

plane

of

"1":

WD

i I , , 16 colors I

x

i_.

0

__

---l+I---x-i--lI----~--t~

!

0/~r~4~-=-;~

®,

1

Calor

plane

of

"0":

Writes

"0".

i I

___

~

__

J

__

><....t~~><_l_~l-~~olor

~

Calor

plane

of

"X":

Fixed

1 I x I x

,011

I x i

OIl!

640 x 200, !

to-~~_---

I

~-t-~~

i

0/1

i

0/

132:

:o~:~s

®,

-r-~rites

only-

bi.t

"1

~:-~-;-~~

i;;~pecific

calor.

I

f--

1

___

~

_9Q

.<>'~J.-~-'

x

-i--

~<:<>Iors

~

(Character

write

to

graphic

plane)

I

I

x I

OIl

11

0/1

I

OIl

T;1

I

3~~

x 1

200

,

I

Calor

plane

of

"1":

WD

+ VD

x

I

t'

I co

ors

1

r-

-

"0--

-r

-;-:--~-

-;-1o~1

~~~-;;-~®~-!

Calor

plane

of

"0":

WD·

VD

r-

--1--

~

x I

OIl

1 x ! x 1 calor, ® !

Calor

plane

of

"X":

Fixed

I I i

--"'-r-- -

----r----t-------

1

EXOR

OR

RESET

REPLACE

PSET

o

,

I

MZ-700

1

0

o

x i x :

OIl

I x I

OIl!

640 x 200,

11

__ +-_____

! _

1I 1I

I I 4

~?Iors

.

_____

_

o 0 I 0 I 0 I 0 I 1 I MZ-700 ' Writes

WD

into the DATA,

ATB,

and

CG

area.

(*) Refer

to

Table-l

display

frame

NOTES:

•

Write

for

the

non-existing

VRAM

are

not

assured.

• The above

parameter

has

to

be set

up

for

the

MZ-700

mode.

•

BI

A

must

be set

to

"0"

for

the

standard

version

MZ-800.

23

c)

Example

of

CPU

read/write

access

• Shown next are access

examples

of

REPLACE

write,

PS

ET

write,

and SEARCH read in

the

320 x 200,

16-color

mode.

As

for

display

colors, Plane I

corresponds

to

8,

IT

to

R,

ill

to

G,

and

IV

to

I.

MZ-800

CD

REPLACE

write

• To

develop

light

yellow

characters on the graphic

screen.

Plane I

(B)

data

Plane

11

(R)

data

V

Bo

1

0

1 ° 1'1'1'1'

i

COTo

i '1' 1

°R~

R

Display before

write

A

M

Plane

III

(G) data

It develops the screen

when

a next

CG

patterns are

written after setting

the

REPLACE

mode

and

the

light

yellow

color

in

the

WF register.

Mode

BlA Calor

designation

WF

register

~-O--o=r!]

, ,

--oJ:

Light

yellow

replace

mode

Plane I

So, the

bit

"1"

of

the

write

data becomes the color

specified

by

WF and rest

of

others become

RESET

(black).

°

Write

data I

(CG

pattern) , °

~-----

Plane

11

°

V

I ° 1

°lolol~liEJ

10t'lol'[0]

, ! °

I'

I

R

A

M

Plane

III

Plane IV

Display after

write

1 ° I , 1 °

I'

I ° 1

' 1

°

liJ

1 °

I'

1

° 1

' 1 °

I'

1

ON

®

PSET

write

• To overlay a

light

yellow

hatching

over

the

graphic

display screen

of

CD.

Mode

BlA Calor

designation

WF

register

'--1_,

___

0---'1_0----'-1_,

_____

0_1

:

Light

yellow

PSET

mode

G R B

Write

data

~

°

°

I (B)

11

(RI

°

1 ° 1 ° 1 °

I'

1 ° 1

' 1 ° I I ° 1

'

I'

I'

1 °

I'

I'

I, 1

V

R

A

Display after

write

M

1 °

I'

I'

So,

only

the

bit

"1"

of

the

write

data becomes

the

color specified

by

WF in

this

mode,

and rest

of

other

colors

do

not

change.

@

SEARCH

read +

PS

ET

write

• To change

light

yellow

in ® above

to

change

to

red

• The

following

data are set

when

the

memory

is read

after setting

the

light

yellow

search

mode

in

the

RF

register.

Mode

BlA Calor

designation

RF

register

LI_,_IL-_----'-I_o_--'-I_,

____

o---'I

:

Light

yellow

search

III

(GI

IV(!)

I'

24

I'

I'

1 °

I'

1 °

I'

1 ° 1

' 1

°

I'

1 0

I'

1

Read data 1 ° ° °

0'

I:

Only

the

bit

of

light

yellow

L.-

__________

--'

becomes

",",

•

When

the

above

read data are read after setting the

red PSET

mode

in

the

WR register.

...

" I

~

'"

~

1

~

1

<J

"

co

"

'"

Cl) 0

Cl)

'"

Cl)

en

a:1=

a:

'"

a:

i~

'"

u a: t

::;;

j

Now,

a partial

color

change has been attained.

As in

above,

it

enhances fast

display

change

with

less

of

VRAM accessing

by

using

various

write

modes.

MZ-800

4-2-8. Pallet

•

As

there are

four

4-bit

pallet registers

provided

inside

the unit,

it

permits

choice

of

R,

G,

B,

and I

combina-

tions, and

it

enables

to

make

choice

of

any

desired

two

or

four

colors

out

of

sixteen available colors.

However, in the

320 x 200, 16-color

mode,

choice

of

colors

permitted

to

four

kinds

of

colors

output

of

sixteen.

•

Only

the

conventional

mode

is applicable

MZ-700

mode

without

using pallet.

for

the

• Pallet is

not

applicable

for

the

border

color.

<Configuration>

Pallet

enable

SWitch

PLTO

PLTl

PLT2

PLT3

DB;

SW;

Bo

B,

B,

B,

~I~~:;PUI

--0

:

B

output

DB,

0

Ro

R,

R, R,

~

SW,

~

~

~~~~;~ut

---0

~

R

output

f

~

DB,

G;

G,

G,

G,

3

01

0

Plane III

~

G

output

SA

output

--0

I

DB,

I

Plane

1\-

"-l.o-

I

output

SA

output

--0

:

So

S,

Inpu!

select

Signal

A

B

Output

select

Signal

320

)(

200,

SWQ, 1

Plane

III

1\

SR

output

<Pallet

output

and

display

mode>

•

Shown

next

is the relation

of

the

display

mode,

color

plane data vs

R,

G,

G, I outputs.

Display

mode

4

color

320 x 200

16 colors

Pallet output select

Display

color

A B

Frame A 4

colors

out of Plane I Plane n

16

colors

data data

Frame B

4

colors

out

of Plane

ID

Plane

IV

16

colors

data data

(Ex.)

16

colors out

of

16

colors

Plane I

data

Plane

IT

data

<Pallet

register

write>

(FO

H

)

(FO

H

)

MSB

OUT

FO

H

I x

S2

1)

So -S2:

Register section

S2

S,

So

0 0

0

0 0

1

-~-

---

-.

0

,

0

0

,

1

1

0 0

2) Bi,

Ri,

Gi,

li:

Pallet

write

data

3)

SWo,

SW,:

LSB

Register No.

.-

PLT

0

--

PLT'

--

PLT 2
PLT 3

SW

o

• SW,

With

these switches,

it

is possible

to

make combina-

tion

of

Planes

ill

and N data in

the

320 x 200,

16-color

mode.

Switches

are used to assign pallets

to

four

groups

of

colors.

(Plane

ill

data) =

SW

o

,

(Plane N data) = SW,

Only

for

the

color

information,

the

color

information

set

by

the

pallet register are available

as

B,

R,

G,

and

I outputs. For

color

information

other

than that, data

in

Plane I

through

Plane N are sent

out

as

the

B,

R,

G,

and I

outputs.

(See

example

next.)

Pallet enable

SW

o

•

SW,

x

x

Output select

A B

Output Output Output Output

o

o

Bo

10

o

B,

R,

G,

I,

o

1

B3

o

o

Bo

I

Go

10

o 1

B2

R2

G

2

12

f----+-----+---4-----

-----+-----1

1 1

B3

R3

G

3

13

(PI

ill

)

0 0

Bo

Ro

Go

10

SW

=

ane

_+

__

----1

o

data

( )

~

I

~_~-~-ti-:-:-+--:-:-~-~-'~--::~

I

SW

= Plane

IV

2

! '

data

I ! 1 I 1

B3

R3

G

3

I

13

~---------+--x-4-X-~-I--~-IT-+--ID---+-IV~

I x I

0_

x

Bo

Ro

Go

10

Frame A 2

colors

out of Plane I x I

r---

~---~-1-6-co-l-or-s~-+_-d-a-t-a-+_---+I'~--------~~-_+-B-,_~-R-,_4-G-,-+--I-,~

I x I

O~i-x~--B-o_+-R-o-+_-G-o~~-lo~

2

colors

2

colors

out of Plane

ID

16

colors

data

Frame B

x

I

1I

I,

x

B,

R,

G,

I,

640 x 200

~-----4------+--------+--~-~-------+i------------+----~---+--~-~-------~----~

I 0 0 I

Bo

Ro

Go

4

colors

out

of Plane I

-

16

colors

data

4 colors

Plane

ID

data

25

10

1 0 I

B,

R,

G-,-+--I-,---I

x

! 1

(Ex.)

An

example

of

the

pallet in use in the 320 x 200,

16-color

mode

• Assume

that

the

pallet register has been set

to

the

following.

l

PL

TO

= Black

PLT1

= Cyan

PLT2 = Red
PL

T3 =

Magenta

• When

SWo

is set

to

"0"

and

SW,

to

"0",

the

pallet is

applied

to

four

colors

in

group

1

(ill

= 0, N =

0)

and

it results in

the

color

as

shown

in

CD

of

the

table

right

(yellow

to

cyan).

• When

SWo

is set

to

"0"

and SW,

to

"1",

four

colors

of

group

3 (ill = 0, N =

1)

becomes the

display

color

set by the pallet.

• Therefore,

any

color

can be chosen

out

of

16 colors

against

four

colors

of

color

group

selected

by

SW1

and SW2.

• For

group

other

than

selected

by

SWo and SW"

the

color

that

I - N

outputted

on

B,

R,

G, I is displayed.

c.

Plane data

'"

e

Cl

I

II

ill

N

0 0 0

0

~

c.

1 0 0

0

'"

e

0

1 0 0

Cl

1 1 0 0
0 0

1 0

N

1 0

1 0

c.

'"

0

0

1

1

0

l5

1

1 1

0

0 0 0

1

M

1 0 0

1

a.

'"

e

0 1

0

1

Cl

1 1 0 1

0 0

1 1

..

1 0 1

1

c.

'"

0

0 1

1 1

l5

1 1

1 1

Border

color

MZ-800

Display color of

SWo

= 0

SWo

= 0

1-N .....

RGBI

SW, = 0

SW,

= 1

Black

PLTO

= Bleck Black

Blue

PLT1

=Cyen

Red

PLT2 = Red

Magenta

PL T3 =

Magenta

Green

+-

+-

Cyan

+-

+-

Yellow

+-

+-

White

+-

+-

Gray

+-

PLTO

= Gray

Light

blue

+-

PLT1 =

~\~~t

Light red

+-

PLT2 =

~~ht

Light magenta

+-

PLT3 -

light

- magenta

Light green

+- +-

Light

cyan

+- +-

Light

yellow

+-

....

Light

white

+-

+-

• As

the

CRTC

has a

4-bit

border

color

register,

it

permit

to

use

any

border

color

out

of

16 colors.

4-2-9. CRTC

register

map

• VRAM

control

• Data

display

on

the

video

screen

Control I/O address

map

1/0

address

--

H

l

IN/OUT

(B)

(C,

*)

---

CC

0

---

CD

0

---

CE

0

---

CE

I

--

---------

--~-

01

CF

0

02

CF

0

03

CF

0

04

CF

0

05

CF

0

06

CF

0

07

CF

0

~

FD

0

•

Border

register

(OUT 06CF

H

)

MSB

LSB

BCOLI~

__

X

__

~

__

X~~

__ X __

~

__

X~~

__

-L

__

G

__

~

__

R~I~_B~

•

B,

R,

G,

and I becomes

"0"

(black)

when

reset.

Write

format

register (WF)

Read

format

register

(RF)

Display

mode

register (DMD)

Status read

Scroll

offset

register l (SOF1), 8 bits

Scroll

offset

register R (SOF2), 2 bits

Scroll

width

register (SW), 7 bits
Scroll start address register (SSA), 7 bits
Scroll end address register (SEA), 7 bits
Border

color

register (BCOl), 4 bits

Superimpose

bit

(07) (CKSW), 1

bit

Pallet register

26

Written

by

indirect
OUT command.
B register

<-

0-7

QUT(C),A

MZ-800

4-2-10.

ROM

configuration

The MZ-700

monitor,

character generator (eG), MZ-800

monitor, and

IPL

are

implemented

on a single chip

of

16k x 8-bit ROM.

ROM add

....

soooo

$1000

$2000

$3000

$3FFF

,..-------.

$0000

MZ-700
monitor

~----~

$1000

CG

MZ-800
IPL

&

monitor

4-3. 8255

Programmable

Peripheral Interface

The 8255 has three pairs

of

8-bit lID ports, each one can

be

assigned

to

input

or

output

port

by means

of

programming. A different

mapping

is established de-

Port name (address) Pin No.

110

Active state

PAo

H

PA,

H

PA

PA2

H

( 700

$EOOO

)

PA3

0

H

800

$DO

I

PA. L
PAs

L

PA7

I

L

PBo

L

PB,

PB

PB2

( 700

$EOOl

)

PB3

I

800

$Dl

PB.

I

PBs
PB.

+-

PB7

L

1-------

PCo

0 L

PC,

0

I

--

PC

INOTE-'I

PC2

0

L

( 700 $E002 )

PC3

0

~TE-21

800 $D2

Pc.

I H

PCs

I

--

PC.

I

--

PC7

I

--

--

( 700 $E003 )

-- --

800 $D3

--

NOTE-l:

Output

data

dependent

on

the

bit

set

mode.

I

Mapping

address

Not

used

QD-IOCS

FD

IPL & monitor

QD

command

BASIC

10CS

Version

$Eooo

$E010

$ESOO

(start address)

$F400

$FFFO
SFFFF

pending on the mode. In the MZ-700 mode, it is {In
memory

space, and in the MZ-800 mode, it is on lID

space.

Function

}Keyb~'d

~'"

"mbe

Joystick-l

strobe

Joystick-2

strobe

CRT

cursor

blink

timer

reset

Keyboard scan

input

J

Prohibits

sound

output

of

the

8253

Cassette

write

data

Disables

timer

interrupt

Rotates

the

cassette

motor

Checks

the

cassette

motor
Cassette read data
CRT

cursor

blink

timer

input

Vertical

blink

signal

Control

port

NOTE-2:

Motor

is

controlled

on

and

off

by

the rising edge

of

the

signal.

27

From keyboard

Key data

PBO

input

pin

I

(a-p)

PB7

VBlNK

PC7

556

OUT

PC6
PC2

READ

PC5

MOTOR

PC4

MOTOR

PC3

ON

WRITE

PCl

PCO

To keyboard

PA7

PA3

Key data
strobe

PA2

(10-p)

lS

145

PAl
PAO

a)

Key

scan

Ports

PAD-PAa

of

the

8255 are connected via

the

CD

@

@

@

@

Do

8255

28

MZ-800

07 07

I

I

DO

DO

Al

Al

AO

AO

RD

WR

KEY

RESET

55

RESET

LS145 decoder,

and

PSD-PS7

are connected

to

the

key

matrix

directly.

@

MZ-800

Key strobe is issued

through

PAo-PAl

to

~can

the key.

As

it

is supplied

to

the decoder,

it

makes one

of

outputs,

0-9,

set low. It is then added

to

the

key

matrix

to

scan

the

line

of

the key depressed (vertical key

matrix

scan).

The

line is in

the

low

state,

if

it

is in depression

(horizontal key

matrix

scan).

NOTE: In the ready

for

command

state, PAo-PAl are

normally

repeats

to

be

low

state and the decod-

er outputs repeats

to

be high state. But, since

the decoder is

of

an open collector type, it

would

not

permit

to

check high and

low

state.

b) Cassette

control

Decoder side

"H"

Strobe signal

lJ

~ey

8255 switch
PB

side

The 8255 issues

the

cassette

write

data

from

PC, and

Example

8255 output PA,

PA2 PA,

PAo

L H L L

Only the LS145 decoder output 4

(#5

pin) is in

low

state.

Because the connector

(5)

is in

low
state, key scan is permitted only for
keys, A through

H.

State

of

the 8255 input

port

B.

PB7 PB.

PBs

PB. PB,

PB2 PB,

PB

o

L H H H L H H L

Above stata shows that keys,

A,

E,

or

H,

is in depression.

read signal

through

PC5.

The type

of

data (input,

output) and its

format

are

as

follows:

___

~I

I I

.

I'

SHORT

~

CASE

1

READ
EDGE

READ
POINT

LONG

LONG

represents the

bit

value

"'"

and SHORT the

bit

value

"0".

Data

will

be

read at 368 microseconds after

(

SHORT

10

seconds

220CO

TAPE

MARK

1

LONG

40

LONG

SHORT

40

TAPE
MARK

LONG

20

SHORT

20

1-1. INFORMATION

BLOCK

128

bytes

1

DATA

BLOCK

29

READ

POINT

i

SHORT

(HIGH) 240,.S
(LOW) 278,.S

LONG

(HIGH) 470,.S
(LOW) 494,.S

READ

POINT

379,.S

the

signal rising edge. Data are recorded in repetition

of

LONG and SHORT, and

the

same data are

written

twice.

Check

SHORT

INFORMATION

Check

SHORT

sum,

1

256

BLOCK

sum,

1

2 bytes

bytes

128 bytes

2 bytes

5 seconds

LONG

LONG

11000

Check

SHORT

DATA

Check

sum

1

256

BLOCK

sum, 1

2 bytes

bytes

2 bytes

LONG

LONG

MZ-800

See

next

for

the contents

of

the

information

block.

Name

Byte

count

Function

Note

ATRB

1

Attribute

NAME

17

File

name

(16 characters

maximum)

CR

(OD)

affixed

SIZE

2

File byte size

DTADR

2

Loading address

EXADR

2 Execution address

1----

COMNT

104

Comment

Rotation

of

the cassette (dedicated) is

controlled

by

the

8255

and its peripheral circuits.

To cassette

8255

r-~-~-----

MOTOR

PC.

PC3~--t.

ClR

r-~-+~~~-

SENCE

Q~

If switch has

not

been

ON

on

the

cassette recorder side,

SENCE

signal is in

high

state. When a switch (REW,

FF,

etc.) is pushed,

it

makes

the

signal

turned

low.

It presets

the

D-FF

and

the

motor

starts

to

rotate

with

MOTOR in

high state. With

lock given

to

the

D-FF

through

PC3,

it

permits on/off control

of

the

motor.

If

a switch is pushed

on

the cassette recorder side,

it

permits

examination

of

the

motor

operating state

by

means

of

Land

PC4.

Repeated

-

SENCE

1-1---------,1,..---

PC

3

__

.L

L...---'\\---t---""F:

======:;::1

rL

MOTO~

! L

®

=====*==~~~====*=====~:'\

:

Execution

No

change

·PLA

Y t "

of

load in MOTOR is

command

signal

(PC4)

displayed.

Ur===i=1

=

PLAY
SW ON

End

of

load

30

In

order

of

low

to

high order

Not

used

For use

of

other

than MZ-800 cassette tape recorder

type,

it

needs

to

short

SENCE

to

GND,

READ

to

EXREAD, and

WRITE

to

EXWRITE

of

the

connector T-5.

Use

of

the

cassette recorder

of

other

kind may some-

times

not

permit

proper

loading and saving operation.

In such an event,

adjust

the

volume

and

tone

controls

to

find

the

optimum

positions. To meet the opposite

polarity

of

cassette tape recorder, there is a

dip

switch

provided. Changing

the

switch position makes TPSW

signal

state changed so as

to

invert

the

signal wave-

form.

MZ-800

4-4. 8253 Programmable Interval

Timer

The 8253 makes

sound

generated

with

the

counter

#0

and internal

timer

is

operated

with

the

counters

#1 and

#2.

•

Counter

mode

#0

..... Square

waveform

generator

MODE3

#1 ..... Rate

generator

MODE2

#2

.....

Interrupt

on

terminal

counter

8253

(8255)

PC2

DD

D7

OUT 2

INT

I

I

DTO

DO

ClK

2

AD1

A1

OUT1

ADO

AO

ClK

1

HSYN

(PlO)

PA4

RD

OUTO

(PSG)

Audio·

in

RD

(8255)

PCO

WR

WR

ClK

0

CKMS (1.10

MHz)

C53

CE

GATE 0 53G

• The

counter

#0

counts

input

pulse

of

1.1

MHz,

divided

by

the

predetermined

rate (musical score

data)

to

generate

sound.

It

is connected

with

the

mixing

audio

amplifier

through

AUDIO-IN

of

the

sound

IC

(76489AN).

This

counter

output

is

gated

by

PC

of

the

8255

port

C,

and

the

counter

gate

is

controlled

by

001

of

$E008.

The

counter

#0

output

is also used

for

interrupt

control

INTO

and connected

to

A4

of

the

Z-80A PlO

port

A.

• The

counter

#1

counts

pulse

of

15.6

kHz

and gener-

ated a

pulse on OUT1 at

every

second. The

counter

#2

counts

pulses and makes OUT2

turned

high.

OUT2

outputs

becomes

INT

via

the

gate and is

connected

to

INT

of

the

CPU.

4-5. Printer interface

The Z-80A PlO is used

for

the

printer

interface. It has a

pair

of

8-bit

1/0

ports.

31

r

Do

D,
D,

Data

bus 1

8!

Ds
Ds

D7

{

BlA

CID

PlO

control

GE.

M1

10Ra

fill

+5V

GND

Interrupt

IEI

{

INT

control IEO

78/'-

p

,''0

A -

c'

Pin configuration

Ao

A,

A,

Aa

A.

As

pon

A

7

~

ARDY

ASTB

Ba

f

B,

B,

B3

B.

B

s

Pon

B

Bs
B7

E!HDYJ

BSTB

MZ-800

Pin

name

Pin No.

I/O

Signal

name

Description

00-07

19,20,1 1/0

Z80-CPU Data Bus

Bidirectional, 3-state, Z-80

CPU

bus.

40,39,38

Data and

command

transfer

between

the

Z-80

CPU

and the

3,2

PlO

is carried

out

through

this

data bus.

Do

is

the

least

significant

digit.

B/A

6

I Port B

or

A Select

Port select signal.
Depending

on

the

state

of

this

signal,

the

port

is specified

through

which

data

or

command

is transferred between the

Z-80

CPU

and

the

PlO.

}H

: Port B

L : Port A

CID

5

I Control

or

Date Select

Controlldata

select signal.

Depending

on

the

state

of

this

signal,

control

port

or

data

port

is

selected

for

the

port

assigned

with

B/A.

B/A

CID

Selected

port

L L Port A data
L H Port A

control
H L Port B data
H H Port B

control

et

4 I

Chip

Enable

Chip

enable signal.

A

low

on

this

line enables

the

PlO.

Normally

connected

with

the

1/0 address

decoder

output.

1/1

25 I

System Clock

System clock
CPU

clock

1/1

is

usually

used.

M1

37

I

Machine

Cycle One

Connection

with

CPU M1 signal

(Iow

active).

The

PlO

attains

synchronization

with

the

CPU

interrupt

control

logic

by

M1.

The

PlO

will

be reset

when

M1

is set

low

at

least

for a period

of

two

clock cycles

after

turning

iORQ

and

Fm

high

state.

'iORQ

36

I

Input

Output

Request

Connection

with

CPU

iORQ

signal

(Iow

active).

This

signal

perform

data

transfer

between

the

CPU

and the

PlO

in

connection

with

B/A, CID, cr,

and

RD.

If

cr,

RJ), and

iORQ

are

low,

the

data on

the

port

selected

by

B/A are

transferred

to

the

CPU.

If

cr,

iORQ

are

low,

data

or

command

is

written

through

the

port

selected

by

B/A.

Ri)

35 I Read

Connection

with

CPU

RD

signal

(Iow

active).

This

signal

controls

the

direction

of

data

transfer

between

the

CPU

and

the

PlO in

connection

with

B/A, CID,

cr,

and

iORQ.

IEI

24 I

Interrupt

Enable

in

Interrupt

daisy

chain signal.

The

PlO

will

respond

to

the

INTA

cycle

of

the

CPU

only

when

this

signal

is

high.

I--------~--- -

IEO

22

0

Interrupt

Enable

Out

Interrupt

daisy

chain signal.

This

signal is

high

only

when

IEI

is

not

high

with

the

PlO

having

an

interrupt

request. It

goes

low

when

IEI

is

low

or

PlO is

having

an

interrupt

request.

32

MZ-800

Pin name Pin No.

1/0

Signal

name

TNT

23 0

Interrupt

Request

Ao-A,

15-12

1/0

Port A Bus

10-

7

ASTB

16

I Port A

Strobe

ARDY

18

0

Register A Ready

I

Bo-B,

27-34

1/0

Port B Bus

BSiB

17

I Port B

Strobe

f----

BRDY

21

0

Register B Ready

I

I

For the MZ-800 the PlO located on the

1/0

space, and

address

of

ports

performs

the

following:

$FC

Port A control

Description

Connection

with

CPU INT signal.

A

low

on

this

line causes

the

PlO

to

place an

interrupt

request

to

the

CPU. Because

it

is

of

an open drain type,

it

is

possible

to

make INT

of

several peripheral

LSI

wired

OR

using

the

pullup

resistance.

--

Port A data bus.

I

Data

transfer

is carried

out

with

the

PlO and peripheral

device via

this

bus.

AD

is

the

least

significant

digit.

I

Port A strobe.

I

Significance

of

this

signal depends on

the

Port A operation-

al

mode.

•

1)

Byte

output

mode

:

It

indicates

that

the

peripheral de-

vice has received data

from

the

PlO

at a riding

edge

of

this

strobe.

I

2)

Byte

input

mode

: Peripheral device loads data in the

I

PlO

port A input

data register

at

a

!

I

rising edge

of

this

strobe.

I

3) Bidirectional

mode : The

contents

of

the

port A output

I

I

data register are

outputted

on

I

AO-A7

when

the

strobe

is in

low

I

state.

~tmode

:

Not

used .

..

~~----------~

..

-~

-

._._-------

I

I

I

I

I

I

I

I

I

33

Register A ready.
Significance

of

this

signal depends ot!

the

state

of

the

port

A

operational

mode.

1) Byte

output

mode

: Data are loaded in

the

port

A data

output

register

when

this

signal

goes

high,

makes

AO-A7

stable,

and

it

indicates

that

data can be

transferred

to

a peripheral device.

2) Byte

input

mode

: A

high

on

this

line indicates

that

the

port

A data

input

register is

not

occupied

so as

to

be ready

for

receiving

of a next

data

into

the

data register.

3)

Bidirectional

mode

:

This

signal is used

to

indicate

that

data has been ready in the

port

A

output

data register. Data

will

not

be issued

on

AO-A7

in

this

mode,

unless

ASTB

turns

low.

4)

Bit

mode

:

Not

used.

Port B data bus.
Function

of

this

bus is identical

to

AO-A7.

But,

it

permits

to

drive a Darlington

transistor

as

the

bus

can

supply

1.5

V,

1.5

mA.

BD

is

the

least

significant

digit.

Port B strobe.
Function

of

this

signal is identical

to

ASTB, except

for

the
following:
This

signal is used

to

load

data

from

a peripheral device

into

the

port A input

data register,

when

the

port

A is in

the

bidirectional

mode.

Register B ready.

Function

of

this

signal is identical

to

ARDY, except

for

the
following:
This

signal indicates

that

the

port A input

data register is

unoccupied

and is ready

for

receiving

of a next

data,

when

the

port

A is in

the

bidirectional

mode.

$FD
$FE

$FF

Port B

control
Port A data
Port B data

MZ-800

Pin

name

1/0

Active Signal

name

Function

PAD

IN L RDA

A

low

on

this

line indicates

that

the

printer

data is ready

to

receive.

W

PA,

IN

L STA A low

on

this line informs the personal a paper depletion during

status

check.

u.

PA2

IN

-

GND

~

PA3

IN

-

GND

<{

PA.

IN

H

An

8253

output

used

for

interrupt.

t:

e

PA5

IN H

Horizontal blanking signal used

for

interrupt.

a..

PAs

OUT

H IRT Used

for

printer

initialization.

PA,

OUT

H

RDP

Indicates

the

printer

to

receive data.

PB.

OUT

-

RD.

PB,

OUT

-

RD,

LL

PB2

OUT

-

RD2

U.

~

-

PB3

OUT

RD3

co

PB.

OUT

RD.

Printer data

or

control

code

to

the

printer.

-

t:

PB5

OUT

RD5

e

-

a..

PB.

OUT

RD.

-

PB,

OUT

- RD,

Interfacing timing

CD

@

~

@

RDA

~~~~2~

PBo -PB

,

X

Eff~ctive

data

RDP

I

I

I

I

I

,

Personal

Personal

Direct the

After

conforming

computer.

computer

sends

printer

to

high state

of

confirms that data

to

the receive data.

RDA.

it

makes

RDAis

low.

printer.

RDP

forced

low.

After the personal

computer

confirms

that

the

printer

is

ready to receive data

at

(<D),

the

data is

then

sent

to

$FF

port

(PlO

port

B)

at step (ID).

As

reception

of

data is directed

to

the

printer

at step

(@), it makes

RDP

forced

low

at

step (@)

upon

confirm-

ing that the

printer

received

it

(RDA=H).

After

this,

it

awaits until RDA goes

from

high

to

low

before

transfer

of a next data. But,

it

is possible

to

transfer

successive

data by

interrupting

the

CPU

at a falling edge

of

RDA,

since RDA is

inputted

to

the

RSTB

input

of

the

PlO,

when in the

port B mode

O.

It

is

also possible to

interrupt

the

CPU

referring

to

Port A

inputs. Though discussed

above

is

the

printer

interface

methlod

for

the

MZ

compatible

printer

types,

there

is

the

Centronics

compatible

method

for

parallel interfacing

of

the printer. Since

this

method

is basically

the

same as

the

MZ mode, except

that

signal

polarity

is opposite.

MZ specification

Centronics specification

c----

-------

-

l

Signal name

Active

Signal

name

Active

'------------------

-----,--,.

RDA

(NOTE)

"L"

BUSY

"H"

RDP

"H"

STB

"L"

IRT

"H"

INPUT PRIME

"L"

34

NOTE:

Though

RDA is active

low,

it

may

be handled

the

same as

high

state

of

BUSY

when

consi-

dered

in

term

of

signal significance.

As

shown

in

the

figure

above,

it

could

be

known

that

RDP

and IRT

should

be

inverted

in

order

to

make

connection

with

the

Centronics

compatible

printer.

It can be attained

by

changing

PRSW

to

high using the

dip

switch.

NOTE:

When

the

MZ-800 dedicated

printer

is used,

there

may

be such a case

that

proper

operation

is

not

attained

due

to

different

printing

charac-

ters

and

control

codes. It

must

be also noted

that

all MZ-800 characters can

not

be printed.

Besides, connection

with

a Centronics

compati-

ble

printer

may

not

be

permitted

hardware-wise,

sometimes.

4-6. Programmable sound generator

The SN76489N is used

for

the

programmable

sound

generator

which

is

controlled

by

the I/O

port

$F2.

It is

write

only. In

order

to

permit

smooth

sound generation,

timer

interrupt

is applied using the 8253. For the

interrupt

timer,

the

count 0 of

the 8253 is used. The

counter

0 is used

for

creation

of

sound steps in the

MZ-700

mode,

but,

it

is used

for

the

timer

interrupt

source

of

the

PSG

in

the

MZ-800 mode. Interrupt is

controlled

by

PA5

of

the

PlO.

it

is, however, possible

to

mask

the

counter 0 output

by

PCO

of

the 8255, in

order

to

prevent

sound

generation

during

interrupt.

l

MZ-800

4-7. Joystick

It

permits

connection

of

two

ATARI

compatible

joys-

ticks.

ADO

JOY

DT
DT
DT
DT

~

0

1

2

3

4

DT

DT

5

,l

Gl

G2

-<1-

LS365

8255

>>-

_____

....,I't-..

PA4

V

I

1

,..

~

!

"3

4'

6

,..

'7

FWD

BACK

LEFT

RIGHT

TRGl

TRG2

4tWM

+ 5V

~GND

(Configuration

of

joystick-1)

Low

active strobes are issued

through

PA4 (JOY1)

of

the

8255 and PA5 (JOY2)

interrogate

switch

activation

through

inputs

to

$FO

(JOY1) and

$F1

(JOY2).

5.

Power supply

5-1. Block diagram

F

ACIN

Noise
filter

Rectifierl
filter

Power
switching

CCP

Drive

circuit

1---,

~--I---.

I

I

I

SW I

I

'-------~~~--~I~

I

L

___

.J

2SW type only

Configuration

of

ATARI

compatible

joystick

4-8. System switch setup

System

switches

are assigned

as

follows:

i

Function

I

SW

No. I I Setup

method

+--------

----L------------

I I

1

I .

iON:

MZ-700

mode

!

MZ-700/MZ-8~

""ct~':.""'_800

mod,

I

MZ

printer

with

SW2

!

2

i

MZJCentronics

printer

I and SW3 at

ON

3

selection

i

Centronics

printer

with

I

I

I

I

I I SW2 and SW3 at

OFF

---,-----------4

I I

Ch,"",d.o"

to

,"-

4 External cassette recor- I bl d

th

. . a e rea on e exter-

der

polarity

selection I d

I i na cassette recor er.

*

Switch

setups at

the

factory

SW1 ......

OFF

(MZ-800

mode)

SW2 ...... ON

SW3 ...... ON

}

(MZ

dedicated printer)

SW4 ......

ON

Switching

transformer

Pl

~

~Sl

__

~---'

+5

V

---.

rectifierl

filter

P2

High
voltage

+5V

OV

Chassis

L---------------l

Control

35

5-2.

Operational description

The block

diagram

of

the

power

supply

unit

is

shown

above. It

adopts

the

self-excitation ON/ON

control

method. First,

the

source

supply

is rectified

through

the

noise

filter

and

converted

into

direct

current.

As

the

dc

current is

applied

to

the

switching

transistor,

it

causes

the transistor

to

start

repeating ON and

OFF.

After

the

dc

voltage is

converted

into

high

frequency

pulse,

it

is

added

to

the

primary

side

of

the

main

transformer

which causes

to

induce

voltage

on

the

secondary

side.

This high

frequency

pulse

is

then

rectified and

filtered

to

obtain the

dc

voltage

of

+5

volts. For

control

of

output

voltage,

the

output

voltage

is

compared

with

the

refer-

ence voltage and

its

error

is detected in

the

control

section.

While

the

switching

transistor

is in

the

OFF

cycle,

it

makes

the

photo

cuppler

PC1

active

by

the

detecting signal

of

the

control

section

for

given

period.

By

adjusting

control

current

of

the

drive

circuit,

it

makes

the out

put

stabilized.

5-3. Maintenance
Cleaning

Dust deposit inside

the

power

supply

unit

may

becomes

the cause

for

overheat

as

it

prevent

heat

dispersion,

which results in

damage

in

component.

Stains

on

the

fuse contact and

connector

contact

may

lead

to

contact

failure. So, it has

to

be cleaned

using

soft

cloth

dam-

pened

with

alcohol

or

dry

soft

cloth.

5-4. Problem determination and sequence

Follow the

next

procedure

to

find

the

cause

of

trouble.

(1)

Avoid

removing

the

board

to

check.

But

visually

observe

the

board

to

check

for

open

circuit

line,

burnt

resistor, fuse, and

semiconductor

chips

in

the

first place.

(2)

If a defective

item

were

found,

it

has

to

be replaced

with

the

new

one. But. care

must

also taken as

there are

possible

defects in

mUltiple

number

of

components.

36

<tMZ1P16~

1. SPECIFICATION

Outline

MZ-800

The

MZ-1 P16 is

the

external

installation

4-color

plot

printer

designed

for

use

with

the

MZ-800 series person-

al

computer.

It

can be

fixed

on

the

MZ-800

when

the

table

is used.

Specification

Type

name

Print

method

Print speed

Printing size

Character set

Resolution
Power

supply

Power

consumption:

Physical

dimensions:

Weight

Accessories

Operating

MZ1P16
1, Black;

2,

Blue;

3,
Green; 4, Red
10 characters average
(smallest letter)
80/40/26

digits

(software

assigned)

115

0.2

mm

+5 V supplied

from

the

MZ-800 via

the

DC

jack

11

W

162(W) x 133(D) x

59(H),

excluding

accessories.

1

kg

(MZ-1P16)

Roll

paper

(1), ball

point

pen (one

each

of

black, blue, green, red).

paper

holder

(one each on side),

paper

shaft (1),

paper

guide

(1)

temperaturd

0

to

+35

centigrades
Storage
temperature

-20

to

+70

centigrades

Operating

humidity

80%RH,

maximum

MZ-800

2.

INSTALLATION

(Fixing

the

printer)

1.

Fix the printer

unit

on

the

table

as

shown

in the

figure.

(Place the

printer

in

the

arrow

direction

(D,

lightly

move

in the

arrow

direction

S,

then secure

it

with

screws.)

* It is also possible

to

use the printer free on the table

without

securing.

~/

/

r=

=======lI

Screw

for

securing

the

printer

Connection procedure after

the

installation

(D

Make sure

that

power

is

off

to

the MZ-800 and its

peripheral units.

<ID

Remove the printer connector cover on the back side
of

the MZ-800.

~

@ Connect

the

data cable and the

power

supply

cable

of

the

unit

with

the

printer

connector and

the 5 VDC

jack

of

the MZ-800.

@ For connection

of

the

printer

connector, use the

screws

that

had been at both ends

of

connector.

Rear side

of

the

MZ-BOO

't

la \

..

) \

A~~~\-Dat~able

\c

""0

onnector

cover

* When

this

unit

is in use, set the MZ-800 printer

dip

switch

to

the

MZ

side.

37

Power supply cable

3.

OPERATION

3-1. Block diagram

H

\

\

Intelligent

H

j

,

Con­nector

Buffer

interfacing

I---

J

r--

LSI

1\

,...

Control switches

{paper

feed

Reset
Pen exchange

3-1-1.

At

power on

At

power

on, more than

5V

of

pen up current

is

applied

for

a period

of

lOrns,

plus 5 and minus

Orns,

to

move the

carriage

556

steps backward on the X-axis in order to

initialize the colour position.

As

the carriage

is

held at the

left

margin

after disengagement

of

the motor, it

is

then

moved

30 steps forward on the X-axis, then stepped back

30 steps

again

to check

if

the colour position detector

has

been

made.

If

not, it continues to move the carriage

30

steps forward on the X-axis, then return 30 steps to

ensure

the made condition.

3-1-2.

Colour

change_

operation

To

change

colour, the slider makes three reciprocating

movements

of

6mm

(30

steps) at the left end

of

the X-axis

to

move

the pen position one step. When the desired pen

position

is

attained, it then returns to the home position.

Since

the pen rotor makes a unidirectional rotation at

the

left end of the

X-axis,

and

is

locked within printable

range,

care

must

be

exerted not to touch the rotor and

the

slider.

38

MZ-800

,---

-

\

I--

~

V-axis

,

I--

stepping

motor

J

Drive array

I

~

.

I--

X-axis

stepping

I--

motor

,

~

Pen

up!

~

........

Magnet

down

,

drive circu it

,.

magnet

,

L_

I

_J

Printer mechan

ism

3-1-3. Pen exchange operation
A pen needs to be exchanged with a fresh one when it

runs

out

of

ink. In such an event, the pen

is

moved 485

steps forward on the X-axis from the home position with

the used pen located on the top

of

the rotor, then take

out the used pen, by pressing the pen release lever and
exchange it with a fresh one.
3-1-4. Motor phase and rotating direction
The arrow head indicates the forward direction for both the

X-axis and Y-axis.

~

c

BC

AD

BD

MZ-800

3-2. Pen exchange

method

To remove pen, press the pen exchange button, when the
slider

is

at the right handside, push the pen release lever.

Motor

Push

the

pen

release lever

To

install the pen, push the tip

of

the pen through the

ring

of

the return spring in the fIrst place, then push into

the holder.

Upon completion, ensure that the tip

of

the

pen

is

engaged with the hole

of

the pen return spring.

If

colour change

is

done when the pen

is

disengaged from

the hole, it may cause improper rotation

of

the rotary

holder

as

the slider makes contact with the pen. Do not
try to rotate the rotary holder by hand when installing
the pen during replacement

of

the pens.

3-3. Stepping

motor

driving

Signal

• The

X-axis

stepping motor and the Y-axis stepping

motor are driven by the two-phase magnet.

Stepping motor driving signal

Basic drive pulse

Phase A

Phase B

Phase

C

Phase 0

n n n I I " :

~,

~WW~

~il";

I

' I ' ,

i ! i :

, I '

I

---[[Jr-!

-+--+--+-+-

I ,

Motor

clock

Hold

period

f-----i

i--tMH

--1

39

It

is

more effective to

save

power to shut off current

while the X and

Y axis motors

are

at a halt. But, there

may be a possible malfuction because

of

unsuppressed

vibration, if the current

is

turned off with a normal

pulse width. In order to

prevent this, current

is

applied

excessively for more than the

given

hold time (tMH =

lms or more).

3-4.

Colour

position

detector

The colour pOsition detector consists

of

a reed switch
and a permanent magnet and it may cause malfunction
owing to external vibration, and magnetic influence.
Especially, when deposit

of

alien matter or paper

frag-

ments

is

between the left end

of

the carriage and the

frame this may result in a failure

of

the colour detect

performance.

3-5. Character

set

Input

of

an undefmed code up to $20

is

ignored. Other
undefmed codes are represented in hexadecimal notation
using the pen in a next color position.

Pin configuration (top view)

TO

Vcc

XTAL1

T1

XTAL2

P27

RESET

P26

SS

P25

INT

P24

EA

P17

RD

P16

PSEN

P15

WR

P14

ALE

P13

DBo

P12

DB,

P11

DB,

P10

DB3

Voo

DB.

PROG

DBs

P23

DB,

P22

DB,

P21

Vss

P20

Pin Configuration

MZ-800

3-6.

Colour plotter printer control

LSI

Pin

assignment

Symbol

Name

In/out

Function

Vss

Ground

Connected

to

OY.

Vcc

Main power

Connected

to

5Y.

Voo

Power

Connected

to

5Y.

PROG

Program

I

Out

Not used.

Plo

~P17

Port I

Used

as

printer control signals.

P2

0

~

P27

I

Port 2

Used for data

input

port from CPU.

Do -D7

1

Data bus

Used for stepper

motor

control signals.

I

To

Test pin 0

In

Input

from pen change switch.

Tl

1

Test pin 1

In

I

Input

from paper feed switch.

INT

i

Interrupt

input

In

Data transfer strobe

MZ-

700 ...

MZ 1 PO

1.

I

RD

I

i

Read signal

In

Not

used.

-

I

Write signal

I

Out

Not used.

WR

i

I

RESET

!

Reset

In

Used

to

initialize the processor.

ALE

1

Address latch enable

Out

I

Not used.

I

I

I

PSEN

I

Program store enable

Out

I

Not used.

SS

I

Single step

In Not used.

EA

External access

In Active when EA

=

OY.

Pins used

to

attach the crystal oscillatQr or

RC

network

to

Xl,

Xl

Crystal inputs

In

generate internal clock. However, external clock signal may be
inputted

through these pins.

40

· ,vIZ-800

3·7. Interfacing

with

the

MZ·800

Fig. 1 shows the block diagram for connection with the
printer.

Fig.

2 shows its circuit description. Fig. 3 shows

the timing chart.

3·8. Block diagram

00---1

ARDP---I

ARDA

---I

Buffer

'~~

LSD

0

,

I

2

!

3

I

i

4

1

5

I

I

6

7

8

9

I

A

i

B

I

c

i

D

E

I

I

F

I

I

I

Table

of

character set

D ! E

iw

Q!

1 A Q i I i ! 0 i i I

I

!G#3iC'S

I I

l"lwlm

i

El$4DT

I I !'V!sl i I

l[8]x5EU

I :u; i i

[]8x6FUI

I

it::1

~--7i

C

8iHX

i

ihid!';

I

')

91 I Yj

I

1'1

'A--

I i K I I '

*~IJ2!

I

ibif1oi:

!

+ ; K [ ! C

lA

Xi

viCi~

'~I-~~:-f--l

r , <

L'~

I I

eli

I

:'

I~

i 1- =

NI

JI

I I

Ir'iuiyi

MPU

Transistor

array

Solenoid

driver

Functional

Switches

PAPER FEED

PEN CHANGE

ARDA

---...,

Color

position

detector

X.axis
stepping

motor

V.axls
stepPing

motor

PEN

UP/Down

Solenoid

The

CPU

sends data to the printer after confirming that

ARDA

is

in low state. Five micro seconds later, the strobe

signal

ARDP goes high. The

CPU

confirms that ARDA

is

in

high state, ARDP

is

returned

to

a low state 14.5 micro

seconds later.

DATA

____

~><~

______

~------

,

ARDP--------~--~

I

--:-:

-.;.:

...

51'S

I I

I I

41

.

L

I

I

14.5' :

I

I'S

4.

COlOR

PLOTTER-PRINTER CONTROL CODES

4-1.

Control codes used

in

the

text

mode

• Text code ($01)
Places

the printer in the text mode.

MZ-800

• Graphic code ($02)

................................................

Same as the BASIC

PMOOE

statement.

Places the printer in the graphics mode.

• Line up ($03)

..........................................................

Same as the BASIC PSKIP statement.

Moves the paper one line in the reverse direction. The line counter is decremented by

1.

• Pen test ($04)

.........................................................

Same as the BASIC PTEST statement.

Writes the following patterns

to

start ink flowing from the pens, then sets scale = 1 (40 chr/line),

colour

=0.

Black Blue

Green

Red

DODO

• Reduction scale ($09) + ($09) + ($09)

Reduces the scale from 1

to

0 (80 chr/line).

• Reduction cancel ($09) + ($09) +

($OB)

Enlarges the scale from 0

to

1 (40 chr/line).

• Line counter set ($09) + ($09) +

(ASCIIh + (ASCIIh

+ (ASCII)o +

($00)

...........................................................................

Same as the BASIC

PTEST

statement.

Specifies

the

number

of

lines per page as indicated by the 3 ASCII bytes code. The maximum num-

ber

of

lines per page

is

255. Automatically set

to

66

when the power is turned

on

or

the system

is

reset.

• Line feed

($OA)

.......................................................

Same as the BASIC PSKIP statement.

Moves the paper one line in the forward direction. The line counter

is

incremented by

1.

• Magnify scale

($OB)

Enlarges the scale from 2

to

1. (26 chr/line)

• Magnify scale

($OC)

Reduces the scale from 2

to

1 .

• Carriage return

($00)

Moves the carriage

to

the left side

of

the print area.

• Back space

($OE)

Moves the carriage one column

to

the left. This code

is

ignored when the carriage

is

at the left sfde

of the print area.

• Form feed

($OF)

Moves the paper

to

the beginning

of

the next page

and

resets the line counter

to

O.

• Next colour ($10)
Changes the pen

to

the next colour.

4-2.

Character scale

• The character scale

is

automatically set

to

1 (40 chr/line) when the power is turned on. Afterwards,

it can be changed by the control codes and commands.

• In the graphics mode, the scale can be changed within the range 0

to

63.

• The scale

is

set to 1 when the mode

is

switched from graphics

to

text.

42

MZ-800

4-3. Graphic mode commands

4-3-1.

Command

type

In

the

graphics

mode,

the

computer

can

control

the

printer

with

the

following

commands.

The

words

in

parentheses

are

BASIC

statements

which

have

the

same

functions

as

the

graphics

mode

commands.

Command name Format

Function

LINE

TYPE

Lp

(p=O

to

15)

Specifies the type

of

line (solid or dotted) and the
dot pitch.
p =

0 : solid line, p = I to

15

: dotted line

ALL INITIALIZE

A

Places the printer in the text mode.

HOME (PHONE) H

Lifts the pen and returns it to the origin (home

position).

INITIALIZE (HSET) I

Sets the current pen location as the origin

(x

= 0,

y=O).

DRAW (LINE) Dx,

y,

... , xn, yn

Draws lines from the current pen location to

(-

999~x,

y~999)

coordinates

(Xl.

Yt),

then to coordinates

(X2,

Y2),

and so forth.

RE LA TIVE DRAW

J.:lx,

.:ly,

...

, .:lxn,

.:lyn

Draws lines from the current pen location to

reI

a-

(RLINE)

(

- 999 ~ .:lx,

.:ly ~ 999) tive coordinates (.:lxI.

.:lYt),

then to relative coor-

dinates

(.:lx2,

.:lY2)

and so forth.

MOVE (MOVE)

Mx, Y

Lifts the pen and moves it to coordinates (x,

y).

(-999~x,

y~999)

RELATIVE MOVE

R.:lx,

.:ly

Lifts the pen and moves it to coordinates

(RMOVE) ( - 999

~.:lx,

.:ly ~ 999)

(.:lx,

.:ly).

COLOR

CHANGE Cn

(n=O

to 3)

Changes the pen colour to n.

(PCOLOR)

SCALE SET Sn

(n=O

to 63)

Specifies the character scale.

ALPHA

ROTATE

Qn

(n=

0 to 3) Specifies the direction in which characters are

printed.

PRINT

PCtC2C3

...

cn (n =

00)

Prints characters.

AXIS (AXIS)

Xp, q, r

(p=O

or I)

Draws an X axis when p = I and a Y axis when

(q =

- 999 to 999) p =

O.

q specifies the scale pitch and r specifies the

(r = I to

255) number

of

scale marks to be drawn.

4-3-2.

Command

format

There

are 5 types

of

command

formats

as

shown

below.

1.

Command

character

only

(without

parameters)

A,

H,

I

2.

Command

character

plus

one

parameter

L,

C,

S,

Q

3.

Command

character

plus

pairs

of

parameters

D,

J,

M,

R

" , " is

used

to

separater

parameters,

and a CR

code

is

used

to

end

the

parameter

list.

4.

Command

plus

character

string

p

The

character

string

is

terminated

with a CR

code.

5.

Command

plus

three

parameters

X

" , " is

used

to

separate

parameters.

43

MZ-800

MZ-800

1

2

3 4

5

,

7

•

•

10

n

12

CPU P.W.B. Lavout

o

E

F

G

H

46

Cassette Recorder

Caution of the Assembling

2

•

Be

sure ® and ®

must

be in exact

position.

3

Otherwise tape data

will

be

destroyed

when

"play"

is done.

47

MZ-800

4

5 6

MZ-800

7

8

9

10

11

Cassette

Recorder

Circuit

r-------

----------

--

-----

-----------------

--

-----·---·

,

","

Ht.,

J

, .

."

'[

' 0

,

,

,

,

,

,

,

I I

Cl

,

, ,

L

__________

__________

_________________

__

______

_______

J

" ' -

~ . ~""

"

""

.•

M,.,

.

TotIO"'O

.....

,~''''O.

,,,

_____

~J'('''OO<

o

'.U

____

'''''"''

G",

"CO"

"'",

al.'

_____

,,,"'

......

.,.

.,

{

"

•••

____

""".

".,

..

,OS

.. , ..

''''''

". """,.'RHV

....

Q.f·'

."

''''1C~

'''UO

oM","",

" .

'

'''

,"".

O"Ee'

",,,,,"'"

-----l:.-

.",,".,"

,.,,'"''''

Cassette

Recorder

Layout

MOTOR

ER

ASE flEAD

NOT",

,

ALe

"""'A"':'

VAl~"

."

,"

" , ,"""'_, " ,,,,",,,eo

1

."

<

....

~CI,.~CI

V"~(S

A"

'N

.'

•

'0-'"

J

Ac'

.""'OR,

AR,

'"

"~Tf

U'HSS

O,,,,.w.,,

...

<0,"

.0

,

VOL

T

~G"

"'''''';Uft,O

' "

OM

""t~T

'~D

I~.

TO"

'"

C"

.....

G"""""

'~,,~

., V ... , ''''

vC,U""

<,,"HO'

~'~I~U"

' " 0

~O

S<G

••

L

'

....

0''''''''01<, 'ND

C',""U,"

'"."CT

'0

C""CI

wnHOO'

~{"'C,

'0.

'

'''"Ov",,~''

RIP

HEAO

12

•

B

c

o

E

F

G

H

MZ-800

I

1

I

2 3

I

4

I

5

6

I

MZ-1P16 CIRCUIT

"

-

c

..

z (

..

, "

M 5

1-'

aO~OM

-OS'lP

cm

,-----------

-,

L _

__

_

MZ·1P16 LAYOUT

N

I064AC

•

-8

00 MZ-800

1

,

MZ-1E20 LAYOUT

•

JOY STICK LAYOUT

•

o

,

,

, ,

--

• •

N1063R

JOY2L-

__

_

JOY,

9 10

"

12

•

,

c

o

E

•

F

o

•

G

L-

__

_

H

-

48

1 2

Power Supply Circuit

SDI

AC

240V

49

SWI

o
o

•

FI

T~OOmA

~CI

II

A.

LI

L.l..l

ZOOS

I

•

3

01

RB1~1

or

1 J

481

4

.,

10/2W

C3

.' Lh.".I.

..

3300,F/400Y~

2 I

et

I

5

e7

1.u"U.V

r-

,

••

lOO

Q3

2SC1213D

6 7

A.

TI

L..!..l

Z

0110

.,

I

..

1

c

,.

&800P

0"

882-004

A.

PCI

L.ll

PC-511

B

•

L21

IDOlS

,

9

CONNECTOR

I

I
I

I

I

I

--,

ISV

I

I

I

I

I

1

1

IG

G

sv

DC

.,lAC

K

•

10

11

12

8

c

o

,

.,

.

.

'.

.

- j

e

F

G

H

MZ800

rn

CPU

Unit

Exteriors

NO.

PARTS CODE

PRICE NEW

PART

DESCRIPTION

RANK

MARK RANK

1

CCOVH1002ACZB

AQ

0

I/O

Cover unit

2

OUNTG1412ACZZ

AX

0

Bottom

cabinet

3

OUNTG1413ACZZ

AX

0 Top cabinet

4

OUNTK1418ACZZ

**

N

C

CPU

PWB Unit

5

OUNTK1419ACZZ

BA

N C

Joy PWB

Unit

6

OUNT

1409ACZZ

BS

B Cassette unit

7

OUNT-1420ACZZ

BM

N

E Power

supply unit

.

8

DUNT-1421ACZZ

BM

N E

RF

Modulator

(Europe except France)

9

DUNT-1435ACZZ

BK

E

RF

Modulator

(France only)

10

GCOVH1002ACZZ

AB

D Aclyric cover

11

G F

TAR

1019

AC

Z Z

AB

-0

lid

for

26P

connector

12

G F

TAR

1025

AC

Z Z

AC

0

lid

for

JOY

connector

13

LCHSM1018ACZZ

AY

C

Main chassis

14

P C U S S 1 0 0 2 A C Z Z

AA

C

Speaker cushion

15

QCNCW1008AC03

AC

C Connector

16

QSW-K1031ACZZ

BH

C

Key board unit

17

QTANS1002ACZZ

AD

C Ground terminal

18

QTANS1003ACZZ

AD

C Ground terminal

19

VSP0080P

608

N

AN

B Speaker

(P008P)

20

X B

BSC

3 0

PlO

000

AA

C

Screw

(3X

10)

21

XBPSM30P06KSO

AA

C

Screw

(3X6KS)

22

XBPSM30P08KOO

AA

C Screw

23

XUPS030P10000

AA

C

Screw

(3XlO)

24

HBOGB1003ACZZ

AC

0

"Sharp"

badR:e

25

GLEGG1020CCZZ

AD

0 Rubber

foot

26

PGUMS1266CCZZ

AA

C

Cushion

for

PWB fixing angle

27

LANGT1077ACZZ

AC

C

Angle

for

PWB

28

LANGT1078ACZZ

AC

C

Angle

for

PWB

29

QCNCM1056ACZZ

AG

C Connector

30

QCNW-I111ACZZ

AK

C

Cable

(15pin)

31

QCNW-1112ACZZ

AG

C

Ca

ble

(9pin)

32

Q S W-Z 1 0 3 2 A C Z Z

AM

N

B Dip switch (4pin)

33

XBPSM30P06KSO

AA

C

Screw 13 x 6KS)

34

GCOVH1009ACZB

AN

0

I/O

Cover

35

GFTAR1021ACZB

AE

0

lid

36

HPNLC1004ACZB

AE

0

I/O

Panel

37

X B

BSC

3 0 P 0 6 0 0 0

AA

C

Screw

(3X6)

-1-

MZ800

rn

CPU

Unit

Exteriors

-2-

MZ800

[lJ

I/O

Cabinet Unit

NO.

PARTS CODE

PRICE

NEW

PART

DESCRIPTION

RANK MARK RANK

1

C

CAB

B 1 0 1 8 A C Z B

AS

D

I/O

Cabinet unit

2

GFTARI024ACZA

AF

D Lid

for

slot

3

LCHSMIOIOACZZ

AQ

C

I/O

Chassis

4

L H L D

Z 1 0 0 5 A C Z Z

AD

C

PWB 2uide

5

QCNW-I076ACZZ

BA

C

Ca

ble with conector

(for

44pin)

6

X B

BSC

3 0 P 0 6 0 0 0

AA

C

Screw

(3X6)

7

X B P

S D 3 0

PlO

K S 0

AB

C

Screw

(3

X lOKS)

8

X

UPS

D 3 0 P 0 8 0 0 0

AA

C Screw

(3X8)

.

I----------

-_.

f---

-3-

MZ800

[l]

CPU Board Unit

NO.

PARTS

CODE

PRICE

NEW

PART

DESCRIPTION

RANK

MARK

RANK

1

LBSHZ2029SCZZ

AB

C

Bushing

2

QCNCM1009ACZB

AA

C

Connector (2pin)

3

QCNCM1009ACZi

AC

C Connector (9pin)

4

QCNCM1009ACZL

AC

C

Connector

for

Colour encoder

(l2pin)

5

QCNCM1009ACZO

AC

C

Connector (15pin)

6

QCNCM1010ACZZ

AF

C

Connector

for

Power supply (For power supply)

7

QCNCW1013ACZZ

AC

C

Connector for Recorder (For

da

ta recorder)

8

QCNCM1038ACZZ

AM

C Connector (JAE 50P)

9

QCNCW1270CC2J

AE

C

Connector

for

Key

10

QJAKC1013CCZZ

AC

B Jack

(for

MIC)

11

QSOCZ6418ACZZ

AD

C

IC

socket (18pin)

12

QSOCZ6428ACZZ

AE

C

IC

socket (28pin)

13

QSOCZ6440ACZZ

AG

C

IC

socket (40pin)

14

QSW-P1009ACZZ

AF

B Push switch (Reset)

15

RCRS

1007

AC

Z Z

AV

B

X-TAL

(l7.7344MHz)

16

RMPTCB102QCKB

AD

B Block resistor

(1.0KOx

12

1/8W

±10%)

17

RMPTC8103QCKB

AD

B Block resistor

(lOKox8

1/8W

+10%)

18

RVR-B1450QCZZ

AE

B

Variable resistor

19

VCEAAU1AW107Q

AB

C

Capacitor

(lOV

100JJF

6.5~

x 10)

20

VCEAAA1AW227M

AC

C Capacitor (lOWV

27JJF)

21

VCEAAU1EW475Q

AB

C

Capacitor (25WV

4.7JJF)

22

VCTYPU1EX223M

AB

C Capacitor (25WV 0.0221'

F)

23

VCTYPU1EX333M

AB

C Capacitor (25WV 0.033pF)

24

VCTYPU1EX473M

AB

C Capacitor (25WV 0.047

pF)

25

VH

065040-032

BT

B

IC

26

VH

LH0080A/-1

AX

B

LSI

(LH0080A)

27

VH

LH0081A/-1

AW

B

LSI

(LH0081A)

28

VH

LM386N//-1

AH

B

IC

29

VH

MB 8 14

1 6

1 2

AZ

B

LSI

(MB81416

12)

30

VH

NE556N//

1

AH

B

IC

(NE556N)

31

VH

UPD8255/

1

AV

B

LSI

(UPD8255)

32

VH

27128/AC85

BP

B

P-ROM

33

VH

8253////-1

BA

B

LSI

(8253)

34

VS2SC458K//

1

AC

B Transistor (2SC458K)

35

VCCCPU1HH101J

AB

C Capacitor (50WV 100pF)

36

VCEAAU1CW106Q

AB

C

Capacitor

(l6WV

10pF)

37

VCEAAA1CW226Q

AB

C

Capacitor (16WV 22pF)

38

VCEAAU1HW105Q

AB

C

Capacitor (50WV 1.0pF)

39

VCKYPU1HB102K

AA

C

Capacitor (50WV 1000pF)

40

VCSATA1CE226M

AB

C

Capacitor

(l6WV

22uF)

41

VCSATA1CE336M

AB

C Capacitor (16WV 33uF)

42

VCTYPU1EX103M

AB

C

Capacitor (25WV O.OlpF)

43

VCTYPU1NX104M

AB

C Capacitor (12WV 0.10pF)

44

VHDDS1588L1-1

AD

B

Diode

(OS 1 588L1)

45

VHiCD4069B/-1

AE

B

IC

46

VHiM74LSOO/-1

AE

B

IC

M74LSOO)

47

VHiM74LS02/

1

AE

B

IC

M74LS02)

48

VHiM74LS04/

1

AE

B

IC

M74LS04)

49

VHiM74LS08/

1

AE

B

IC

M74LS08)

50

VHiM74LS125

1

AH

B

IC

M74LS125)

51

VH'M74LS14/

1

AM

B

IC

M74LS14)

52

VH

M74LS145

1

AH

B

IC

53

VH

M74LS245-1

AM

B

IC

(M74LS245P)

54

VH

M74LS257-i

AQ

B

IC

(M74LS257P)

55

VH

M74LS32/-1

AF

B

IC

(M74LS32)

56

VH

M74LS365

1

AF

B

IC

(M74LS365P)

57

VH

M74LS74/

1

AG

B

IC

(M74LS74)

58

VH

M74LS86/-1

AF

B

IC

(M74LS86P)

59

VH

S N 7 4 L S 3 7 3 N

AL

B

IC

(SN74LS373)

60

VH

SN7417N/-1

AG

B

IC

(SN7417N)

61

VHiSN76489/-1

AW

B

IC

62

VHi4164-150-H

AZ

B

IC

(4164

63

VRD-ST2EYOOOJ

AA

C

Resistor

1/4W

+5%)

64

VRD

S T 2 E Y 1 0 0 J

AA

C Resistor

1/4W

100

±5%)

65

VRD

ST2EY101J

AA

C Resistor

1/4W

1000

±5%)

66

VRD

ST2EY102J

AA

C Resistor

1/4W

1KO

±5%)

67

VRD-ST2EY103J

AA

C Resistor

(1/4W

10KO

+5%)

68

VRD-ST2EY104J

AA

C Resistor

(l/4W

100KO

+5%)

69

VRD

S T 2 E Y 1 2 2 J

AA

C Resistor

(l/4W

1.2KO

±5%)

70

VRD

RV2EY152J

AA

C Resistor

(l/4W

1.5KO

+5%1

71

VRD

ST2EY182J

AA

C Resistor

(1/4W

1.8KO

+5%)

72

VRD-ST2EY183J

AA

C Resistor

(l/4W

18KO

+5%)

73

VRD-ST2EY221J

AA

C Resistor

1/4W

2200

+5%)

74

VRD-ST2EY330J

AA

C Resistor

1/4W

330

+5%)

75

VRD

S T 2 E Y 3 3 1 J

AA

C Resistor

1/4W

3300

+5%)

76

VRD

ST2EY332J

AA

C Resistor

1/4W

3.3KO

+5%)

77

VRD

S T 2 E Y 4 7 2 J

AA

C Resistor

1/4W

4.7KO

+5%)

78

VRD

S T 2 E Y 4 7 3 J

AA

C Resistor

1/4W

47KO

±5%:

79

VRD

ST2EY561J

AA

C

Carbon resistor

(l/4W

5600

±5%)

80

VRD

S T 2 E Y 6 8 3 J

AA

C

Resistor

(l/4W

68KO

+5%)

-4-

[!]

Key

Board

Unit

NO.

PARTS

CODE

PRICE

NEW

PART

RANK

MARK

RANK

1

OCFD5799D////

AF

C

Space

key

2

OCF3362A/////

AB

C

Crank

guide F

3

OCF3363A/////

AD

C

Crank

shaft A

4

OCF6303A/////

AC C

Key_

contact

5

OCF3357A/////

AA

C

Guide

tip

6

OCF4906A/////

AX

C

Frame

(NSH-1)

7

OCF3361A/////

AB

C

Crank

holder

F

8

OCF3364A/////

AA

C

Return

spring

9

OCF3364B/////

AA

C

Return

spring

10

OCF3364C/////

AA

C

Return

spring

11

OCF0711C/////

AA

C

Return

spring

12

OCF4274A/////

BE N

C

Key

top set A

13

OCF6387C/////

BB N

E

PWB

W.

Parts

14

OCF1731F/////

AF N

B

LED

15

OCF4988A/////

AN

C

Flat

cable

16

OCF4976A/////

AC C Protector

17

XBTSD20P06000

AA

C

Screw

18

OCF4274B/////

AT N

C

Key

top set B

19

OCF4274C/////

AT N

C

Key_

tQP

set C

20

OCF4274D/////

AD

N

C

Key

top set D

21

OCF4274E/////

°A

T

N

C

Key

top set E

22

OCF4274F/////

AH

N

C

Key

top set F

23

OCF4274G/////

AK

N

C

Key

top set G

24

OCF4274H/////

AF N

C

Key

top set H

25

OCF4274J/////

AH

N

C

Kev

top set J

26

OCF4274K/////

AD

N

C

Key

top set K

27

OCF4274L/////

AH

N

C

Key

top set L

28

OCFD5000D////

AG

C

Blank

key

top

* Key

top

unit

B

UNIT

(1-9,

0,

*,

i,

-,

1.

\,Q,

W,

E)

C

UNIT

(M, N, V,

C,

X,

Z,

L, K,

],

H, F,

S,

I, U, Y,

T)

D

UNIT

(?)

E

UNIT

(R,

0,

P,

A,

D,

G,

B,

@,

c.;,:,)",

.,

/,

l)

F

UNIT

(GRAPH,

CR,

SHIFT)

G

UNIT

(Fl,

F2,

F3,

F4,

F5)

H

UNIT

(INST, DEL)

]

UNIT

(i,

-+,

~,+-)

K

UNIT

(ALPHA,

CTRL)

L

UNIT

(ESC,

TAB,

ALPHA,SHFT)

r--------,

,

~<

~

..

7:

.,

I

I

,

&o..

_______

~

for

60

key)

fa

r shift

key)

for

space

key)

for

hart

key)

-5-

MZ800

DESCRIPTION

15

MZ800

[[]

Power

Supply

Unit

NO.

PARTS

CODE

PRICE

NEW

PART

DESCRIPTION

RANK MARK RANK

1

pco

VS

0181

V A Z Z

AG

C Case (B)

2

P

CO

VS

0215

P A Z Z

AF

C

Case~A~

3

P

Z E T i

002

1 P A Z Z

AE

C

Barrier

4

LBNDCOO08PAZZ

AA

C

Wire band

5

X B B

SM

20

P 0 6 0 0 0

AA

C

Screw

(2X6)

6

X B

BSC

3 0 P 0 6

000

AA

C

SCrew

(For heat sink

INLE"Q(3X6j

7

XBPSC30P06KOO

AA

C

Screw (For switch)(3 X 6)

8

X B P

S D 3 0 P 0 8 0 0 0

AA

C

Screw (For heat sink)

9 X B P

S D 4 0 P 0 8 K S 0

AA

C

Screw

(4PX8S)

10

X B P S C 3 0 P 0 6 K S 0

AA

C

Screwi3P

X 6S1

11

QFS

COO

0 2 P A Z Z

AD

A

Fuse

[Fl

]

12

Q F S H A 0 0 0 1 P A Z Z

AA

C

Fuse

holder (H

0011)

13

DSOCN0344PAZZ

AF

C Connector

(out

put)

W.

Wire

14

QJAKCOO04PAZZ

AD

C

Jack~For

DC~

15

XNESD30-24000

AA

C Nut (For heat sink)

16

R T R N

ZOO

3 5 P A Z Z

AE

N

B Filter coil

[L2!]

17

R T R N Z 0 1

lOP

A Z Z

AT

B Transformer

[Tl]

18

R T R N

ZOO

8 1 P A Z Z

AH

C

Filter

[Ll

]

19

RVR

M0089PAlZ

AC

B

Va

ria

ble

resistor

Cl

KO)

[VR21]

20

VHDRB156///-1

AG

B Diode

[D1 ]

21

RH

i X 0 4 6 4 P A Z Z

AF

B

IC

[IC21 ]

22

VRD

R U 2

EEl

5 2 J

AA

C Resistor

(1/4W

1.5KO

±5%)

[R9]

23

VRD

SC2EF180J

AA

C

Resistor

(1/4W

180

±5%)

[R8]

24

VRD

S C 2

EFl

5 1 J

AA

C

Resistor(1/4W

1500)

[R6]

25

RC

F Z 0 3 0 C P A Z Z

AE

C

Capacitor

[C2]

26

VRD

R U 2

EEl

5 1 J

AA

C

Resistor~1/4W

1500~

[R7]

27

VRD-SC2EF272J

AA

C

Resistor

Cl/4W

2.7KO

±5%)

[R22]

28

RC-QZ0023PAZZ

AD

C

Capacitor (AC400V 3300pF)

[Cl,5,6]

29

RR

X

ZOO

0 8 P A Z Z

AB

C

Resistor

[R4]

30

VCEAAU1AM228M

AC

C

Capacitor

(lOWV

2200uF)

[C2223]

31

VCEAAU2GM105M

AD

C

Capacitor (400WV 1.0uF)

[C7]

32

VCEAAU2GM476Y

AH

C

Capacitor (400WV 47

uF)

[C3]

33

VCKYPU1HB682K

AA

C

Capacitor (50WV 6800pF)

[C12]

34

VCKYPU1NB204Z

AB

C

Capacitor

(12WV 0.2OuF)

Ecg]

35

V C K Y P U 3 D B 1 0 1 K

AB

C

Capacitori2000WV

10QQEl

[ClO]

36

VCQYKU1HM102K

AA

C

Capacitor(50WV

1000pF)

[C2l]

37

VCQYKU1HM333K

AB

C

Capacitori50WV

0.03~F)

[C25]

38

VCTYPG1CD104Z

AE

C

Capacitorj16WV

O.lOEF}

[Cll]

39

VHDDFC05R//-1

AC

N

B Diode

[D2]

40

V H D 1 S 2 0 7 6

A/-

1

AB

B

Diode

Cl

S2076A -

FEC)

[D3]

41

VRD-ST3AF224J

AA

C Resistor

Cl

W 220KO

±5%)

[R3]

42

VRS-PT3AB1ROJ

AA

C

Metal film resistor

(1 W 10 + 5%)

[R5]

43

VRS

PT 3 DB

683

J

AA

C

Resistor

j.2W

68KO +

10%}

[R2]

44

VRW-KT3DC100K

AC

C

Resistorj2W

100

+100/ol

[R!]

45

VS2SC1213-DlA

AC

C

Transistor

[Q23]

46

PRDAR0143PAZZ

AF

C

Heat sink

47

PRDAR0144PAZZ

AE

C Heat sink

48

VHDESAC8204-2

AN

B Diode

[D21]

49

VS2SC3150//

1

AK

C

Transistor

[01]

50

VRD-RU2EE

1 0 1 J

AA

C

Resistorjl/4W

100Ql

[R21]

51

VRD

SC2EF332J

AA

C

Resistorjl/4W

3.3KOl

[R23]

52

RH-PX0075PAZZ

AK

B Photo

transi~tor

[PC1]

53

QSW-COO03PAZZ

AK

B

AC

switch

[SW!]

54

QSOCAOO03PAZZ

AF

C

AC

inlet

[SOl]

-.

-6-

MZ800

[[]

Power Supply Unit

1

54

53

47

'

13

, -

MZ800

[§J

Packing Parts

NO.

1
2
3
4
5
6

7

8
9

la

11

12
13
14
15
16

17

f--

18

f--

19
20

21
22

-.-~

---

13

PARTS

CODE

QACCZ3321QCN1
QACCE3620QCZZ
QCNW-1065ACZZ
QCNW-1049ACZZ

TiNSM1294ACZZ
TiNSG1212ACZZ
T

LAB

Z 1 0 1 0

AC

Z Z

T

lAB

Z 1

102

AC

Z Z
SSAKA5004CCZZ
SSAKHOO13HCZZ
SPAKC1556ACZZ
SPAKC1552ACZZ
SPAKA1624ACZl
SPAKA1624ACZR
SPAKA1625ACZZ
SSAKHOO14HCZZ
SSAKA0231QCZZ
R T P E K 1 0 0 6 A C 8 4
T

lAB

Z 1 1 0 3 A C Z Z

T

lAB

Ell

1 9 A C Z Z

T

lAB

Ell

20

AC

Z Z
TlABZ1009ACZC
T

lAB

SI

128

AC

Z Z

~J

"'1"'-""

CASsETTE TAPE

PRICE

NEW

RANK MARK

AL
AL
BA
AN
AC

N

BE

N
AD
AD
AA
AA
AQ

N
AQ

N
AH

N
AH

N
AM

N
AB
AA
BB
AA
AC
AC
AA
AB

16

PART
RANK

C
D
D
C
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D

DESCRIPTION

AC

cord (France only)

AC

cord (Eurooe except France)

Cable

for

TV (France onlv)

Cable

for

TV (Eurooe except France)
Instruction manual (Supplement)
Instruction manual Basic (Europe except France seeg)
Function label
Graphic label
Poly bag

(100

X 300llln)
Poly bag (260X400llln)
Packing case (France only)
Packing case (Europe except France)
Packing cushion L
Packing cushion R
Packinll sleeve (Accessories)
Poly bag

(640 X 5001llR)

Poly bag

(80 X 220

30U)
Master cassette tape
Label (DC

5V}

label

for

tape

(lZ016)

label

for

tape

(lZ013)
Label
Caution

14

15

i'

-

4

/1

1 6

: EUROPE

Ol\L

Y EXCEPT

/ FRA!\CE &

SF-Ea

~.

10

1/

: _

/7

'::-8

J..'

1--+++---17

MZ800

rn

Cassette Unit Exteriors

NO.

PARTS

CODE

PRICE NEW PART

DESCRIPTION

RANK MARK

RANK

1

o B V 0 7 5 7 1 7 0

043

AA

N D

Tape

mirror

--

2

o B V 6 6 1 1 8

200

0 2

AC

N

C

Cassette lid sprinll

3

o B V 6 6 8 8 0 0 0 0 1 7

AT

N D Cabinet ass'y

4

o B V 6 6 8 8 0 4 0 0 1 9

AL

N D

Cassette lid ass'y

--

5 o B V 6 6 8 8 2 2 0 0 1 5

AC

N D Plate

6

o B V 9 7 1 0 2 6 0 4 1 4

AA

C

Screw

(P2.6X4

SN)

7

o B V 9 7 1 1 2 6 0 4 1 7

AA

C

Screw

(T2.6X4-SN)

.-

8 o B V 9 7 1 8 2 6 0 5 1 1

AA

N

C

Screw

(P2.6X5-SN-S)

9

o B V 9 7 6 0 2 6 1 0 1 8

AA

N

C

Screw

(TP2.6XI0-SN-A)

._-

10

o B V 6 6 8 0 0 1 0 0 0 5

BG

N E

Amp

PWB unit

11

o B V 6 6 8 0 4 0 0 0 1 7

BP

N E Mechanism ass'y

12

o B V 0 6 4 6 3 1

000

6

AA

N

C

Lead wire clamp

-

13

o B V 6 6 8 5 4 0

000

1

AG

N

C

Connector (9pin)

. -

.

__

..

-

4-----"'''''-

3

---------/

5-------1

11------

-

~--9

1

..

----

12

8

~---------9

-

9-

MZ800

[ID

Mechanism Unit (For Cassette)

NO.

PARTS

CODE

PRICE

NEW

PART

DESCRIPTION

RANK

MARK

RANK

I

OBV0210680007

AN

N B Record -:j:llay back head

2

o B

V 0 2 I

128

0 0 0 6

AH

N B Erase head

3

o B

V 0 2 2 2 8 3

000

I

AW

N

B

Motor

4 o B V 0 4 4 0 8 0 0 0 0 4

AM

N

B

Tape co unter

5

o B

V 0 5 6 0 6 9 0 0 0 4

AD

N B

Counter

6

o B

V 0 5 6 0 8 0 0 0 0 9

AD

N

B

Ca

psta n belt

7

o B

V 0 5

609

5 0 0 0 5

AD

B Gear belt

8

o B

V 0 6 3 0 1 2 1

009

AA

N

C

EXT spring

9

o B

V 0 6 3 0 2 2 0 0 0 9

AA

C

EXT spring

la

o B V 0 6 3 0 6 0 0 0 0 7

AA

C

EXT

~ing

11

o B V 0 6 3

196

0 0 0 1

AA

C

EXT spring

12

o B V 0 6 3 1 9 8 2 0 0 9

AA

N

C

EXT spring

-

13

o B V 0 6 3

199

200

2

AA

N

C

EXT

spring

--14

o B V 0 6 3 2 0 6 0 0 0 5

AA -N

C EXT

~ing

15

o B V 0 6 3 2 0 7 0 0 0 8

AA

N

C

EXT spring

l~t)O

B V 0 6 3 5 1 1 0 0 0 0

AA

C

COM

spring

17

0 B V

06-3

6 9 7 3 0 0 2

AA

C

SPl

spring

-181 0 B V 5 6 2 4 1 5 0 0 0 3

AF

C

Sprin&.

-

IW+.!!..!! V 0 6 5 3 3 8 0 0 0 9

AA

C

lead-wire

ciamper

20

0 B V 3 8 0 I 2 9 0 0 0 9

AC

C

Stop lever

21

! 0 B V 3 8 0 1 3 1 1 0 0 7

AD

C

Record lever

_

-2?i

0

BV

3 8 0 1 3 2 1 0 0 0

AC

C

Play lever

23

0 B V 3 8 0 1 3 3 1 0 0 3

AC

N

C Rewind lever

j4

r

O-S:

l

l..80

134 1 006

AD

N

C

F.F.

lever

25

0 B V 5 0 0 1 7 0 0 0 0 5

AA

C

Flywheel

shaft supporter

1H~

~~~H{~_U

~

~ ~ ~

AC

N

C Record switch sPIing

AB

C Flvwheel Base

28

,OB

V 6 5 0 I 3 6 1 0 0 6

AD

N

C

lock

plate

29rOj:i--':~6

5 0 1 3 7 2 0 0 0

AC

N

C

Safety lever

300BV6501380001

AB

C Eject arm

filJi-~~H--~+:~!

~

~

: -

AB

C

Stoll.arm

AB

N C Reverse cue lever

AB

N

C

Record lock lever

341TBv650-14j-looo

A E C

Take-up

arm set

3st-lfaT&-s(f14TooQT-

AF

C

Pinch roller base ass'y

36

lOB

V 6 5 0 I 4 6 1 0 0 7

AG

C 6 Push switch base

-

37

lo-sv65 0 1 8 3 2 0 0 3

AC

C Push

s~ring

3sro-sv65Ols-4Toos-

AC

N

C

Stopper spring

3911J3:f656T

6 3 0 0 0 6

AB

C

Arm

su~~rt

A

40

i 0 B V 6 5 0 2 2 5 1 0 0 5

AD

N

C

Switch

shaft

:Ht~

~+H~-;

~ ~

~ ~

~

AK

N

C

Flywheel

___

A F

--t-N

C

Take-

up

reel

base ass'y

43

. 0 B V 6 5 0 2 5 9 5 0 0 4

AF

N

C

Reel

base ass'v A

l~lrrt-Trrn

~

~

~ ~

i

A B

___

C

Take-up

gear

AB

C

Take-llQ

lever

46

,OB

V 6 5 0 2 7 5 2 0 0 1

AG

N

C

Clutch

ass'y

_~?T~):i

V_

65T-Z::-f-Zo

0 0 2

A-F

N

C Rewind arm ass'Y.

A-F

--

C

First foward arm

ass':!,

48,OBV6502930005

N

49106-,r6502940008-

AA

N

C

Tension pick

u~

50

ra-B

V 6 6 2 8 6 2 0 0 2 4

AD

N

C

Push button

5110

B V 6 6 6 1 0 5 0 0 0 8

AG

N

C

Head base ass'v

~.

~

~11f~~~J~+

~ ~ H ~ ~

AB

N

C

Switch lever

-~

r--

A

A

N

C

EXT

Spring

--

__

541 (LBX

6§

_~

L~jU!JLQ.2_

f-A

S

N

C

Mechanism chassis ass'y

55

' 0 B V 6 6 8 1 2 0 0 0 0 7

AE

N

C

Angle

56t_0_B_V

__ L6 8 2 7 0 0 0 0 5

AG

N

C

Motor

su~~ort

57

,OB

V 9 7 1 0 2 0 0 2 5 4

AA

N C

Screw

(P2X2-SK)

--

j8_}QJLY_~_LLQ.1Jl_01._W---

f-

A A

C

Screw

(P2X3-SN)

--

59-i-

Q_E3

_'L~_7

__

L.Q.1..

QQ.4 1 6

AA

C

Screw

(P2X4-SN)

-~----------~~--

60

i 0 B V 9 7 1 0 2 0 0 5 1 9

AA

C

Screw

(P2X5-SN)

~g_E3"y

9 7 1 2 2 0 0 4 1 2

AA

C

ScrewJ_l2X4

SN~

--

-*t~-

~

~

~

H-

~

~ ~

H 6

~

__

AA

C

Screw(P2X4-SN-S)

--

AA

C

Screw

(P2XI0-SN)

------

-(;4

OBV9760260811

AA

C

Screw (Self tapp

TP2.6X8-SN-A)

--65lOEi

V 9 7 9 9 0 2 4 0 0 6

AA

N

--

C

Screw

(P2X4.7-SN)

&~-HS.

V-J-~llJl.JJi~2...=b~

--

C

E Tvpe ring

(ZR1.5-SU)

---------~-~~~~~-"--"

67

0 B V 9 8 1 1 0 2 5 1 4 5 A A

C

E Type ring

(ZR2.5-SU)

---~-~

-6S;-OBV98TI0301431

A A

C

! E

T~~e

rin:

tZR3'-SU)

j91-QJf~

~_L~LQ_

iJL

1

U_-:-

:=MT-

N

=t

C

----~-----------

lET

e rin

SW2-SN)

--~-~----.----~

70

0 B V 9 8 7 0 0 0 3 0 0 3 , A

A,

I

C

: Washer

(W021060030SN)

1l,OBV9870012005

AA

N+g

washer_~W0301

00080SI'.jL~___

___

_~

_________ ~ ________

i210-BV

9 8 7 4 0 0 2 0 0 4

t-

A

A I

jj

r

b--ifv9TI-To26004--

C

Washer

W0210450ill

___

~~

_____

~~

__

~~

________

~

______

-

------t-

_AA_t

I

Washer

{WP012036025)

----~~-----------~-----------

-i-----------

i

I

I

~+.::~=------

I

r

·~r--~

..

-

---r----

----------

I

----------------~--~~

--

-l-

--

I

-10-

[ID

Mechanism Unit (For Cassette)

i~;

_______

:

~

67

~_35

~~,----17

, 62

,

r-

56

~~~--i--

-

1+!-

-~~-~-'~j

,

2:~~"

2~

,

49

ck

~

~

51

40----,

60'----

52--

66----

43-----

"

--------:;;:T'--:-:

20'---~=__-

31

67--------.

~~==-==-~

-=--==--=~~?----f{{

i

33 I

~

!

6:

_________________________

-.g~/?:~_i\il_~

26

Jl.

--------~':3

56-

Jp 37

. $-34

'~15

b'

7

(\

h \

60

--~

::

&.~

.....

.

-t:)

::~

59

J'!

-11-

~

~

------4

I

&'

56

~-65

'----59

11.-..--55

---62

-~-44

~--73

L~---42

L----5

L------45

J~

66

Qf""

ti. 67

~----'-----

MZ800

[9J

PWB

Unit

(For Cassette)

NO.

PARTS CODE

PRICE

NEW

PART

DESCRIPTION

RANK

MARK

RANK

1

o B

V 0 3 6 4 1 8 0 0 0 2 AH B Slide

SW

[SWl-SWl-3]

2 o B V 0 3 6 5 8 0 0 0 0 8

-A F

N B Leaf

SW

[SW2]

3 o B V 9 0 2 0 0 4 6 2 5 0

AF

N B Transistor

(2SC2120

Y)

[Q3,Q4]

4

V

HOD

S 1 5 8 8 L 2

1

AB

B Diode

[01

04]

5 o B V 9 1

103

4 0 0 0 8

AK N B

IC

(uPC1470P)

[lC2]

6 o B V 9

205

1 1 8

149

AA N

C

Resistor

(R014018lJ

1800)

[R20]

7 o B V 9 2

086

1 0 2 4 8

AA N

C

Resistor

(R016Tl

02JT 1

KO)

[R21 R6]

8

o B V 9 2

086 1 034

1

AA N

C

Resistor

(R016Tl03JT

10KO)

[RI8,10,9,713IS

28]

o B V 9 2

086 1 034

1

AA N

C

Resistor

(ROI6Tl

03JT 10KO)

[R27]

9

o B

V 9 2 0 8 6 1 5

140

AA N

C

Resistor

(ROI6TlSlJT

lS00)

[RI9]

10

o B V 9

208

6 1

534

6 AA

N

C

Resistor

(ROI6TlS3JT

ISKO)

[R3]

11

o B V 9 2 0 8 6 1

544

9

AA N

C

Resistor

(ROI6TlS4JT

lS0KO)

[Rll]

12

o B V 9 2 0 8 6 2 0

540

AA N

C

Resistor (ROI6T20SJT)

[RI4]

13

o B V 9 2 0 8 6 2 2

243

AA

N

C

Resistor

(R016T222JT

22KO)

[RI2]

14

o B V 9 2

086

2 2

346

AA N

C

Resistor

(ROI6T223JT

22KO)

[RI6]

15

o B V 9 2 0 8 6 2 2

449

AA

N

C

Resistor{ROl6T224JT

220KOl

[RI]

16

o B V 9 2 0 8

627

145

AA

N

C

Resistor

(R016T271JT

27001

[R30]

17

o B V 9 2 0 8 6 3 3

144

AA

N

C

Resistor

(ROI6T331JT

3300)

[R22]

18

o B V 9 2 0

864 7 048

AA

N

C

Resistor

(ROI6T470JT

470)

[R2]

19

o B V 9 2 0 8

647

141

AA

N

C

Resistor

(ROI6T471JT

4700)

[R26]

20

o B V 9 2 0 8 6 4

734

7

AA N

C

Resistor

(ROI6T473JT

47KO)

[R23

R4]

21

o B V 9 2 0 8 6 5 6

040

AA N

C

Resistor (ROI6TS60JT

S60)

[R8]

22

o B V 9 2 0 8 6 5 6

246

AA

N

C

Resistor (ROI6TS62JT S.6KO)

[RIl]

_23

o B V 9 2 0 8 6 5

644

2

AA

N

C

Resistor (ROI6TS64JT S60KO)

[R29]

24

o B V 9 2 0 8

682

148

AA

N

C

Resistor

(ROI6T82lJT

8200)

[R31]

25

o B V 9 2 0 8 6 8

224

1

AA

N

C

Resistor (ROI6TS22JT S.2KO)

[R24]

_,26

o B V 9 2 2 7 1 2 0

142

AC

N

C

Resistor

(RNPI4T20lJS

2000)

[R32]

27

o B V 9 2 5 0 3 4 7

046

AB

N

C

Resistor (RS08AB3A470J

470 1 W)

[R2S]

-2"8

O'B V 92

98020 1 74

AD

N

C

Variable

resistor (POSH3C201N

2000)

[VR!]

29

~_V9318310250

AC

N

C

Capacitor

(C04SXl

EI02K)

[C2,S]

-30

o B V 9 3 1 8 3 4 7 3 5 9

AC

N

C

Capacitor (C04SXIE473K)

[CI0]

31

o B V 9 3 4 9 0 1 0 1 6 1

AD

N

C

Capacitor (CE04WOJI0IMU)

[C9]

-----¥-

OBV9349022063

AC

C

Capacitor (CE04WOJ220MU)

[Cl]

33

OBV9349047064

AD

N

C

Capacitor (CE04WOJ470MU)

[C8]

c----

o B V 9 3 4 9 2

100

6 0

AC

C

Capacitor (CE04WICI00MU)

[C3]

34
35

o B V 9 3 4 9 5 0 1

061

AC

C

Capacitor (CE04WIHOI0MU)

[C6]

1---~6

o B V 9 3

495

1 0

960

AC

C

Capacitor (CE04WIHRI0MU) [C4,Cl

Cll]

37

o B V 9 9 0 5 2 1

005

1

AD

N C

Coil

(SSI00K)

[Ll

]

38

VHiUPC358C/

1 AG

B

IC

[lC!]

c--l-~

o B V 9 0 2 0 0 4 5 5 5 8

AD

N B Transistor

(2SClSIS-GR)

[Ql,Q2,QS]

t-----

f----

I

--I

[Q]

MZ

-1 P 16

Exterio

rs

NO.

I PARTS CODE

~~I~~

~f;fK

~~~~

---itc:cABB

1 0 0 6 A C Z A A M N 0 Cabinet

top

DESCRIPTION

2 G

CAB

B 1 0 0 8 A C Z B A C C Holder

. 3 G

CAB

B 1 0 0 8 A C Z C A L N 0 Cabinet

top

--

"4

C-F

TAT

1 0 0 1 A C Z A A K N 0

Lid

--

5 G F

TAT

i 0 0 9 A C Z A A

END

Lid

for oen chanlle

6 P C

UTI

0 0 1 A C Z A A 0 N 0

Paper

cut

---7CS F T Z 1 0

alA

C Z Z A H E

Paoer

shaft

unit

- 8 0 U N T M 1 0 5 1 A C Z Z B W E Printer mechanism unit

-9

JKNBT

1 0 0 5 A

C02

-+---7A·-;:G;--t-~N-+---;O;---+';K:'-'n-";obC"';-fo':':'r::::p::::a':'::pe:.:cr:'-;fe"-e'-:;d=----------------------I

10

n:fLoTl

0 0 2 A

CL

2

AB

N 0 Holder

_

-U--!-~

H L 0 Z 1 0 0 2 A C R 2 I

AA

B~-

_-"-N'--+-...,0;o.--+:H::,o"'ld"'e"-.r--,--;--

__________________________

-;

_~_

PG

IOW

1 0 0 1 A C Z Z I

-+--'0;o.--+:P""'a~pelrc.Jll;>"u""id"'e'_:_:_---------------------------l

13

P S P A B 1 0 0 3 A C Z Z A A C Collar for printer

_--I~h.pJE

T

El

0 0 5 A C Z Z A

A-+--=~::::~C~::::!~ln~s~ul~at~o~r~sh~e~e~t

~::::::::::::::::::::::::::::::::::::=-

___________________

__I

15'QCNW-I013ACZZ

AD

C Ground wire

16

0 U N T K 1 4 2 5 A C Z Z B F N E

CPU

PWB unit

-"17

0 U N T K 1 4 2 6 A C Z Z A L N E Switch

PWB

unit

_-:~

G

LEG

P 1

O_..9_~l-~Cc-C:--=Z;.cZ~-+-""'A'-'B=__+_-_:_;___+-C=__t_'Lo_=u:.-cb7'be~r;_'_f=oo'-'t_;_;_---

__________

---------------1

19

L A N G T 1 0 7 9 A C Z Z

AB

N C I Angle for cable

--i(j-h A N

GKJ.---oaiA-C:--=;Z--"ZI---+-7

A7H

:-+--:-

N

,-t--oco---+I-':-A""'ng"'ll:-=-e-;-fo=-'r-'s"'u-;=-Ia·~id:-e-r

---.---------------------1

21--l..!

C H S M 1 0 1 6 A C Z Z A M N C Bottom

chaSSIS

..

-.

22:

LCHS"MTo

1 7 A C Z Z A Q N

-=O:--E'St.:::.:a~nd=..:.:.:.-===--------·---

-

23

tQ

C N W-1 1 0 8 A C Z Z A L !

~Ncl---+---:C=---ECC"a:;-:-bl:=e-ofo-r-po-'w-e-r

-------------------------1

-24"10

C N

IN

=-flO9A

C Z Z

=t=--BD--r--~N-~~-=-_=:~C~__l-t_';:71/~F~C;a~b~le;;~~::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::-::::::::::::::::::::::::::::::::::::::::::::-::::::::::::::::=-_---1

"

2sTr·rS'F

T Z 1 0 0 1 A

tu

A C I - C

Paoer

holder

26

! N S F T Z 1 0 0 1 A C Z

BAG

C

Paoer

shaft

:,jJJXREST4O=-O''60 0 0 A A +

__

l-I~Co-~E-'ty.z=pe:...;-r~in~Il(~.4=mm::L)---.------------------

____

-I

_2_8~.l<..!I.!l_~_~.oF'..o_

6 0

tl

0 A A

,C

Screw (3 x 6)

29

X B P S 0 3 0 P

0~4'-~K~'E-0-~0'--+-7A-':A:--I---+--L-'C~-ES""cr"'e-'-'-w~(~3.:..:X-"41-;-K;--')-------------'------------------l

-30

X U B S

02

6 P 0 8 0 0 0 A A

'C

Screw

31

I X U B S 0 2 6

PlO

0 0 0 A A I C I Screw

--32

IX

B P S M 3 0 P

06

K S 0

--I-cA:":A~+-1

----+-~C--+-:ISO-=c::.:re::.:w'--"(:,-3cCC"x

6KSl

"

12-

[IQ]

MZ

-1 P 16

Exterio

rs

NO.

PARTS

C.ODE

PRICE

NEW

PART

DESCRIPTION

RANK MARK RANK

33

XBPSM30P08KOO

AA

C Screw

34

QC

NW-Ill

0 A C Z Z

AE

N

C

Connector (4pin)

35

QSW-PIOIOACZZ

AC

C

Push switch (Paper feed)

36

QSW

PIOIIACZZ

AD

C

Push switch (Pen Change,Reset)

37

LX

BZOO38FCZZ

AA

C Screw

38

P Z

ET

VIOl 0 AC

Z Z

AC

N

C

Insulator

6---

18

-13-

MZ800

[ll] MZ-IPI6

Main

PWB

Unit

NO.

PARTS CODE

PRICE

NEW

PART

DESCRIPTION

RANK MARK

RANK

1

QCNCMI009ACZD

AB

C Connector (4pin)

2

QCNCMIOl5ACZZ

AC

B

Co

nnector{~pinl.

3

QCNCM2414RC2F

AH

C

Connector (26pin)

4

QCNW

1012ACZZ

A L

C

Connector wire

5

QSOCZ6440ACZZ

AG

C

IC

socket (40pin)

6

RCRSZI006ACZZ

AD

C

X

TAL 6MHZ

7

RMPTC8332QCKB

AD

B Block resistor

(3.3Kox8

1/8W

+10%)

- 8

VCCCPUlHHlOOD

AA

C

Capacitor

(50WV 10pF)

-·9

VCEAAUlAWl07Q

AB

C Capacitor 10V 1001lF

6.5.pXlO)

10

VCEAAUlHW225Q

AB

C

Capacitor

50WV

2.211F)

11

VCKYPUIHB331K

AA

C Capacitor

50WV 330pF)

12

VCTYPUINXI04M

AB

C Capacitor

l2WV

O.lOllF)

13

VHDDSI588L2-l

AB

B Diode (DS1588L2)

14

VHEHZIIA///

1

AC

B Zener diode

(HZllA)

15

VHi

LBI257//

1

AM

B

IC

16

V

HiM

5 M 8 0 5 0 H 0 1

AZ

B

LSI

17

VHiM74LS244-1

AM

B

IC

(M74LS244P)

18

VHiSN75451B-l

AG

B

IC

(SN7545l

B)

--

19

VRD-ST2EYI03J

AA

C Resistor

(l/4W

10KO

±5%)

20

VRD

ST2EYI04J

AA

C Resistor

(1/4W

100KO

+5%1

21

VRD

ST2EY221J

AA

C Resistor

(1/4W

2200

±5%)

22

VRD-ST2EY332J

AA

C Resistor

(1/4W

3.3KO

+59102

.-

23

VRD-ST2EY561J

AA

C

Carbon resistor

(l/4W

5600

+5%)

24

VRD-ST2EY562J

AA

C Resistor

(l/4W

5.6KO

+5%)

25

VS2SA673-C/-l

AE

B Transistor

(2SA673-C)

26

VS2SB739-//-1

AD

B

Transistor

27

VS2SC458KS/-I

AC

B Transistor (2SC458KS)

28

VS2SD788

C/EC

AC

B

Transistor (2SD788 C/EC)

[2]

MZ-I

PI6

Packing Parts

c

NO.

PARTS CODE

PRICE

NEW

PART

DESCRIPTION

RANK

MARK RANK

1

TiN

S E 1 2 1 3 A C Z Z

AG

N D Instruction book

2

PC

US

SI 0 14

AC

Z Z

AL

N D Packing cushion A

3

PCUSS1015ACZZ

AH

N

D

Packing cushion B

4

SPAKA1559ACZZ

AH

N D Packinj;! accessories

5

SPAKCI560ACZZ

AH

N D Packing case

6

SSAKAOO06UCZZ

AA

D Poly bag

(50 x 60mm)

7

SSAKHOOl5HCZZ

AA

D Poly bag (180X280mm)

8

SSAKA0231QCZZ

AA

D

Poly bag

(80

x 220

30Ul

9

SSAKA20

1

OKCZZ

AA

D

Poly

baj;!

(240X300mm)

10

SSAKA5004CCZZ

AA

D Poly

baj;!

(lOO X

300mm)

11

T

LAB

S 0 9 1 8 F C Z Z

AA

D F mark label

12

TLABZI027ACZA

AB

N D

Pen

label

13

TLABJI083CCZZ

AA

C

Label (U.K. only) (Made

in

Japan)

--

c----

---

f----_

..

.-

~---

-~--

_.

--

_.

-

--~

---

--

•

..-

-14-

MZ800

[l2J

MZ-l

P16 Packing Parts

,3

,5

[l

MZ-l

E20

NO,

PARTS

CODE

PRICE

NEW

PART

DESCRIPTION

RANK

MARK

RANK

1

LANGT1080ACZZ

AK

N

C

PWB

angle

2

SPAKA1589ACZZ

AE

N

0

Packing

cushion

3

SPAKC1590ACZZ

AT

N

0

Packing

case

4

SSAKH3010CCZZ

AA

0

Poly

bag

(180

x 240nn)

5 T 5

ELF

1 0 0 2 A C Z Z

AA

0 label

6

XBPSD30P06KSO

AA

C

Screw

(3X6KS)

•

-15-

MZ800

•

Index

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

(C 1 QCNCM1038ACZZ

3-

8

AM

C

CCABBI006ACZA

10-

I

AM

N

0 QCNCM1056ACZZ

1-

29

AG

C

-CC

A B B I 0

(8

A C Z B

2-

I

AS

0 QCNCM2414RC2F

11-

3

AH

C

CCOVHI002ACZB

1-

I

AQ

0 QCNCW1008AC03

1-

15

AC

C

cTrATIOOIACZA

10-

4

AK

N 0 QCNCW1013ACZZ

3-

7

AC

C

CSFTZIOOIACZZ

10-

7

AH

E

QCNCW1270CC2J

3-

9

AE

C

---Tor--

I

DSOCN034 4

PAZ

Z

5-

13

AF

C

QCNW

1012ACZZ

11-

4

AL

C

QCNW

1013ACZZ

10-

15

AD

C

D U

"f'(T-~

I 4 0 9 A C

ZZ

1-

6

BS

B

QCNW

1049ACZZ

6-

4

AN

C

DUNT-1420ACZZ

1-

7

BM

N E QCNW-1065ACZZ

6-

3

BA

0

b U

NT~l42TA

C Z Z

1-

8

BM

N E QCNW-1076ACZZ

2-

5

BA

C

DUN-i'-=ITj

5

ACZZ

1-

9

BK

E

D

u-r:,ffG141zACU-

---:----

AX

0

1-

2

QCNW-1108ACZZ

10-

23

AL

N

C

QCNW-1109ACZZ

10-

24

BD

N

C

-D-U NTG1Tf-jAC-n

1-

3

AX

0 QCNW-I110ACZZ

10-

34

AE

N

C

OUN-fK

14

18ACZZ

1-

4

**

N

C

QCNW

1111ACZZ

1-

30

AK

C

b

UN-fKl-

4 I 9 A C Z Z

1-

5

BA

N

C

QCNW

1112ACZZ

1-

31

AG

C

-bUNTK142S-AC Z Z

10-

16

B F N E

QFS

COO02PAZZ

5-

11

AD

A

b-UNTK

14

2 6

AC

Z Z

10-

17

AL

N E QFSHAOO01PAZZ 5-

12

AA

C

DUNTMI051ACZZ

10-

8

BW

E QJAKCOO04PAZZ

5-

14

AD

C

--rG]-

QJAKC1013CCZZ

3-

10

AC

B

c;9~J;lJ!LQ~~_~~

10-

2

AC

C

GCABBI008ACZC

10-

3

AL

N 0

QSOCAOO03PAZZ

5-

54

A F

C

QSOCZ6418ACZZ

3-

11

AD

C

GCOVHlO

02

ACZZ

1-

10

AB

0 QSOCZ6428ACZZ

3-

12

AE

C

G

C-OV-HlOO§

A C Z B

1-

34

AN

0 QSOCZ6440ACZZ

3-

13

AG

C

GFTA'RIO

19ACZZ

I-

II

AB

0

IJ

11-

5

AG

C

df'TARI021ACZB

1-

35

AE

0

QSW-COO03PAZZ

5-

53

AK

B

GTTARI024ACZA

2-

2

AF

0 QSW-K1031ACZZ

1-

16

BH

C

GFTARI025ACZZ

1-

12

AC

0 QSW-P1009ACZZ

3-

14

A F

B

G nATTOoTIc Z A

10-

5

AE

N 0

QSW

P1010ACZZ

10-

35

AC

C

GLE.GGI020CCZZ

1-

25

AD

D

QSW

P1011ACZZ

10-

36

AD

C

GCE-GPIOOICCZZ

10-

18

AB

C

QSW-Z1032ACZZ

1-

32

AM

N

B

(H 1

QTANS1002ACZZ

1-

17

AD

C

H

BO-G

sffiTA

C Z

z-

-j-

24

AC

0 QTANS1003ACZZ

1-

18

AD

C

ifp

N L C I 0 0 4 A C Z B

1-

36

AE

0 [ R 1

( J 1

RC

FZ030CPAZZ

5-

25

AE

C

TKNBZI005AC02

10-

9

AG

N

0

RC

QZ0023PAZZ

5-

28

AD

C

(

L 1

RCRS

1007ACZZ

3-

15

AV

B

CANGK

1082

ACZ'Z

10-

20

AH

N

C

RCRSZ1006ACZZ

11-

6

AD

C

LANGTI077ACZZ

1-

27

AC

C

RH-iX0464PAZZ

5-

21

AF

B

LANGTI078ACZZ

1-

28

AC

C

RH-PX0075PAZZ

5-

52

AK

B

CANGTI079ACZZ

10-

19

AB

N

C

RMPTCB102QCKB

3-

16

AD

B

TANGTI080ACZZ

13-

I

AK

N

C

RMPTC8103QCKB

3-

17

AD

B

lBNOCOO08PAZZ

5-

4

AA

C

RMPTC8332QCKB

11-

7

AD

B

LBSHZ2029SCZZ

3-

I

AB

C

RR-XZOO08PAZZ

5-

29

AB

C

CCHSMIOIOACZZ

2-

3

AQ

C

RTPEK1006AC84

6-

18

BB

0

LCHSMIOl6ACZZ

10-

21

AM

N

C

RTRNZ0035PAZZ

5-

16

AE

N

B

LCHSMIOl7ACZZ

10-

22

AQ

N 0

RTRNZ0081PAZZ

5-

18

AH

C

LCHSMIOl8ACZZ

1-

13

AY

C

RTRNZ0110PAZZ

5-

17

AT

B

T,

-HT6

Z I 0 0 2 A

CL

2

10-

10

AB

N 0

RVR

B1450QCZZ

3-

18

AE

B

TH-LDZl- 0 0 2 A C R 2

lO-

II

AB

N 0

THLDZ"lO"05 A

czz-

~:

4

AD

C

2-

RVR-MO

0 89

PAZZ

5-

19

AC

B

( S 1

TX-BZ0038FCZZ

10-

37

AA

C

SPAKA1559ACZZ

12-

4

AH

N 0

(N 1

SPAKA1589ACZZ

13-

2

AE

N 0

NSFTZIOOIACZA

10-

25

AC

C

SPAKA1624ACZL

6-

13

AH

N

0

NSFTZIOOIACZB

10-

26

AG

C

SPAKA1624ACZR

6-

14

AH

N

0

(P

1

SPAKA1625ACZZ

6-

15

AM

N

0

PCOVSO

181

VAZZ

5-

I

AG

C

SPAKCI552ACZZ

6-

12

AQ

N 0

PCOVS0215PAZZ

5-

2

AF

C

SPAKCI556ACZZ

6-

11

AQ

N

0

PCUSSI002ACZZ

1-

14

AA

C

SPAKCI560ACZZ

12-

5

AH

N

0

--

~SUSS

I 0 14ACZZ

12-

2

AL

N 0

PCUSS1015ACZZ

12-

3

AH

N 0

SPAKCI590ACZZ

13-

3

AT

N 0

SSAKAOO06UCZZ

12-

6

AA

0

~_C

U T

-1

0 0 1 A C Z A

10-

6

AD

N 0

PGiOW1001ACZZ

10-

12

AB

0'

SSAKA0231QCZZ

6-

17

AA

0

IJ

12-

8

AA

0

PGUMS1266CCZZ

1-

26

AA

C

f-pRbARO

143

PAZZ

5-

46

A F

C

SSAKA2010KCZZ

12-

9

AA

0

SSAKA5004CCZZ

6-

9

AA

0

PROAR0144PAZZ

5-

47

AE

C

IJ

12-

10

AA

0

PSPAB1003ACZZ

10-

13

AA

C

SSAKHOOl3HCZZ

6-

10

AA

0

P'ZETE1005ACZZ

10-

14

AA

C

SSAKHOOl4HCZZ

6-

16

AB

0

PZETi0021PAZZ

5-

3

AE

C

SSAKHOOl5HCZZ

12-

7

AA

0

PZETV1010ACZZ

10-

38

AC

N

C

SSAKH3010CCZZ

13-

4

AA

0

(Q 1

[T]

QACCE3620QCZZ

6-

2

AL

0

TiNSEI213ACZZ

12-

I

AG

N D

-£':AC

C Z 3

f'2-1QC

NI

6-

1

AL

C

QCNCM1009ACZB

3-

2

AA

C

TiNSG1212ACZZ

6-

6

BE

N D

TiNSM1294ACZZ

6-

5

AC

N

0

QCNCM1009ACZO

Il-

l

AB

C

TLABE

1119ACZZ

6-

20

AC

0

QCNCM1009ACZi

3-

3

AC

C

TLABEl120ACZZ

6-

21

AC

0

QCNCM1009ACZL

3-

4

AC

C

TLABJ1083CCZZ

12-

13

AA

C

QCNCM1009ACZO

3-

5

AC

C

TLABS0918FCZZ

12-

11

AA

0

QCNCM1010ACZZ

3-

6

AF

C

QCNCMI015ACZZ

11-

2

AC

B

cJl-_ABS

112

8ACZZ

6-

22

AB

0

TLABZI009ACZC

6-

21

AA

D

--16--

MZ800

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

TLABZ1010ACZZ

6-

7

AD

0

V R

0-5 C 2E

F 1 8 0 J

5-

23

AA

C

TLABZ1027ACZA

12-

12

AB

N

0

VRO-SC2EF272J

5-

27

AA

C

TLABZ1102ACZZ

6-

8

AD

0

VRO-SC2EF332J

5-

51

AA

C

TLABZ1103ACZZ

6-

19

AA

0

VRO-ST2EYOOOJ

3-

63

AA

C

TSELF1002ACZZ

13-

5

AA

0

VRO-ST2EY100J

3-

64

AA

C

[ V ]

VRO-ST2EY 1 0 1 J

3-

65

AA

C

VCCCPU1HH1000

11-

8

AA

C

VRO-ST2EY102J

3-

66

AA

C

VCCCPU1HH101J

3-

35

AB

C

VRO-ST2EY

1 03 J

3-

67

AA

C

VCEAAA1AW227M

3-

20

AC

C

1/

11-

19

AA

C

VCEAAA1CW226Q

3-

37

AB

C

VRO-ST2EY104J

3-

68

AA

C

VCEAAU1AM228M

5-

30

AC

C

1/

11-

20

AA

C

VCEAAU1AW107Q

3-

19

AB

C

VRO-ST2EY122J

3-

69

AA

C

1/

11-

9

AB

C

VRO-ST2EY

18 2 J

3-

71

AA

C

VCEAAU1CW106Q

3-

36

AB

C

VRO

ST2EY183J

3-

72

AA

C

VCEAAU1EW475Q

3-

21

AB

C

VRO-ST2EY221J

3-

73

AA

C

VCEAAU1HW105Q

3-

38

AB

C

1/

11-

21

AA

C

VCEAAU1HW225Q

11-

10

AB

C

V R

D-S T 2E

Y 3 3 0 J

3-

74

AA

C

VCEAAU2GM105M

5-

31

AD

C

VRO

ST2EY331J

3-

75

AA

C

VCEAAU2GM476Y

5-

32

AH

C

VRO-ST2EY332J

3-

76

AA

C

VCKYPU1HB102K

3-

39

AA

C

1/

11-

22

AA

C

VCKYPU1HB331K

11-

11

AA

C

VRD-ST2EY472J

3-

77

AA

C

VCKYPU1HB682K

5-

33

AA

C

VRO-ST2EY473J

3-

78

AA

C

VCKYPU1NB204Z

5-

34

AB

C

VRO-ST2EY561J

3-

79

AA

C

VCKYPU3DB101K

5-

35

AB

C

1/

11-

23

AA

C

VCQYKU1HM102K

5-

36

AA

C

VRO-ST2EY562J

11-

24

AA

C

VCQYKU1HM333K

5-

37

AB

C

VRO

ST2EY683J

3-

80

AA

C

VCSATA1CE226M

3-

40

AB

C

VRO

ST3AF224J

5-

41

AA

C

VCSATA1CE336M

3-

41

AB

C

VRS

PT3AB1ROJ

5-

42

AA

C

VCTYPG1CD104Z

5-

38

AE

C

VRS-PT30B683J

5-

43

AA

C

VCTYPU1EX103M

3-

42

AB

C

VRW-KT30C100K

5-

44

AC

C

--

VCTYPU1EX223M

3-

22

AB

C

VSP0080P

608N

1-

19

AN

B

VCTYPU1EX333M

3-

23

AB

C

VS2SA673

C/

1

11-

25

AE

B

VCTYPU1EX473M

3-

24

AB

C

VS2SB739

//

1

11-

26

AD

B

VCTYPU1NX104M

3-

43

AB

C

VS2SC1213

01A

5-

45

AC

C

1/

11-

12

AB

C

VS2SC3150//-1

5-

49

AK

C

VHDDFC05R//-1

5-

39

AC

N B

VS2SC458K//-1

3-

34

AC

B

VHDDS1588L1-1

3-

44

AD

B

VS2SC458KS/-1

11-

27

AC

B

VHODS1588L2-1

9-

4

AB

B

VS2S0788-C/EC

11-

28

AC

B

1/

11-

13

AB

B

[ X ]

VHDESAC8204-2

5-

48

AN

B

XBBSC30P06000

1-

37

AA

C

VHORB156///

1

5-

20

AG

B

1/

2-

6

AA

C

VHD1S2076A/-1

5-

40

AB

B

1/

5-

6

AA

C

VHEHZ11A///-1

11-

14

AC

B

1/

10-

28

AA

C

VH

C04069B/-1

3-

45

AE

B

XBBSC30P10000

1-

20

AA

C

VH

065040-032

3-

25

BT

B XBBSM20P06000

5-

5

AA

C

VH

LB1257//-1

11-

15

AM

B

XBPSC30P06KSO

5-

10

AA

C

VH

LH0080A/-1

3-

26

AX

B XBPSC30P06KOO

5-

7

AA

C

VH

LH0081A/-1

3-

27

AW

B

XBPS030P04KOO

10-

29

AA

C

VH

LM386N//-1

3-

28

AH

B

XBPSD30P06KSO

13-

6

AA

C

VH

MB81416-12

3-

29

AZ

B

XBPS030P08000

5-

8

AA

C

VH

M5M8050H01

11-

16

AZ

B XBPS030P10KSO

2-

7

AB

C

VH

M74LSOO/-1

3-

46

AE

B XBPS040P08KSO

5-

9

AA

C

VH

M74LS02/-1

3-

47

AE

B XBPSM30P06KSO

1-

21

AA

C

VHiM74LS04/

1

3-

48

AE

B

1/

1-

33

AA

C

VHiM74LS08/-1

3-

49

AE

B

1/

10-

32

AA

C

VHiM74LS125-1

3-

50

AH

B XBPSM30P08KOO

1-

22

AA

C

VHiM74LS14/-1

3-

51

AM

B

1/

10-

33

AA

C

VHiM74LS145-1

3-

52

AH

B XNES030

24000

5-

15

AA

C

VHiM74LS244-1

11-

17

AM

B

XRESJ40-06000

10-

27

AA

C

VH

iM74LS245-1

3-

53

AM

B

XUBS026P08000

10-

30

AA

C

VHiM74LS257 1

3-

54

AQ

B

XUBS026P10000

10-

31

AA

C

VHiM74LS32/

1

3-

55

AF

B

XUPSD30P08000

2-

8

AA

C

VHiM74LS365 1

3-

56

AF

B

XUPS030P10000

1-

23

AA

C

VHiM74LS74/

1

3-

57

AG

B

[

0 ]

VHiM74LS86/-1

3-

58

AF

B

OBV0210680007

8-

1

AN

N

B

VHiNE556N//-1

3-

30

AH

B

OBV0211280006

8-

2

AH

N B

VHiSN74LS373N

3-

59

AL

B

OBV0222830001

8-

3

AW

N B

VHiSN7417N/

1

3-

60

AG

B

OBV0364180002

9-

1

AH

B

VHiSN75451B

1

11-

18

AG

B

OBV0365800008

9-

2

AF

N

B

VHiSN76489/-1

3-

61

AW

B

OBV0440800004

8-

4

AM

N

B

VHiUPC358C/-1

9-

38

AG

B

OBV0560690004

8-

5

AD

N

B

VHiUPD8255/-1

3-

31

AV

B

OBV0560800009

8-

6

AD

N

B

VHi27128/AC85

3-

32

BP

B

OBV0560950005

8-

7

AD

B

VHi4164

1 5 0 H

3-

62

AZ

B

OBV0630121009

8-

8

AA

N

C

VHi8253////

1

3-

33

BA

B

OBV0630220009

8-

9

AA

C

VRO

RU2EE101J

5-

50

AA

C

OBV0630600007

8-

10

AA

C

VRO

RU2EE151J

5-

26

AA

C

OBV0631960001

8-

11

AA

C

VRD

RU2EE152J

5-

22

AA

C

OBV0631982009

8-

12

AA

N

C

VRD

RV2EY152J

3-

70

AA

C

OBV0631992002

8-

13

AA

N

C

VRD-SC2EF151J

5-

24

AA

C

OBV0632060005

8-

14

AA

N

C

-17-

MZ800

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

PARTS

CODE

NO.

PRICE

NEW

PART

RANK

MARK

RANK

OBV0632070008

8-

15

AA

N

C

OBV9349010161

9-

31

AD

N

C

OBV0635110000

8-

16

AA

C

OBV9349022063

9-

32

AC

C

OBV0636973002

8-

17

AA

C

OBV9349047064

9-

33

AD

N

C

OBV0646310006

7-

12

AA

N

C

OBV9349210060

9-

34

AC

C

OBV0653380009

8-

19

AA

C

OBV9349501061

9-

35

AC

C

OBV0757170043

7-

1

AA

N D

OBV9349510960

9-

36

AC

C

OBV3801290009

8-

20

AC

C

OBV9710200254

8-

57

AA

N

C

OBV3801311007

8-

21

AD

C

OBV9710200313

8-

58

AA

C

OBV3801321000

8-

22

AC

C

OBV9710200416

8-

59

AA

C

OBV3801331003

8-

23

AC N

C

OBV9710200519

8-

60

AA

C

OBV3801341006

8-

24

AD

N

C

OBV9710260414

7-

6

AA

C

OBV500

1700005

8-

25

AA

C

OBV9711260417

7-

7

AA

C

OBV5624150003

8-

18

AF

C

OBV9712200412

8-

61

AA

C

OBV6221800005

8-

26

AC N

C

OBV9718200410

8-

62

AA

C

OBV6501180009

8-

27

AB

C

OBV9718260511

7-

8

AA

N

C

OBV6501361006

8-

28

AD

N

C

OBV9743551004

8-

63

AA

C

OBV6501372000

8-

29

AC N

C

OBV9760260811

8-

64

AA

C

OBV650

138000

1

8-

30

AB

C

OBV9760261018

7-

9

AA

N

C

OBV650

1390004

8-

31

AB

C

OBV9799024006

8-

65

AA

N

C

OBV6501401009

8-

32

AB

N

C

OBV9811015142

8-

66

AA

C

OBV6501413004

8-

33

AB

N

C

OBV9811025145

8-

67

AA

C

OBV6501461007

8-

36

AG

C

OBV9811030143

8-

68

AA

C

OBV6501471000

8-

34

AE

C

OBV9862020115

8-

69

AA

N

C

OBV6501480002

8-

35

AF

C

OBV9870003003

8-

70

AA

C

OBV6501832003

8-

37

AC

C

OBV9870012005

8-

7l

AA

N

C

OBV6501841005

8-

38

AC

N

C

OBV9874002004

8-

72

AA

C

OBV6502030006

8-

39

AB

C

OBV9874026004

8-

73

AA

C

OBV6502251005

8-

40

AD

N

C

OBV9905210051

9-

37

AD

N

C

OBV6502300505

8-

41

AK

N

C

OBV6502584000

8-

42

AF

N

C

OBV6502595004

8-

43

AF

N

C

OBV6502620009

8-

44

AB

C

OBV6502660001

8-

45

AB

C

~BV6502752001

8-

46

AG N

C

OBV6502920002

8-

47

AF

N

C

OBV6502930005

8-

48

A F

N

C

OBV6502940008

8-

49

AA

N

C

·OBV6611820002

7-

2 AC

N

C

OBV6628620024

8-

50

AD N

C

OBV6661050008

8-

51

AG

N

C

OBV6661410000

8-

52

AB N

C

~BV6674000003

8-

53

AA

N

C

OBV66800 1 0005

7-

10

BG

N E

OBV6680400017

7-

11

BP

N E

OBV6681000005

8-

54

AS

N

C

OBV6681200007

8-

55

AE N

C

OBV6682700005

8-

56

AG N

C

OBV6685400001

7-

13

AG

N

C

OBV6688000017

7-

3

AT

N D

OBV6688040019

7-

4

AL

N

D

OBV6688220015

7-

5 AC

N D

OBV9020045558

9-

39

AD

N

B

OBV9020046250

9-

3

AF

N B

OBV9110340008

9-

5

AK

N B

OBV9205118149

9-

6

AA

N

C

OBV9208610248

9-

7

AA

N

C

OBV9208610341

9-

8

AA

N

C

11

9-

8

AA

N

C

OBV9208615140

9-

9

AA

N

C

OBV9208615346

9-

10

AA

N

C

OBV9208615449

9-

11

AA

N

C

OBV9208620540

9-

12

AA

N

C.

OBV9208622243

9-

13

AA

N

C

OBV9208622346

9-

14

AA

N

C

OBV9208622449

9-

IS

AA

N

C

OBV9208627145

9-

16

AA

N

C

~~V9208633144

9-

17

AA

N

C

OBV9208647048

9-

18

AA

N

C

OBV9208647141

9-

19

AA

N

C

08'.'9208647347

9-

20

AA N

C

OBV9208656040

9-

21

AA

N

C

OBV9208656246

9-

22

AA

N

C

OBV9208656442

9-

23

AA

N

C

OBV9208682148

9-

24

AA

N

C

OBV9208682241

9-

25

AA

N

C

OBV9227120142

9-

·26

AC

N

C

OBV9250347046

9-

27

AB N C

OBV9298020

174

9-

28

AD N

C

OBV9318310250

9-

29

AC N C

OBV9318347359

9-

30

AC

N

C

-l~-

MZ

-800

------------------------------

11-

2BB03~

71931-1

203

-

4

05

250887

Sl MMl800

17

20007000

•

1

R

SHARP COR

ndustrial

I .

Reliability

Yamatokoriyama, Printed

October

PORATION

Instrument Group

& OJaIity

. Nara , _

, 1984

Control

639-"

Dept.

."pan

in

Japan ®