Sharp LH532048U, LH532048N Datasheet
LH532048
CMOS 2 M (12 8K × 16) MROM
FEATURES
•• 131,072 w ords × 16 bit orga niza ti on
•• Access time: 100 ns (MAX.)
•• Static operation
•• TTL compatib le I/O
•• Three-state outputs
•• Singl e +5 V po we r su ppl y
•• Powe r consu mption :
Operating : 412.5 mW (MAX.)
Standby: 550 µW (MAX.)
•• Packages:
40-pi n , 600 - mil D IP
40-pi n , 525 - mil S OP
44-pi n , 650 -mi l Q FJ (PLC C)
DESCRIPTION
The LH532048 is a 2M-bit mask-programmable ROM
organized as 131,072 × 16 bits. It is fabricated using
silicon-gate CMOS process technology.
PIN CONNECTIONS
532048-1
TOP VIEW
2
3
4
5
8
9
D
10
D
13
37
36
35
34
33
32
29
26
D
15
D
14
6
7
D
11
D
12
31
30
A
14
A
12
A
10
A
8
A
5
10
11
12
39
38
13
28
A
7
27
A
6
GND
A
13
40-PIN DIP
40-PIN SOP
14
15
16
17
18
19
20
23
25
24
22
21
A
0
D
1
D
0
D
2
D
4
D
3
D
5
OE
A
11
A
4
40
1
CE
NC
V
CC
GND
D
6
D
9
NC
A
16
A
15
A
3
A
2
A
1
D
7
D
8
A
9
Figure 1. Pin Connections fo r DIP and
SOP Packages
532048-2
TOP VIEW
8
9
10
11
14
15
D
7
D
8
36
35
34
33
32
31
D
10
D
9
12
13
NC
GND
30
29
A
10
A
9
NC
A
7
16
17
38
37
A
11
D
6
D
5
GND
44-PIN PLCC
A
12
A
8
A
6
39
7
D
11
D
12
A
13
18 19 20 21 22 23 24 25 26 27 28
D
3
OE
NC
6 5 4 3 2 1 44 43 42 41 40
D
13
CENCNC
D
4
D2D1D
0
A0A1A2A3A
4
A
5
D14D
15
VCCNC
A16A15A
14
Figure 2. Pin Connections fo r QFJ
(PLCC) Package
1
532048-3
A
3
A
2
A
12
A
11
A
10
A
9
A
8
34
33
32
31
27
24
23
A
7
A
6
A
4
MEMORY
MATRIX
(131,072 x 16)
SENSE AMPLIFIER
28
25
29
A
5
26
A
13
35
ADDRESS BUFFER
CE
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
14
36
A
15
37
2
TIMING
GENERATOR
A
16
38
OUTPUT BUFFER
D
3
D
2
D
1
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
4
D
5
D
13
D
0
D
14
D
15
7
8
9
10
14
17
18
19
16
12
15
6
5
4
3
13
V
CC
40
GND
11 30
A
1
22
A
0
21
20
OE
NOTE: Pin numbers apply to the 40-pin DIP or SOP.
Figure 3. LH532048 Block Diagram
PIN DESCRIPTION
SIGNAL PI N N AM E
A0 – A
16
Addres s i npu t
D
0
– D
15
Data o utp ut
CE Chip e nab le inp ut
OE Output en abl e i npu t
SIGNAL PIN NAME
V
CC
Power sup ply (+5 V)
GND Ground
NC No con nec tio n
LH532048 CMOS 2M MROM
2
532048-4
A
3
A
2
A
12
A
11
A
10
A
9
A
8
38
37
36
35
30
27
26
A
7
A
6
A
4
MEMORY
MATRIX
(131,072 x 16)
SENSE AMPLIFIER
31
28
32
A
5
29
A
13
39
ADDRESS BUFFER
CE
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
14
40
A
15
41
3
TIMING
GENERATOR
A
16
42
OUTPUT BUFFER
D
3
D
2
D
1
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
4
D
5
D
13
D
0
D
14
D
15
8
9
10
11
16
19
20
21
18
14
17
7
6
5
4
15
V
CC
44
GND
12 34
A
1
25
A
0
24
22
OE
NOTE: Pin numbers apply to the 44-pin QFJ.
Figure 4. LH532048 Block Diagram
CMOS 2M MROM LH532048
3
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