SHARP JE600D3LB44 Specification
JE600D3LB44
RECORDS OF REVISION
SPEC No. DATE
No. PAGE
LD-K24802
2012.08.06 - - - 1st ISSUE
2013.01.28 A 2 Symbol of input terminal is chenged 2nd ISSUE
REVISED
SUMMARY NOTE
8 Symbol of Backlight terminal is chenged
8 [Operation condition]commnent is changed
9 [Note3]commnent is changed
12 Item of LED driving for backlight is changed
12 [Note2]commnent is changed
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LD-K24802A-1
r
1. Application
This specification applies to the color 60.0” TFT-LCD module JE600D3LB44.
* These specifications are proprietary products of SHARP CORPORATION (“SHARP”) and include materials
protected under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or
by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written
permission of SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extre me level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these specification.
* Contact and consult with a SHARP sales representative for any questions about this device.
2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT (T
is composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit and back light system etc.
Graphics and texts can be displayed on a 1920×RGB×1080 dots panel with one billion colors by using LVDS (L
oltage Differential Signaling) to interface, +12V of DC supply voltages.
V
And in order to improve the response time of LCD, this module applies the Over Shoot driving (O/S driving)
technology for the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a di fference is found between image
signal of the previous frame and that of the current frame after comparing them.
With this technology, image signals can be set so that liquid crystal response completes within one frame. As a
result, motion blur reduces and clearer display performance can be realized.
This LCD module also adopts 120Hz Frame Rate driving method.
With combination of these technologies, motion blur can be reduced and clearer display performance can be
realized.
hin Film Transistor). It
ow
3. Mechanical Specifications
Paramete
Display size
Active area 1329.12 (H) x 747.63 (V) mm
Pixel Format
Pixel pitch 0.69225 (H) x 0.69225 (V) mm
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Unit Outline Dimensions (*1) 1360.1(W) x 781.6(H) x 21.4 (D) mm
Mass 17.1 kg
Surface treatment
(*1) Outline dimensions are shown in Fig.1 (excluding protruding portion)
152.496 (Diagonal) cm
60.0 (Diagonal) inch
1920 (H) x 1080 (V)
(1pixel = R + G + B dot)
Low-Haze Anti glare
Hard coating: 2H and more
Specifications Unit
pixel
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LD-K24802A-2
4. Input Terminals
4.1. TFT panel driving
CN1 (Interface signals and +12V DC power supply)
Using connector : 91213-0510Y (ACES)
Mating connector : 91214-05130 (ACES), FI-RE51/FI-RE51CL (JAE)
Mating LVDS transmitter : THC63LVD1023 or equivalent device
Pin No. Symbol Function Remark
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
GND
Reserved It is required to set non-connection(OPEN) [Note 1]
Reserved It is required to set non-connection(OPEN) [Note 1]
Reserved It is required to set non-connection(OPEN)
Reserved
Reserved It is required to set non-connection(OPEN)
SEL LVDS ▲A
Reserved
Reserved
Reserved
GND
AIN0- Aport (-)LVDS CH0 differential data input
AIN0+ Aport (+)LVDS CH0 differential data input
AIN1- Aport (-)LVDS CH1 differential data input
AIN1+ Aport (+)LVDS CH1 differential data input
AIN2- Aport (-)LVDS CH2 differential data input
AIN2+ Aport (+)LVDS CH2 differential data input
GND
ACK- Aport LVDS Clock signal(-)
ACK+ Aport LVDS Clock signal(+)
GND
AIN3- Aport (-)LVDS CH3 differential data input
AIN3+ Aport (+)LVDS CH3 differential data input
AIN4- Aport (-)LVDS CH4 differential data input
AIN4+ Aport (+)LVDS CH4 differential data input
GND
GND
BIN0- Bport (-)LVDS CH0 differential data input
BIN0+ Bport (+)LVDS CH0 differential data input
BIN1- Bport (-)LVDS CH1 differential data input
BIN1+ Bport (+)LVDS CH1 differential data input
BIN2- Bport (-)LVDS CH2 differential data input
BIN2+ Bport (+)LVDS CH2 differential data input
GND
BCK- Bport LVDS Clock signal(-)
BCK+ Bport LVDS Clock signal(+)
GND
BIN3- Bport (-)LVDS CH3 differential data input
BIN3+ Bport (+)LVDS CH3 differential data input
BIN4- Bport (-)LVDS CH4 differential data input
BIN4+ Bport (+)LVDS CH4 differential data input
GND
GND
GND
GND
GND
VCC +12V Power Supply
It is required to set non-connection(OPEN) [Note 2]
Select LVDS data order [Note 2] [Note 3]
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
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Pull up 3.3V
Pull up 3.3V
Pull down: (GND)
Pull down: (GND)
48
49
50
51
VCC +12V Power Supply
VCC +12V Power Supply
VCC +12V Power Supply
VCC +12V Power Supply
CN2 (Interface signals)
Using connector : 91213-0410Y (ACES)
Mating connector : 91214-04130 (ACES), FI-RE41HL/FI-RE41C (JAE)
Pin No. Symbol Function Remark
1
2
3
4
5
6 Reserved
7 Reserved
8 Reserved
9 GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Reserved (VCC) (+12V Power Supply)
Reserved (VCC) (+12V Power Supply)
Reserved (VCC) (+12V Power Supply)
Reserved Non-Connection(OPEN)
Reserved Non-Connection(OPEN)
Non-Connection(OPEN)
Non-Connection(OPEN)
Non-Connection(OPEN)
CIN0- Cport (-)LVDS CH0 differential data input
CIN0+ Cport (+)LVDS CH0 differential data input
CIN1- Cport (-)LVDS CH1 differential data input
CIN1+ Cport (+)LVDS CH1 differential data input
CIN2- Cport (-)LVDS CH2 differential data input
CIN2+ Cport (+)LVDS CH2 differential data input
GND
CCK- Cport LVDS Clock signal(-)
CCK+ Cport LVDS Clock signal(+)
GND
CIN3- Cport (-)LVDS CH3 differential data input
CIN3+ Cport (+)LVDS CH3 differential data input
CIN4- Cport (-)LVDS CH4 differential data input
CIN4+ Cport (+)LVDS CH4 differential data input
GND
GND
DIN0- Dport (-)LVDS CH0 differential data input
DIN0+ Dport (+)LVDS CH0 differential data input
DIN1- Dport (-)LVDS CH1 differential data input
DIN1+ Dport (+)LVDS CH1 differential data input
DIN2- Dport (-)LVDS CH2 differential data input
DIN2+ Dport (+)LVDS CH2 differential data input
GND
DCK- Dport LVDS Clock signal(-)
DCK+ Dport LVDS Clock signal(+)
GND
DIN3- Dport (-)LVDS CH3 differential data input
DIN3+ Dport (+)LVDS CH3 differential data input
DIN4- Dport (-)LVDS CH4 differential data input
DIN4+ Dport (+)LVDS CH4 differential data input
GND
GND
[Note] GND of a liquid crystal panel drive part has connected with a module chassis.
LD-K24802A-3
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[Note 1] The equivalent circuit figure of the terminal
3.3V
1KΩ
Te rm in al
100Ω
[Note 2] The equivalent circuit figure of the terminal
Te rm in al
LD-K24802A-4
100Ω
[Note 3] LVDS Data order
SELLVDS
Data L(GND) or OPEN
[VESA]
TA0
TA1
TA2
TA3
TA4
TA5
TA6
TB0
TB1
TB2
TB3
TB4
TB5
TB6
TC0
TC1
TC2
TC3
R0(LSB)
R1
R2
R3
R4
R5
G0(LSB)
G1
G2
G3
G4
G5
B0(LSB)
B1
B2
B3
B4
B5
TC4 NA NA
TC5 NA NA
TC6 DE(*) DE(*)
TD0
TD1
TD2
TD3
TD4
TD5
TD6
TE0
R6
R7
G6
G7
B6
B7
N/A
R8
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10KΩ
H(3.3V)
[JEIDA]
R4
R5
R6
R7
R8
R9(MSB)
G4
G5
G6
G7
G8
G9(MSB)
B4
B5
B6
B7
B8
B9(MSB)
R2
R3
G2
G3
B2
B3
N/A
R0(LSB)
LD-K24802A-5
TE1
TE2
TE3
TE4
TE5
TE6
NA: Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable) signal, please do not fix DE
signal during operation at ”High”.
R9(MSB)
G8
G9(MSB)
B8
B9(MSB)
N/A
R1
G0(LSB)
G1
B0(LSB)
B1
N/A
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–
,
–
–
,
–
SELLVDS= Low (GND) or OPEN
ACK+,BCK+
CCK+,DCK+
ACK– ,BCK–
CCK– ,DCK–
AIN0+,BIN0+
CIN0+,DIN0+
AIN0
–,BIN0–
CIN0–,DIN0–
AIN1+,BIN1+
CIN1+,DIN1+
AIN1–,BIN1–
CIN1–,DIN1–
R1
AIN2+,BIN2+
CIN2+,DIN2+
–,BIN2–
AIN2
CIN2–,DIN2–
AIN3+,BIN3+
CIN3+,DIN3+
AIN3
–,BIN3–
CIN3–,DIN3–
AIN4+,BIN4+
CIN4+,DIN4+
AIN4–,BIN4–
CIN4
DIN4
SELLVDS= High (3.3V)
ACK+,BCK+
CCK+,DCK+
ACK– ,BCK–
CCK– ,DCK–
AIN0+,BIN0+
CIN0+,DIN0+
AIN0
CIN0–,DIN0–
AIN1+,BIN1+
CIN1+,DIN1+
AIN1–,BIN1–
CIN1–,DIN1–
AIN2+,BIN2+
CIN2+,DIN2+
AIN2–,BIN2–
CIN2–,DIN2–
AIN3+,BIN3+
CIN3+,DIN3+
AIN3–,BIN3–
CIN3–,DIN3–
AIN4+,BIN4+
CIN4+,DIN4+
AIN4
CIN4
–,BIN0–
–,BIN4–
DIN4
DE: Display Enable, NA: Not Available (Fixed Low)
LD-K24802A-6
1 cycle
G0 R5 R4 R3 R2 R1 R0 R0
B1 B0 G5 G4 G3 G2 G1 G1 G2 B1
DE
NA NA
B7 B6 G7 G6 R7 R6 R6 R7 NA NA
B9 B8 G9 G8 R9 R8 R8 R9 NA NA
B5 B4 B3 B2 B6 B3
G0
DE
1 cycle
G4 R9 R8 R7 R6 R5 R4 R4 R5 G4
B5 B4 G9 G8 G7 G6 G5 G5 G6 B5
DE
NA NA
B3 B2 G3 G2 R3 R2 R2 R3 NA NA
B1 B0 G1 G0 R1 R0 R0 R1 NA NA
B9 B8 B7 B6 B6 B7
DE
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