The TS4900 is an audio power amplifier designed
to provide the best pri ce to power ratio while preserving high audio quality.
Available in MiniSO8 & SO8 package, it is capable
of delivering up to 0.7W of continuous RMS ouput
power into an 8
TS4900 is also exhibiting an outstanding 0.1%
distortion level (THD) from a 5V supply for a Pout
of 200mW RMS.
Ω load @ 5V.
PIN CONNECTIONS (top view)
TS4900IST - MiniSO8
Standby
Bypass
V+
Standby
Bypass
V+
VIN-
1
2
3
IN
4
VIN-
TS4900ID-TS4900IDT - SO8
1
2
3
IN
4
8
V2OUT
7
GND
6
CC
V
5
VOUT1
8
V2OUT
7
GND
6
CC
V
5
VOUT1
An externally controlle d standby m ode control reduces the supply current to less than 10nA. It also
includes an internal thermal shutdown protection.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
APPLICATIONS
■Mobile Phones (Cellular / Cordless)
■PDAs
■Portable Audio Devices
ORDER CODE
Part Number
TS4900IS
TS4900ID
S = MiniSO Package (MiniSO) only available in Tape & Reel (ST)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
Temperature
Range
-40, +85°C
January 2002
Package
SD
•
•
TYPICAL APPLICATION SCHEMATIC
1/19
TS4900
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
T
T
R
Supply voltage
CC
V
Input Voltage
i
Operating Free Air Temperature Range-40 to + 85°C
oper
Storage Temperature-65 to +150°C
stg
T
Maximum Junction Temperature150°C
j
Thermal Resistance Junction to Ambient
thja
SO8
MiniSO8
PdPower Dissipation
ESDHuman Body Model2kV
ESDMachine Model200V
Latch-up Latch-up ImmunityClass A
Lead Temperature (soldering, 10sec )250°C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed V
3. Device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period, will cause abnormal operation.
OPERATING CONDITIONS
1)
2)
3)
6V
GND to V
CC
175
215
4)
+ 0.3V / GND - 0.3V
CC
Internally Limited
V
°C/W
SymbolParameterValueUnit
V
V
Supply Voltage2.5 to 5.5V
CC
to VCC - 1.5V
Common Mode Input Voltage Range
ICM
G
ND
Standby Voltage Input :
≤ V
V
STB
Device ON
Device OFF
R
Load Resistor4 - 32
L
R
Thermal Resistance Junction to Ambient
thja
1)
SO8
MiniSO8
1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)
G
V
- 0.5V ≤ V
CC
ND
STB
150
190
≤ 0.5V
≤ V
STB
CC
V
V
Ω
°C/W
2/19
TS4900
ELECTRICAL CHARACTERISTICS
= +5V, GND = 0V , T
V
CC
SymbolParameterMin.Typ.Max.Unit
= 25°C (unless otherwise specified)
amb
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode i s actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
= +3.3V, GND = 0V, T
V
CC
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
= 8
Ω
L
amb
Ω
Ω
Ω
Ω
2)
RFeed = 22K
Ω,
Vripple = 200mV rms
Ω,
= 25°C (unless otherwise specified)3)
68mA
101000nA
520mV
0.7W
0.15%
75dB
70Degrees
20dB
2MHz
SymbolParameterMin.Typ.Max.Unit
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode i s actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
3. All electrical values are made by correlation between 2.6V and 5V measurement s
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
= 8
Ω
L
Ω
2)
RFeed = 22K
Ω,
Ω
Ω
Vripple = 200mV rms
Ω,
5.58mA
101000nA
520mV
300mW
Ω
0.15%
75dB
70Degrees
20dB
2MHz
3/19
TS4900
ELECTRICAL CHARACTERISTICS
V
= 2.6V, GND = 0V, T
CC
SymbolParameterMin.Typ.Max.Unit
= 25°C (unless otherwise specified)
amb
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode i s actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
= 8
Ω
L
Ω
2)
RFeed = 22K
Ω,
Ω
Ω
Vripple = 200mV rms
Ω,
5.58mA
101000nA
520mV
180mW
Ω
0.15%
75dB
70Degrees
20dB
2MHz
ComponentsFunctional Description
Rin
Cin
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
RfeedFeed back resistor which sets the closed loop gain in conjunction with Rin
CsSupply Bypass capacitor which provides power supply filtering
CbBypass pin capacitor which provides half supply filtering
Cfeed
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
RstbPull-up resistor which fixes the right supply level on the standby pin
GvClosed loop gain in BTL configuration = 2 x (Rfeed / Rin)
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
Fig. 44 : Signal to Noise Ratio vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
100
90
RL=4
RL=8
RL=16
80
70
SNR (dB)
60
50
2.53.03.54.04.55.0
Ω
Ω
Vcc (V)
Ω
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
Fig. 46 : Signal to Noise Ratio vs Power Supply
with Weig h t e d Filt e r t y p e A
110
100
RL=4
RL=8
RL=16
90
Ω
Ω
Ω
Fig. 45 : Signa l to Nois e Ratio Vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
Fig. 47 : Signal to Noise Ratio vs Power Supply
with Weighted Filter Type A
80
SNR (dB)
70
60
2.53.03.54.04.55.0
Fig. 48 : Current C onsumpt i on vs Powe r
Supply Voltage
7
Vstandby = 0V
Tamb = 25°C
6
5
4
3
Icc (mA)
2
1
0
012345
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
Vcc (V)
Fig. 49 : C urrent Consumpt ion vs Standby
Voltage @ Vcc = 5V
Vcc (V)
13/19
TS4900
0.00.51.01.52.02.5
0
1
2
3
4
5
6
Vcc = 2.6V
Tamb = 25°C
Icc (mA)
Vstandby (V)
Fig. 50 : C urrent Consumpt ion vs Standby
Voltage @ Vcc = 3.3V
6
5
4
3
Icc (mA)
2
1
0
0.00.51.01.52.02.53.0
Vstandby (V)
Vcc = 3.3V
Tamb = 25°C
Fig. 51 : C urrent Consumpt ion vs Standby
Voltage @ Vcc = 2.6V
14/19
TS4900
)W(
R
)Vout2(
Pout
L
2
RMS
=
■BTL Configuration Principle
The TS4900 is a monolithic power amplifier with a
BTL (Bridge Tied Load) output configuration. BTL
means that each end of the load is connected t o
two single ended output amplifiers. Thus, we have:
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
And Vout1 - Vout2 = 2Vout (V)
The output power is :
For the same power supply voltage, the output
power in BTL configuration is four times higher
than the output power in single ended
configuration.
■Gain In Typical Application Schematic
(cf. page 1)
In flat region (no effect of Cin), the output voltage
of the first stage is :
Vout1 = Vin –
For the second stage : Vout2 = -Vout1 (V)
The differential output voltage is
Vout2
V o ut 1 = 2Vin –
Rfeed
------------------- - (V)
Rin
Rfeed
------------------- - (V)
Rin
bandwidth by adding a capacitor (Cfeed) in
parallel with Rfeed. Its form a low pass filter with a
• Supply voltage is a pure DC source (Vcc)
Regarding the load we have:
V
OUT = V
and
I
OUT =
and
P
OUT =
Then, the average current delivered by the supply
voltage is:
CC
AVG
= 2
I
The power delivered by the supply voltage is
Psupply = Vcc Icc
AVG
(W)
sinωt (V)
PEAK
V
OUT
---------------- - (A)
R
L
2
PEAK
V
---------------------- (W)
L
2R
PEAK
V
-------------------- (A)
L
πR
The differential gain named gain (Gv) for more
convenient usage is :
Vout2Vout1–
Gv =
--------------------------------------- = 2
Vin
Rfeed
------------------- Rin
Remark : Vout2 is in phase with Vin and Vout1 is
180 phased with Vin. It means that the positive
terminal of the loudspeaker should be connected
to Vout2 and the negative to Vout1.
■Low and high frequency response
In low frequency region, the effect of Cin starts.
Cin with Rin forms a high pass filter with a -3dB cut
off frequency
CL =
F
In high frequency region, you can limit the
1
------------------------------- - Hz()
2π Rin Cin
Then, the po wer dissip ated by the amplifier is
Pdiss = Psupply - Pout (W)
P
22Vcc
diss =
---------------------- P OUTPOUT (W)–
πR
L
and the maximum value is obtained when:
∂Pdiss
--------------------- - = 0
OUT
∂P
and its value is:
2
Vcc2
=
maxPdiss
2
π
R
)W(
L
Remark : This maximum valu e is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
15/19
TS4900
power and the power supply
η =
P
OUT
----------------------- - =
Psupply
πV
PEAK
----------------------4VCC
The maximum theoret ical value is reached when
Vpeak = Vcc, so
π
----- = 78.5%
4
■Decoupl i ng of the ci rc u it
Two capacitors are needed to bypass properly the
TS4900, a power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increases, THD+N and disturbances on the power
supply rail are less filtered .
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N in lower frequency,
but its function is critical on the final result of PSRR
with input grounded in lower frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the ben efit on PSRR
is substantial (see PSRR vs. Cb curve : fig.12).
Moreover, Cb determines the speed that the
amplifier turns ON. The slower th e speed is, the
softer the turn ON noise is.
The charge time of Cb is directly proportional to
the internal generator resistance 50kΩ.
Then, the charge time constant for Cb is
τb = 50kΩxCb (s)
As Cb is directly connected to the non-inverting
input (pin 2 & 3) and if we want to minimize, in
amplitude and duration, the output spike on Vout1
(pin 5), Cin must be charged faster than Cb. T he
charge time constant of Cin is
τin = (Rin+Rfeed)xCin (s)
Thus we have the relation
τin << τb (s)
The respect of this relation permits to minimize the
pop and click noise.
Remark
: Minimize Cin and Cb has a benefit on
pop and click phenomena but also on cost and
size of the application.
Example
: your target for the -3dB cut off
frequency is 100 Hz. With Rin=Rfeed=22 kΩ,
Cin=72nF (in fact 82nF or 100nF).
With Cb=1µF, if you choose the one of the latest
two values of Cin, the pop and click phenomena at
power supply ON or standby function ON/OFF will
be very small
50 kΩx1µF >> 44kΩx100nF (50ms >> 4.4ms).
Increasing Cin value increas es the pop and click
phenomena to an unpleasant sound at power
supply ON and standby function ON/OFF .
Why Cs is not important in pop and click
consideration ?
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13 ).
■Pop and Click performanc e
Pop and Click performance is intimately linked
with the size of the input capacitor Cin and the bias
voltage bypass capacitor Cb.
Size of Cin is du e to the lower cut-off frequency
and PSRR value requested. Size of Cb is due to
THD+N and PSRR requested always in lower
frequency.
16/19
Hypothesis :
• Cs = 100µF
• Supply voltage = 5V
• Supply voltage internal resistor = 0.1Ω
• Supply current of the amplifier Icc = 6mA
At power ON of the supply, the supply capacitor is
charged through the internal power supply
resistor. So, to reach 5V you need about five to ten
times the charging time constant of Cs (τs =
0.1xCs (s)).
Then, this time equal 50µs to 100µs << τb in the
majority of application.
TS4900
At power OFF of the supply, Cs is discharged by a
constant current Icc. The di scharge time from 5V
to 0V of Cs is
tDischCs =
5Cs
------------- - = 83 ms
Icc
Now, we must consider the discharge time of Cb.
At power OFF or standby ON, Cb is discharged by
a 100kΩ resistor. So the discharge time i s about
τb
≈ 3xCbx100kΩ (s).
Disch
In the majority of application, Cb=1µF, then
τb
≈300ms >> t
Disch
dischCs
.
■ How to use the PSRR curves (page 7)
We have finished a design and we have ch osen
the components values :
• Rin=Rfeed=22kΩ, Cin=100nF, Cb=1µF
Now, on fig. 13, we can see the PSRR (input
grounded) vs frequency curves. At 217Hz we have
a PSRR value of -36dB.
In fact, we want a value of abou t -70dB. So, we
need a gain of +34dB !
Now, on fig. 12 we can see the effect of Cb on the
PSRR (input grounded) vs. frequency. With
Cb=100µF, we can reach the -70dB value.
The process to obtain the final curve (Cb=100µF,
Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer
point by point on each frequency of the curve on
fig. 13 to the curve on fig. 12.
The measurement result is shown on figure A.
Fig. A : PSRR changes with Cb
■Rem ark on PSRR m easu remen t cond itions
What is the PSRR ?
The PSRR is the Power Suppl y Rejection Ratio.
It's a kind of SVR in a determined frequency range.
The PSRR of a device is the ratio between the
power supply disturbance and the result on the
output. We can say that the P SRR is t he a bility of
a device to m inimize the impact o f power supply
disturbances to the output.
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