SGS Thomson Microelectronics ST70134 Datasheet
ST70134 - ST70135A
ASCOT ADSL MODEM CHIP SET FOR CPE
PRODUCT PREVIEW
■ COMPLETE CHIP SET FOR ADSL CPE
MODEM
■ COMPLIANCE WITH ANSI T1.413 ISSUE
1 & ISSUE 2
■ COMPLIANCE WITH G.992.1 (FULL RATE)
& G.992.2 (G. LITE)
■ IMPLEMENTS DISCRETE MULTITONE
(DMT) MODULATION AND DEMODULATION ON CPE SIDE
■ DATA RATES UP TO8Mbps DOWNSTREAM
AND TO 1Mbps UPSTREAM WITH 32Kbps
GRANULARITY
■ BUILT-IN ATM TRANSPORT
■ SUPPORT ADAPTIVE RATE MODE IN
32Mbps INCREMENTS
■ 255/128 CARRIERS WITH 4.3125KHz
SPACING
■ DEDICATEDSOFTWAREDRIVERAVAILABLE
■ PROCESSOR INDEPENDENT C++ SOURCE
COMPILATION
■ FREQUENCY DIVISION MULTIPLEXING
(FDM) FOR HIGH ROBUSTNESS IN PRESENCE OF CROSSTALK
■ REED-SOLOMON FORWARD ERROR
CORRECTION
■ TRELLIS CODER AND DECODER
■ PROGRAMMABLE SIMULTANEOUS SUP-
PORT OF INTERLEAVED AND NON-INTERLEAVED CHANNELS (DUAL LATENCY)
■ FULL, REDUCED AND MINIMAL ATM
OVERHEAD FRAMING MODES
■ BIT STREAM MODE CAPABLITY FOR STM
TRANSPORT
■ DIRECT CONNECTION TO ATM SYSTEMS
VIA UTOPIA INTERFACE(LEVEL 1 OR 2)
■ MICROCONTROLLER INTERFACE WITH
16 BITS MULTIPLEXED ADDRESS/DATA
BUS
■ LOW POWER TECHNOLOGY:1.3w TOTAL
■ SINGLE 3.3V POWER SUPPLY
■ 0 TO +70°C OPERATING TEMPERATURE
RANGE
APPLICATIONS
■ HIGH SPEED INTERNET ACCESS
■ REMOTE ACCESS TO CORPORATE NET-
WORK FOR TELECOMMUTERS AND
BRANCH OFFICES
■ VIDEO-ON-DEMAND OVER TWISTED PAIR
■ CPE ADSL MODEMS, AND ROUTERS
■ ADSL PC NIC’s
■ G. LITE CPE SPLITTERLESS APPLICA-
TIONS
TQFP64 PQFP144
ORDERING NUMBERS:
ST70134 (TQFP64)
ST70135A (PQFP144)
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/8April 2000
ST70134 - ST70135A
GENERAL DESCRIPTION
The ADSL modem chip set with ATM interface
provides all the active functions required to build a
complete ATM-based ADSL modem from line
interface to ATM UTOPIA bus. The chip set
employs Discrete MultiTone modulation as
specified in ANSI T1.413.
The chip set operates at CPE end of the loop
(ATU-R mode). Reed-Solomon forward error
correction plus Trellis coding with or without
interleaving in internal interleaving RAM provides
maximum noise immunity (see Figure 3).
Interleaving is optional and can be used
simultaneously on aslow channel (e.g., for data or
control info) while a fast channel (e.g., video)
operates without interleaving. ICs include rate
adaptation capabilities during show time.
In transmit direction the chip set allows to select
an attenuation of the signal in case of short loops
or large echo (politeness). In receive direction the
chip set can optionally control an external
multiplexer to select an external attenuation of the
signal in case of short loops, and provide a 2-bit
output external gain control.
ASCOT chip set
ASCOT is a two-chip ADSL modem transceiver.
STMicroelectronics provides the necessary
software for transceiver’s external controller.
ASCOT can easily be hooked up with ATM
systems through the built-in UTOPIA level 2/1
interface. That allows ATM traffic to be carried at
up to 8Mbit/s downstream and 1Mbit/s upstream,
over a very plain and widespreadtwisted pair.
ASCOT is intended for use at ATU-R end.
The modem control software can be compiled as
C++ code, independently on the processor used.
The driver can be interfaced to any external real
time operating system.
These pages block diagrams show the main
functions built-in in ST70134 and ST70135A.
ASCOT chip set supports three different rate
adaptation modes: fixed rate adaptation mode,
fixed with capability to boost within fixed range,
dynamic rate adaptation during show time.
Modem’s performances are set by the following
parameters: Rate adaptation mode, Downstream
and Upstream bit rate for both latency paths,
Noise margins (min, max and target typically at
10E-7 BER without RS, interleaving and trellis),
Maximum power spectral density for downstream,
Maximum power for both up and downstream,
Carrier mask (which tones are disabled),
maximum interleaving delay.
Tones from number 8 to number255 canbe used:
from 8 to 31 for upsteam signals and from 32 to
255 for downstream signals. Numbers 16 and 64
(96 for ADSL over ISDN) are dedicated to pilot
tones which are employed for synchronisation
purposes with ATU-C end. The software sets the
use of tones for optimisation of performances.
Time recovery is carried out by the chip-set
through the pilot tones. This activity is undertaken
in two steps in order to achieve no more than
2ppm with ATU-C.
The transceiver controller software monitors line
and channel. As far as line is concerned noise
margin, attenuation, power, carrier load, relative
capacity occupation are checked.
Channel’s monitoring deals with cell-delineation,
actual ATM (fast and interleaved) up and
downstream rates.
Figure 1 : ADSL modem block configuration
UTOPIA
2/8
DMT MODEM ST70135A
µ
CONTROL
MEMORY
AFE
ST70134
χ
UTP
χ
ST70134 - ST70135A
ASCOT ICs
ASCOT consists of an Analog Front End
(ST70134) and a Discrete Multitone Modem
(ST70135A) integrated circuits which are
produced by STMicroelectronics.
Here below we will briefly go through the main
topics of both the ICs (see Figure 2 and Figure 3).
Analog Front End (ST70134)
HCMOS5A (0.5µm) mixed digital and analog
technology has been chosen to produce this
component that embodies the analog functions of
the ASCOT.
Automatic gain control amplifiers, placed at the
analog interface of transmit and receive paths,
allow to keep acceptable level of the signal ADC’s
and DAC’s resolution, that is 12-bit wide with
8.8MHz sampling rate.
A built-in driver allows for external clock
generation using a VCXO.
Figure 2 : Analog Front End block diagram
TRANSMIT-SIDE
ST70134 Analog Front End’s main features:
– Rx low noise amplifier (0-31dB in 1dB steps
– Tx pre-driver amplifier (-15dB -0)
– Two input ports allow selection of RX signals,
e.g. with or without external attenuation
– Programmable low pass and band pass filters
– 12-bit DAC and ADC, sampling at 8.832MHz
– Xtal: 35.328MHz, ±50ppm, the accuracy of the
frequency is determined by the External XTAL
– Direct connection to ST70135A DMT modem
– Error correction on ADC output
– Analog and digital loop back modes
– Single 3.3V supply, or 3.3V analog and 3.0V
digital supplies
– Power dissipation 0.4W
– Power-down mode 0.1W
– TQFP64 (10 x 10mm body, 0.5mm pitch)
VCODAC XTAL DRIVER
4
MUX
RECEIVE-SIDE
4
MUX
12 Bits / 8.8MHz
DAC
12 Bits / 8.8MHz
DAC
G = -15...0dB
STEP 1dB
LPF
138KHz
G = 0...31dB
STEP 1dB
LNA
LPF
1.1MHz
3/8
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