M28010
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Table 3. Operating Modes
1
Note: 1. X = VIHor VIL.
Mode E G W DQ0-DQ7
Read
V
IL
V
IL
V
IH
Data Out
Write V
IL
V
IH
V
IL
Data In
Stand-by / WriteInhibit
V
IH
X X Hi-Z
Write Inhibit X X
V
IH
Data Out or Hi-Z
Write Inhibit X
V
IL
X Data Out or Hi-Z
Output Disable X
V
IH
X Hi-Z
Write Enable(W). TheWrite Enableinput controls
whether the addressedlocation is to be read, from
or written to.
DEVICE OPERATION
In orderto prevent data corruption and inadvertent
write operations, an internal VCCcomparator
inhibits the Write operations if the VCCvoltage is
lower than VWI(see Table 4A to Table 4C). Once
the voltage applied on the VCCpin goes over the
VWIthreshold (VCC>VWI), write access to the
memory is allowed after a time-out t
PUW
,as
specified in Table 4A to Table 4C.
Further protection against data corruption is
offered by the E and Wlow pass filters: any glitch,
on the E andW inputs, witha pulsewidth less than
10 ns (typical) is internally filtered out to prevent
inadvertent write operations to the memory.
Table 4A. Power-Up Timing1for M28010 (5V range)
(TA= –40 to 85 °C; VCC= 4.5 to 5.5 V)
Note: 1. Sampled only, not 100% tested.
Table 4B. Power-Up Timing1for M28010-W (3V range)
(TA= –40 to 85 °C; VCC= 2.7 to 3.6 V)
Note: 1. Sampled only, not 100% tested.
Table 4C. Power-Up Timing1for M28010-R (2V range)
(TA= –40 to 85 °C; VCC= 1.8 to 2.4 V)
Note: 1. Sampled only, not 100% tested.
Symbol Parameter Min. Max. Unit
t
PUR
Time Delay to Read Operation 5 ms
t
PUW
Time Delay to Write Operation (once VCC≥ VWI)
5ms
V
WI
Write Inhibit Threshold 3.0 4.2 V
Symbol Parameter Min. Max. Unit
t
PUR
Time Delay to Read Operation 5 ms
t
PUW
Time Delay to Write Operation (once VCC≥ VWI)5 ms
V
WI
Write Inhibit Threshold 2.0 2.6 V
Symbol Parameter Min. Max. Unit
t
PUR
Time Delay to Read Operation 5 ms
t
PUW
Time Delay to Write Operation (once VCC≥ VWI)5 ms
V
WI
Write Inhibit Threshold 1.2 1.7 V