The M27W256 is a low voltage 256 Kbit EPROM
offered in the two ranges UV (ultra violet erase)
and OTP (one time programmable). It is ideally
suited for microprocessor systems and is organized as 32,768 by 8 bits.
The M27W256 operates in the read mode with a
supply voltage as low as 3V. The decrease in operating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.
The FDIP28W (windowceramic frit-seal package)
has a transparent lid which allows the user to expose thechipto ultraviolet light to erase thebit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications wherethe contentis programmed
only one time and erasure is not required, the
M27W256 is offered in PDIP28, PLCC32 and
TSOP28 (8 x13.4 mm) packages.
28
1
FDIP28W (F)PDIP28 (B)
PLCC32 (K)TSOP28 (N)
Figure 1. Logic Diagram
V
15
A0-A14Q0-Q7
E
G
V
28
V
CC
M27W256
SS
1
8 x 13.4mm
PP
8
AI03629
1/15March 2000
M27W256
Figure 2A. DIP Connections
V
1
PP
A12
2
A7
3
A6
4
A5
5
A4
6
A3
7
A2
A1
A0
Q0
Q2
SS
M27W256
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI03627
V
CC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
Figure 2B. LCC Connections
PP
V
A6
A5
A4
A3
A2
A1
A0
NC
Q0
A7
9
Q1
DU
A12
1
32
M27W256
17
Q2
SS
DU
V
V
Q3
CC
A14
Q4
A13
25
Q5
A8
A9
A11
NC
G
A10
E
Q7
Q6
AI03626
Figure 2C. TSOP Connections
G
22
A11
A9
A8
A13
A14
V
V
A12
CC
PP
A7
A6
A5
A4
A3
28
M27W256
1
78
21
15
14
AI03628
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
Table 1. Signal Names
A0-A14Address Inputs
Q0-Q7Data Outputs
EChip Enable
GOutput Enable
V
PP
V
CC
V
SS
NCNot Connected Internally
DUDon’t Use
Program Supply
Supply Voltage
Ground
2/15
M27W256
Table 2. Absolute Maximum Ratings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device.These are stressratings only and operationof the device atthese or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Referalso to the STMicroelectronics SURE Program andother relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias–50 to 125°C
Storage Temperature–65 to 150°C
Input or Output Voltage (except A9)–2 to 7V
Supply Voltage–2 to 7V
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125°C
Table 3. Operating Modes
ModeEGA9
Read
Output DisableV
Program
V
VerifyV
Program Inhibit
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
PulseV
IL
IH
V
IH
V
IH
V
IL
V
IL
V
IH
IH
V
IL
V
IH
X
XVCCHi-Z
X
XVPPData Out
X
XX
V
IL
V
ID
V
PP
V
CC
V
PP
V
PP
V
CC
V
CC
Data Out
Q7-Q0
Data In
Hi-Z
Hi-Z
Codes
Table 4. Electronic Signature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
00100000 20h
10001101 8Dh
3/15
M27W256
Table 5. AC Measurement Conditions
High SpeedStandard
Input Rise and Fall Times≤ 10ns≤ 20ns
Input Pulse Voltages0 to 3V0.4V to 2.4V
Input and Output Timing Ref. Voltages1.5V0.8V and 2V
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
Note: 1. Sampled only,not 100% tested.
Input Capacitance
Output Capacitance
(1)
(TA=25°C, f = 1 MHz)
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for HighSpeed
CL= 100pF for Standard
CLincludes JIG capacitance
V
V
IN
OUT
=0V
=0V
6pF
12pF
OUT
AI01823B
DEVICE OPERATION
The modesof operationoftheM27W256 are listed
in the Operating Modes. A single power supply is
required in the read mode. All inputs are TTL levels except for VPPand 12V on A9 for Electronic
Signature.
Read Mode
The M27W256 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the output controland should
be used to gate data to the output pins, indepen-
4/15
dent of device selection. Assuming that the addresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
(t
). Data is available at the output after delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been lowand the addresses havebeen stable forat least t
AVQV-tGLQV
.
Standby Mode
The M27W256 has a standby mode which reduces the supply current from 10mA to 10µA with low
voltage operation VCC≤ 3.6V, see Read ModeDC
Characteristics table for details. The M27W256 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the G input.
M27W256
Table 7. Read Mode DC Characteristics
(1)
(TA= –40to 85°C; VCC= 2.7V to 3.6V; VPP=VCC)
SymbolParameterTest ConditionMinMaxUnit
I
I
I
CC
I
CC1
I
CC2
I
V
V
IH
V
V
Note: 1. VCCmust be applied simultaneously with orbefore VPPand removed simultaneously orafter VPP.
Input Leakage Current
LI
Output Leakage Current
LO
0V ≤ V
0V ≤ V
E=V
Supply Current
I
OUT
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
PP
Input Low Voltage–0.6
IL
(2)
Input High Voltage
Output Low Voltage
OL
Output High Voltage TTL
OH
2. Maximum DC voltage on Output is V
CC
+0.5V.
E>V
I
≤ V
IN
CC
≤ V
OUT
CC
,G=VIL,
IL
= 0mA, f = 5MHz,
≤ 3.6V
V
CC
E=V
IH
– 0.2V,
CC
V
≤ 3.6V
CC
V
PP=VCC
I
= 2.1mA
OL
= –400µA
OH
±10µA
±10µA
15mA
1mA
15µA
100µA
0.2 V
CC
0.7 V
CCVCC
+ 0.5
0.4V
2.4V
V
V
Table 8. Read Mode AC Characteristics
(1)
(TA= –40to 85°C; VCC= 2.7V to 3.6V; VPP=VCC)
M27W256
(3)
SymbolAltParameter
Test
Condition
VCC= 3.0V to 3.6V VCC= 2.7V to 3.6V VCC= 2.7V to 3.6V
MinMaxMinMaxMinMax
E=V
G=V
G=V
E=V
G=V
E=V
E=V
G=V
,
IL
IL
IL
IL
IL
IL
IL
IL
040050060ns
040050060ns
,
000ns
t
AVQV
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with orbefore VPPand removed simultaneously orafter VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Address Valid to
t
ACC
Output Valid
Chip EnableLow to
t
CE
Output Valid
Output Enable Low
t
OE
to Output Valid
Chip Enable High
t
DF
to Output Hi-Z
Output EnableHigh
t
DF
to Output Hi-Z
Address Transition
t
OH
to Output Transition
-80
7080100ns
7080100ns
405060ns
-100
(-120/-150/-200)
Unit
5/15
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