SGS Thomson Microelectronics M27V801 Datasheet

M27V801
8 Mbit (1Mb x8) Low Voltage UV EPROM and OTP EPROM
LOW VOLTAGEREAD OPERATION:
3V to 3.6V
FAST ACCESS TIME: 120ns
LOW POWER CONSUMPTION:
– Active Current15mA at 5MHz – Standby Current 20µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 100µs/byte (typical)
ELECTRONIC SIGNATURE
– Manufacturer Code:20h – Device Code: 42h
DESCRIPTION
The M27V801 is a low voltage 8 Mbit EPROM of­fered in the two ranges UV (ultraviolet erase) and OTP (one time programmable). It is ideally suited for microprocessorsystems requiringlarge data or program storageandisorganized as 1,048,576 by 8 bits.
The M27V801 operates in the read mode with a supply voltage as low as 3V. The decrease in op­erating power allowseither a reduction of the size of the battery or an increase in the time between battery recharges.
The FDIP32W (window ceramic frit-seal package) has transparent lid which allows the user to ex­pose thechipto ultraviolet lightto erase the bit pat­tern. A new pattern can then be written to the device by followingthe programmingprocedure.
32
1
FDIP32W (F) PDIP32 (B)
PLCC32 (K) TSOP32 (N)
Figure 1. Logic Diagram
20
A0-A19 Q0-Q7
32
1
8 x20 mm
V
CC
8
Table 1. Signal Names
A0-A19 Address Inputs Q0-Q7 Data Outputs E Chip Enable GV V V
PP
CC
SS
Output Enable / Program Supply Supply Voltage Ground
GV
PP
E
M27V801
V
SS
AI01902
1/16May 1998
M27V801
Figure 2A. DIP Pin Connections
A19 V
A15 A12
A7 A6 A5 A4 A3 A2 A1 A0
Q0
Q2 SS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
M27V801
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
AI01903
CC
A18A16 A17 A14 A13 A8 A9 A11 GV A10 E Q7 Q6 Q5Q1 Q4 Q3V
PP
Figure 2B. PLCC Pin Connections
CC
A17
A19
32
Q3
V
Q4
A18
Q5
25
Q6
A7 A6 A5 A4 A3 A2 A1 A0
Q0
A16
A12
A15
1
9
Q1
Q2
M27V801
17
SS
V
A14 A13 A8 A9 A11 GV A10 E Q7
AI01904
PP
Figure 2C. TSOP Pin Connections
A11 GV
A9
A8 A13 A14 A17 A18
V
CC
A19 A16 A15 A12
A7
A6
A5
A4 A3
1
M27V801
8
(Normal)
9
16 17
32
25 24
AI01905
A10 E Q7 Q6 Q5 Q4 Q3 V
SS
Q2 Q1 Q0 A0 A1 A2
PP
For applications wherethe content is programmed only one time and erasure is not required, the M27V801 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.
DEVICE OPERATION
The operating modes of the M27V801 arelisted in the Operating Modes table.A single power supply is required in the read mode. All inputs are TTL levels except for GVPPand 12V on A9 for Elec­tronic Signature and Margin Mode Set or Reset .
Read Mode
The M27V801 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G)is the outputcontroland should be used to gate data to the output pins, indepen­dent of device selection. Assuming that the ad­dresses are stable, the address access time (t
) is equal to the delay from E to output
AVQV
(t
). Data is available atthe outputafteradelay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low andthe addresseshavebeen sta­ble for at least t
AVQV-tGLQV
.
2/16
M27V801
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device atthese or anyother conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi­tions for extended periodsmay affect device reliability. Refer alsotothe STMicroelectronics SURE Program and otherrelevant qual­ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is V
3. Depends on range.
Ambient Operating Temperature Temperature Under Bias –50 to 125 °C Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read Output Disable Program V Program Inhibit Standby Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
V
IL
Pulse V
IL
V
IH
V
IH
V
IL
GV
V
PP
V
IL
V
IH PP PP
A9 Q0-Q7
X Data Out X Hi-Z X Data In X Hi-Z
X X Hi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code Device Code V
V
IL
IH
Standby Mode
The M27V801 has a standby modewhich reduces the active current from 15mA to 20µA withlowvolt- age operation VCC≤ 3.6V, see Read Mode DC Characteristics table for details.The M27V801 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the GVPPinput.
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, the product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection.
00100000 20h 01000010 42h
The two line control functionallows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control lines, E should bedecoded andused as theprima­ry device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselect­ed memory devicesare intheir low power standby mode and that the output pins are only active when data is required from a particular memory device.
3/16
M27V801
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times 10ns 20ns Input Pulse Voltages 0 to3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Figure 3. Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only,not 100% tested.
(1)
(TA=25°C, f = 1 MHz)
Input Capacitance Output Capacitance V
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3k
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed CL= 100pF for Standard CLincludes JIG capacitance
V
=0V
IN
=0V 12 pF
OUT
6pF
OUT
AI01823B
System Considerations
The power switching characteristics of Advanced CMOS EPROMs requirecareful decoupling ofthe devices. The supply current, ICC, has three seg­ments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the fallingand rising edgesof E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output.
The associated transient voltage peaks can be suppressed by complying with the two line output
4/16
control and by properly selected decoupling ca­pacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V
CC
and VSS. This should be a high frequency capaci­tor of low inherent inductance and should be placed as close to the device aspossible. In addi­tion, a 4.7µF bulk electrolytic capacitor should be used between VCCand VSSfor every eight devic­es. The bulk capacitor should be located near the power supply connection point. Thepurposeof the bulk capacitor is to overcome the voltage drop caused by the inductive effectsof PCB traces.
M27V801
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to 70 °Cor –40 to 85 °C; VCC= 3.3V ± 10%)
Symbol Parameter Test Condition Min Max Unit
I
I
I
CC
I
CC1
I
CC2
I V
V
IH
V
V
Note: 1. VCCmust be applied simultaneously with orbefore VPPand removed simultaneously or after VPP.
Table 8A. Read Mode AC Characteristics
Input Leakage Current
LI
Output Leakage Current
LO
Supply Current
E=V
IL
f = 5MHz, V
0V V
0V V
,G=VIL,I
Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current
PP
Input Low Voltage –0.3 0.8 V
IL
(2)
Input High Voltage 2 Output Low Voltage
OL
Output High Voltage TTL
OH
Output High Voltage CMOS
2. Maximum DC voltage on Output is V
CC
+0.5V.
(1)
E>V
CC
I I
V
IN
CC
V
OUT
CC
= 0mA,
OUT
3.6V
CC
E=V
IH
–0.2V,VCC≤ 3.6V
V
PP=VCC
I
= 2.1mA
OL
= –400µA
OH
= –100µAV
OH
2.4 V –0.7V
CC
±10 µA ±10 µA
15 mA
1mA 20 µA 10 µA
V
+1
CC
0.4 V
(TA= 0 to 70 °Cor –40 to 85 °C; VCC= 3.3V ± 10%; VPP=VCC)
M27V801
Symbol Alt Parameter Test Condition
Min Max Min Max
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with orbefore VPPand removed simultaneously or after V
2. Sampled only, not 100% tested.
(2)
(2)
t
ACC
t t
t t
t
Address Valid to Output Valid Chip EnableLow to Output Valid
CE
Output Enable Low to Output Valid
OE
Chip EnableHigh to Output Hi-Z
DF
Output Enable High to Output Hi-Z
DF
Address Transition to Output Transition
OH
E=V
E=V
,GVPP=V
IL
GV
PP=VIL
E=V
GV
PP=VIL
E=V
,GVPP=V
IL
IL
120 150 ns 120 150 ns
IL
60 80 ns
050050ns
IL
050050ns 00ns
IL
PP
V
V
Unit-120 -150
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