– Active Current 30mA at 8MHz
– Standby Current 20µA
■ PROGRAMMING VOLTAGE: 12.5V± 0.25V
■ PROGRAMMING TIME: 100µs/byte (typical)
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Device Code: 00B2h
M27V800
8 Mbit (1Mb x8 or 512Kb x16)
42
1
FDIP42W (F)PDIP42 (B)
44
1
SO44 (M)PLCC44 (K)
42
1
DESCRIPTION
The M27V800 is a lowvoltage 8 Mbit EPROM offered inthetwo ranges UV(ultra violet erase) and
OTP (one time programmable). It is ideally suited
for microprocessor systems requiringlarge data or
program storage. It is organised as either 1 Mbit
words of8bit or 512 Kbit words of 16 bit. The pinout is compatible with a 8 Mbit Mask ROM.
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above thoselisted in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias–50 to 125°C
Storage Temperature–65 to 150°C
Input or Output Voltage (except A9)–2 to 7V
Supply Voltage–2 to 7V
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
+0.5V with possible overshoot to VCC+2V for a period less than20ns.
CC
(1)
(3)
Warning: NC = Not Connected.
–40 to 125°C
2/16
Table 3. Operating Modes
ModeEGBYTEV
Read Word-wide
Read Byte-wide UpperV
Read Byte-wide Lower
Output Disable
Program
Verify
Program Inhibit
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
V
IL
IL
V
IL
V
IL
PulseV
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IL
V
IH
IH
V
IL
V
IH
XXXHi-ZHi-ZHi-Z
V
IL
V
IH
V
IL
V
IL
XXHi-ZHi-ZHi-Z
V
PP
V
PP
V
PP
V
IH
A9Q0-Q7Q8-Q14Q15A–1
PP
XData OutData OutData Out
XData OutHi-ZV
XData OutHi-Z
XData InData InData In
XData OutData OutData Out
XHi-ZHi-ZHi-Z
V
ID
CodesCodesCode
Table 4. Electronic Signature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
M27V800
IH
V
IL
Manufacturer’s CodeV
Device Code
Note: Outputs Q8-Q15 are set to ’0’.
IL
V
IH
00100000 20h
10110010 B2h
The M27V800 operates in the read mode with a
supply voltage as low as 3V. The decrease in operating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.
The FDIP42W (window ceramic frit-seal package)
has a transparent lid which allows the user to expose the chipto ultraviolet lightto erasethe bit pattern. A new pattern can then be written rapidly to
the device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27V800 is offered in PDIP42, SO44 and
PLCC44 package.
DEVICE OPERATION
The operating modes ofthe M27V800are listed in
the OperatingModes Table.A single power supply
is required in the read mode. All inputs are TTL
compatible except for VPPand 12V on A9 for the
Electronic Signature.
Read Mode
The M27V800 has two organisations, Word-wide
and Byte-wide.The organisation is selected by the
signal level onthe BYTEVPPpin. When BYTEV
PP
is at VIHthe Word-wide organisation is selected
and the Q15A–1 pin is usedfor Q15 Data Output.
When the BYTEVPPpinis at VILthe Byte-wideorganisation is selected and theQ15A–1 pin is used
for the Address Input A–1. When the memory is
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at VILthe
lower 8bits of the16bit data are selected and with
A–1 at VIHthe upper 8 bits of the 16 bit data are
selected.
The M27V800 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte-wide organisation must be selected.
Chip Enable (E) is thepower control and should be
used fordevice selection. OutputEnable (G)is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the address access time (t
from E to output (t
ELQV
output after a delay of t
) is equal to the delay
AVQV
). Data is available at the
from the falling edge
GLQV
of G, assuming that E has been low and the addresseshave been stable forat least t
AVQV-tGLQV
.
3/16
M27V800
Table 5. AC Measurement Conditions
High SpeedStandard
Input Rise and Fall Times≤ 10ns≤ 20ns
Input Pulse Voltages0 to 3V0.4V to2.4V
Input and Output Timing Ref.Voltages1.5V0.8V and 2V
Figure 3. Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
(1)
(TA=25°C, f= 1 MHz)
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for HighSpeed
CL= 100pF for Standard
CLincludes JIG capacitance
OUT
AI01823B
SymbolParameterTest ConditionMinMaxUnit
C
Input Capacitance (except BYTEVPP)V
IN
C
OUT
Note: Sampled only, not 100% tested.
Input Capacitance (BYTEV
Output Capacitance
)V
PP
=0V
IN
= 0V120pF
IN
V
=0V
OUT
10pF
12pF
Standby Mode
The M27V800 hasa standby modewhich reduces
the supply current from 20mA to 20µA with low
voltage operationVCC≤ 3.6V, seeRead Mode DC
Characteristics table for details.The M27V800 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the G input.
4/16
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, thisproduct features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory powerdissipation,
b. complete assurance that output bus contention
will not occur.
M27V800
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to70 °C; VCC= 3.3V± 10%; VPP=VCC)
SymbolParameterTest ConditionMinMaxUnit
I
I
I
CC
I
CC1
I
CC2
I
V
V
IH
V
V
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Input Leakage Current
LI
Output Leakage Current
LO
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
PP
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2
Output Low Voltage
OL
Output High VoltageTTL
OH
2. Maximum DC voltage on Output is V
CC
+0.5V.
E=V
IL
f = 8MHz, V
E=V
IL
f = 5MHz, V
E>V
0V ≤ V
0V ≤ V
,G=VIL,I
,G=VIL,I
CC
I
OH
≤ V
IN
CC
≤ V
OUT
E=V
–0.2V,VCC≤ 3.6V
V
PP=VCC
I
= 2.1mA
OL
= –400µA
CC
CC
IH
CC
OUT
≤ 3.6V
OUT
≤ 3.6V
= 0mA,
= 0mA,
2.4V
±1µA
±10µA
30mA
20mA
1mA
20µA
10µA
V
+1
CC
0.4V
V
For the most efficient use of these two control
lines, E should be decoded and usedas the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system controlbus. This ensures that alldeselected memory devices are intheir low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMsrequire carefull decoupling of the
supplies to the devices. The supply current ICC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling andrising edges of E.
The magnitude of the transient current peaks is
dependant on the capacititive and inductive loading of the device outputs. The associatedtransient
voltage peaks can be supressed by complying
with the two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor is used on every
device between VCCand VSS. This should be a
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7µF electrolytic capacitor
should be used between VCCand VSSfor every
eight devices. This capacitor should be mounted
near the power supply connection point. The purpose of this capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
5/16
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