The components designated by a symbol ( ! ) in this schematic diagram designates components whose value are of
special significance to product safety. Should any component designated by a symbol need to be replaced, use only the part
designated in the Parts List. Do not deviate from the resistance, wattage, and voltage ratings shown.
CAUTION : Danger of explosion if battery is incorrectly replaced.
Replace only with the same or equivalent type recommended by the manufacturer.
Discard used batteries according to the manufacturer’s instructions.
NOTE : 1. Parts order must contain model number, part number, and description.
2. Substitute parts may be supplied as the service parts.
3. N. S. P. : Not available as service parts.
Design and specification are subject to change without notice.
SX515/EX, U
REFERENCE No. SM5310465
1. OUTLINE OF CIRCUIT DESCRIPTION
1-1. CA1 and A PART OF CA2 CIRCUIT
DESCRIPTIONS
Around CCD block
1. IC Configuration
CA1 board
IC901 (ICX411AQ) CCD imager
CA2 board
IC931 H driver, CDS, AGC and A/D converter
IC934 (CXD3400N) V driver
2. IC901 (CCD imager)
[Structure]
Interline type CCD image sensor
Image sizeDiagonal 8.293 mm (1/1.8 type)
Pixels in total2384 (H) x 1734 (V)
Recording pixels2288 (H) x 1712 (V)
10
11
1B
OUT
V
DD
V
9
12
GND
RG
Ø
TEST
8
13
2
Ø
H
Ø
V
TEST
7
6
Ye
G
Ye
G
Ye
Vertical register
G
Horizontal register
15
14
1
Ø
GND
H
Fig. 1-2. CCD Block Diagram
1A
Ø
Ø
V
V
4
5
Cy
Ye
Mg
G
Cy
Ye
Mg
G
Cy
Ye
Mg
G
17
16
SUB
SUB
C
Ø
(Note) : Photo sensor
3
18
Ø
V
L
V
Cy
Mg
Cy
Mg
Cy
Mg
19
2
3A
Ø
V
1
Ø
H
3B
2
1
(Note)
20
4
Ø
V
2
Ø
H
Pin No.
1
2, 3
4
5, 6
9, 15
10
11
12
13, 20
14, 19
16
17
18
Symbol
4
Vø
Vø
3A, Vø3B
Vø2
Vø1A, Vø1B
GND
OUT
V
VDD
øRG
Hø2
Hø
1
øSUB
CSUB
VL
Pin Description
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Signal output
Circuit power
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
Substrate clock
Substrate bias
Protection transistor bias
Table 1-1. CCD Pin Description
Waveform
GND
DC
DC
DC
DC
Voltage
-7.5 V, 0 V
-7.5 V, 0 V, 15 V
-7.5 V, 0 V
-7.5 V, 0 V, 15 V
0 V
Aprox. 10 V
15 V
12.5 V, 16 V
0 V, 5 V
0 V, 5 V
Approx. 8 V
Approx. 8 V
(Different from every CCD)
When sensor read-out
– 2 –
3. IC934 (V Driver) and IC931 (H Driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD. IC934 is
V driver. In addition the XV1-XV4 signals which are output
from IC102 are the vertical transfer clocks, and the XSG signal which is output from IC102 is superimposed onto XV1
and XV3 at IC934 in order to generate a ternary pulse. In
addition, the XSUB signal which is output from IC102 is used
as the sweep pulse for the electronic shutter. A H driver is
inside IC931, and H1, H2 and RG clock are generated at
IC931.
4. IC931 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to Pin
(29) of IC931. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (37) of IC911. The video signal is
carried out A/D converter, and is output by 12-bit.
VRB
VRT
VREF
CCDIN
CDS
PxGA
2~36 dB
VGA
ADC
12
DOUT
RG
H1-H4
HORIZONTAL
4
DRIVERS
CLAMP
INTERNAL
CLOCKS
PRECISION
TIMING
CORE
SYNC
GENERATOR
VD
HD
Fig. 1-2. IC931 Block Diagram
CLAMP
INTERNAL
REGISTERS
SL
SCK
CLPOB
CLPDM
PBLK
CLI
SDATA
– 3 –
1-2. CA2 CIRCUIT DESCRIPTION
1. Circuit Description
1-1. Digital clamp
The optical black section of the CCD extracts averaged values from the subsequent data to make the black level of the
CCD output data uniform for each line. The optical black section of the CCD averaged value for each line is taken as the
sum of the value for the previous line multiplied by the coefficient k and the value for the current line multiplied by the
coefficient 1-k.
1-2. Signal processor
1. γ correction circuit
This circuit performs (gamma) correction in order to maintain
a linear relationship between the light input to the camera
and the light output from the picture screen.
2. Color generation circuit
This circuit converts the CCD data into RGB signals.
3. Matrix circuit
This circuit generates the Y signals, R-Y signals and B-Y signals from the RGB signals.
4. Horizontal and vertical aperture circuit
This circuit is used gemerate the aperture signal.
1-3. AE/AWB and AF computing circuit
The AE/AWB carries out computation based on a 64-segment
screen, and the AF carries out computations based on a 6segment screen.
1-4. SDRAM controller
This circuit outputs address, RAS, CAS and AS data for controlling the SDRAM. It also refreshes the SDRAM.
1-5. Communication control
1. SIO
This is the interface for the 8-bit microprocessor.
2. PIO/PWM/SIO for LCD
8-bit parallel input and output makes it possible to switch between individual input/output and PWM input/output.
1-6. TG/SG
Timing generated for 4 million pixel CCD control.
1-7. Digital encorder
It generates chroma signal from color difference signal.
2. Outline of Operation
When the shutter opens, the reset signals (ASIC and CPU)
and the serial signals (“take a picture” commands) from the
8-bit microprocessor are input and operation starts.
When the TG/SG drives the CCD, picture data passes through
the A/D and CDS, and is then input to the ASIC as 12-bit
data. The AF, AE, AWB, shutter, and AGC value are computed from this data, and three exposures are made to obtain
the optimum picture. The data which has already been stored
in the SDRAM is read by the CPU and color generation is
carried out. Each pixel is interpolated from the surrounding
data as being either Ye, Cy, Mg or B primary color data to
produce R, G and B data. At this time, correction of the lens
distortion which is a characteristic of wide-angle lenses is
carried out. After AWB and γ processing are carried out, a
matrix is generated and aperture correction is carried out for
the Y signal, and the data is then compressed by JPEG and
is then written to card memory (smart media).
When the data is to be output to an external device, it is taken
data from the memory and output via the USART. When played
back on the LCD and monitor, data is transferred from memery
to the SDRAM, and the image is then elongated so that it is
displayed over the SDRAM display area.
3. LCD Block
During monitoring, YUV conversion is carried out for the 12bit CCD data which is input from the A/D conversion block to
the ASIC and is then transferred to the DRAM so that the
CCD data can be displayed on the LCD.
The data which has accumulated in the DRAM is passed
through the NTSC encoder , and after D/A conversion is carried out to change the data into a Y/U/V signal, the data is
sent to the LCD panel and displayed.
If the shutter button is pressed in this condition, the 12-bit
data which is output from the A/D conversion block of the
CCD is sent to the DRAM (DMA transfer), and after processor, it is displayed on the LCD as a freeze-frame image.
During playback, the JPEG image data which has accumulated in the flash memory is converted to YUV signals, and
then in the same way as during monitoring, it is passed through
the NTSC endoder, and after D/A conversion is carried out to
change the data into a Y/U/V signal, the data is sent to the
LCD panel and displayed.
The three analog signals (Y/U/V signals) from the ASIC are
converted into RGB signals by the LCD driver, and these RGB
signals and the control signal which is output by the LCD driver
are used to drive the LCD panel. The RGB signals are 1H
transposed so that no DC component is present in the LCD
element, and the two horizontal shift register clocks drive the
horizontal shift registers inside the LCD panel so that the 1H
transposed RGB signals are applied to the LCD panel. Because the LCD closes more as the difference in potential between the COM (common polar voltage: fixed at DC) and the
R, G and B signals becomes greater, the display becomes
darker; if the difference in potential is smaller, the element
opens and the LCD become brighter.
– 4 –
1-3. PW1 POWER CIRCUIT and LENS DRIVE
BLOCK DESCRIPTION
1. Outline
This is the main power circuit, and is comprised of the following blocks.
Switching power controller (IC501)
Analog system power output (Q5001, T5001)
Digital 1.8 V power output (Q5009, L5008)
Digital 3.3 V power output (Q5010, L5009)
Digital 3.3 V step-up power output (Q5011, L5010)
LED backlight power output (Q5012, L5011)
5 V and LCD system power output (Q5015, L5012)
2. Switching Controller
This is the basic circuit which is necessary for controlling the
power supply for a PWM-type switching regulator, and is provided with six built-in channels, only CH1 (analog system
power output), CH2 (digital 1.85 V system power output), CH3
(digital 3.35 V system power output), CH4 (digital 3.35 V stepup power output), CH5 (LED back light power output) and
CH6 (5 V and LCD system power output) are used. Feedback
from 15.0 V (A) (CH1), 1.8 V (D) (CH2), 3.3 V (D) (CH3), 4.7
V (L) (CH4), LED backlight output (CH5) and 5 V (CH6) power
supply outputs are received, and the PWM duty is varied so
that each one is maintained at the correct voltage setting level.
7. LED Backlight Power Output
A constant current flows to the backlight LEDs. Feedback for
the voltage of R5098 is provided to the power controller (Pin
(2) of IC501) so that PWM control can be carried out.
8. 5 V and LCD System Power Output
5 V is output. Feedback for the 5 V is provided to the swiching
controller (Pin (4) of IC501) so that PWM control can be carried out. And also this CH6 pulse is carried out voltage doubler so that 9.9 V (L) for LCD is output.
9. Lens drive block
9-1. Iris drive
When the drive signals (IRIS_A, IRIS_/A, IRIS_B and IRIS_/
B) which are output from the ASIC expansion port (IC105), the
stepping motor is driven by the driver (IC951), and are then
used to drive the iris steps.
9-2. Focus drive
When the drive signals (FIN_A, FIN_-A, FIN_B and FIN_-B)
which are output from the ASIC expansion port (IC106), the
focus stepping motor is driven by the driver (IC951). Detection
of the standard focusing positions is carried out by means of
the photointerruptor (FOCUS PI) inside the lens block.
2-1. Short-circuit Protection
If output is short-circuited for the length of time determined
by the condenser which is connected to Pin (37) of IC501, all
output is turned off. The control signal (P ON) are recontrolled
to restore output.
3. Analog System Power Output
15.0 V (A) and -7.5 V (A) are output. Feedback for the 15.0 V
(A) is provided to the switching controller (Pin (40) of IC501)
so that PWM control can be carried out.
4. Digital 1.8 V Power Output
1.8 V (D) is output. Feedback for the 1.8 V (D) is provided to
the switching controller (Pins (43) of IC501) so that PWM
control can be carried out.
5. Digital 3.3 V Power Output
3.3 V (D) is output. Feedback for the 3.3 V (D) is provided to
the swiching controller (Pin (45) of IC501) so that PWM control can be carried out.
6. Digital 3.3 V Step-up Power Output
4.7 V is output. Feedback for the 4.7 V is provided to the
swiching controller (Pin (47) of IC501) so that PWM control
can be carried out.
9-3. Iris drive
The zoom DC motor drive signals (ZIN_A and ZIN_-A) which
are output from the ASIC are used to drive by the motor driver
(IC951). Detection of the zoom positions is carried out by means
of photointerruptor (ZOOM PI) inside the lens block.
9-4. Shutter drive
It is driven regular current with the motor driver IC (IC951) by
the shutter drive signals (SHUT_A and SHUT_/A) which are
output from the ASIC expansion port (IC106).
– 5 –
1-4. ST1 STROBE CIRCUIT DESCRIPTION
1. Charging Circuit
When UNREG power is supplied to the charge circuit and the
CHG signal from SY1 board becomes High (3.3 V), the charging circuit starts operating and the main electorolytic capacitor is charged with high-voltage direct current.
However, when the CHG signal is Low (0 V), the charging
circuit does not operate.
1-1. Power switch
When the CHG signal switches to Hi, Q5407 turns ON and
the charging circuit starts operating.
1-2. Power supply filter
C5401 constitutes the power supply filter. They smooth out
ripples in the current which accompany the switching of the
oscillation transformer.
1-3. Oscillation circuit
This circuit generates an AC voltage (pulse) in order to increase the UNREG power supply voltage when drops in current occur. This circuit generates a drive pulse with a frequency
of approximately 50-100 kHz. Because self-excited light omission is used, the oscillation frequency changes according to
the drive conditions.
2. Light Emission Circuit
When RDY and TRIG signals are input from the ASIC expansion port, the stroboscope emits light.
2-1. Emission control circuit
When the RDY signal is input to the emission control circuit,
Q5409 switches on and preparation is made to let current
flow to the light emitting element. Moreover, when a STOP
signal is input, the stroboscope stops emitting light.
2-2. Trigger circuit
When a TRIG signal is input to the trigger circuit, D5405
switches on, a high-voltage pulse of several kilovolts is generated inside the trigger circuit, and this pulse is then applied
to the light emitting part.
2-3. Light emitting element
When the high-voltage pulse form the trigger circuit is applied to the light emitting part, currnet flows to the light emitting element and light is emitted.
Beware of electric shocks.
1-4. Oscillation transformer
The low-voltage alternating current which is generated by the
oscillation control circuit is converted to a high-voltage alternating current by the oscillation transformer.
1-5. Rectifier circuit
The high-voltage alternating current which is generated at
the secondary side of T5401 is rectified to produce a highvoltage direct current and is accumulated at electrolytic capacitor C5412.
1-6. Voltage monitoring circuit
This circuit is used to maintain the voltage accumulated at
C5412 at a constance level.
After the charging voltage is divided and converted to a lower
voltage by R5417, R5419 and R5420, it is output to the SY1
circuit board as the monitoring voltage VMONIT. When this
VMONIT voltage reaches a specified level at the SY1 circuit
board, the CHG signal is switched to Low and charging is
interrupted.
– 6 –
1-5. SY1 CIRCUIT DESCRIPTION
1. Configuration and Functions
For the overall configuration of the SY1 circuit board, refer to the block diagram. The SY1 circuit board centers around a 8-bit
microprocessor (IC301), and controls camera system condition (mode).
The 8-bit microprocessor handles the following functions.
1. Operation key input, 2. Clock control and backup, 3. Power ON/OFF, 4. Storobe charge control, 5. Signal input and output for
zoom and lens control.
Pin
1~4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24VDD
25AVSS
26~29SCAN IN 3~0
30
31NOT USED
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
STBY_LED (GREEN)
Signal
SCAN OUT 0~3
P ON
PA ON
LCD ON
BL_ON
VSS
VDD
SELF_LED
STBY_LED (RED)
AVREF_ON
SI
SO
SCK
PRG SI
PRG SO
PRG SCK
NOT USED
NOT USED
CHG ON
INT_TMP
CHG VOL
BATTERY
AVREF
AVDD
RESET
XCOUT
XCIN
IC
XOUT
XIN
VSS
BAT OFF
SREQ
SCAN IN6
NOT USED
NOT USED
BOOT
I/O
O
O
O
O
O
O
O
O
O
O
I/O
O
I/O
O
O
O
I/O
Outline
Key matrix output
Digital power ON/OFF controlH : ON
Analog power ON/OFF controlH : ON
LCD power ON/OFF controlH : ON
LCD backlight ON/OFF
-
-
I
I
-
-
-
-
I
I
-
I
I
-
-
I
I
I
I
-
I
I
I
-
-
GND
VDD
Self-timer LED controlL : ON
Stand-by LED (red) controlL : ON
Stand-by LED (green) controlL : ON
A/D converter standard voltage controlL : ON
Receiving data (from ASIC)
Sending data (to ASIC)
Communication clock (to ASIC)
Flash memory write receiving data
Flash memory write sending data
Flash memory write communication clock
-
-
Flash charge controlH : ON
VDD
Analog GND
Key scan input
Internal temperature detection input (analog input)
-
Storobe charge voltage detection (analog input)
Battery voltage detection (analog input)
Analog standard voltage input terminal
A/D converter analog power terminal
Reset input
Clock oscillation terminal (32.768 kHz)
Clock oscillation terminal
Flash memory writing voltage
Main clock oscillation terminal (4MHz)
Main clock oscillation terminal
GND
Battery OFF detection
Serial communication requirement (from ASIC)
Key scan input 6
-
-
Compulsion boot control
See next page →
– 7 –
49AV JACK
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
DC IN
CARD
BUZZER
SCAN OUT 4
SCAN IN 4
SCAN IN 5
WAKE UP
USB
NOT USED-
NOT USED--
BACKUP_CNT
AUDRST
ASIC TEST
ASIC RESET
MAIN RESET
I
ODC jack/battery detection input (analog input)L : DC jack insertion
I
O
I
O
I
O
I
O
OAudio reset control signalH : RESET
OASIC reset control signalL : RESET
O
O
Table 5-1. 8-bit Microprocessor Port Specification
AV jack connection detectionH : AV jack detection
CF card insertion detectionL : Insertion
Buzzer beep tone outputH : Pulse output
Key scan output 4
Key scan input 4
Key scan input 5
CPU sleep recovery signal
USB connector detectionL : USB detecion
-
Backup battery charge controlL : Charge ON
ASIC reset control signalL : RESET
CPU reset singalL : RESET
2. Internal Communication Bus
The SY1 circuit board carries out overall control of camera operation by detecting the input from the keyboard and the condition
of the camera circuits. The 8-bit microprocessor reads the signals from each sensor element as input data and outputs this data
to the camera circuits (ASIC) or to the LCD display device as operation mode setting data. Fig. 5-1 shows the internal communication between the 8-bit microprocessor, ASIC and SPARC lite circuits.
MAIN RESET
S. REQ
8-bit
Microprocessor
Fig. 5-1 Internal Bus Communication System
ASIC SO
ASIC SI
ASIC SCK
ASIC TEST
ASIC RESET
3. Key Operaiton
For details of the key operation, refer to the instruction manual.
SCAN
OUT
SCAN
IN
0
1
2
3
0
← LEFT
PLAY
-
WEB
-
1
↑ UP
VF
-
DC MODE
-4
2
↓ DOWN
LCD
TEST
SET UP
-
3
→ RIGHT
WIDE
FOCUS
VIDEO CLIP
SHOOTING
-
4
MENU
TELE
FLASH
SEQUENTIAL
SHOT
-
ASIC
5
SET
-
1st
STILL IMAGE
-
6
-
-
2nd
-
POWER ON
Table 5-2. Key Operation
– 8 –
4. Power Supply Control
The 8-bit microprocessor controls the power supply for the overall system.
The following is a description of how the power supply is turned on and off. When the battery is attached, a regulated 3.2 V
voltage is normally input to the 8-bit microprocessor (IC301) by IC302, so that clock counting and key scanning is carried out
even when the power switch is turned off, so that the camera can start up again. When the battery is removed, the 8-bit microprocessor operates in sleep mode using the backup lithium secondary battery. At this time, the 8-bit microprocessor only carries
out clock counting, and waits in standby for the battery to be attached again. When a switch is operated, the 8-bit microprocessor
supplies power to the system as required.
The 8-bit microprocessor first sets both the P (A) ON signal at pin (6) and the P ON signal at pin (5) to high, and then turns on the
DC/DC converter. After this, low signals are output from pins (62), (63) and (64) so that the ASIC is set to the active condition. If
the LCD monitor is on, the LCD ON signal at pin (7) set to high, and the DC/DC converter for the LCD monitor is turned on. Once
it is completed, the ASIC returns to the reset condition, all DC/DC converters are turned off and the power supply to the whole
system is halted.
ASIC,
memory
Power voltage
Power OFF
Power switch ON-
Auto power OFF
Shutter switch ON
CAMERA
Monitor OFF
LCD finder
Play back
Table 4-3. Camera Mode (Battery Operation)
Note) 4 MHz = Main clock operation, 32 kHz = Sub clock operation
3.3 V
OFF
OFF
ON
OFF
ON
ON
CCD
5 V (A)
+12 V etc.
OFF
OFF
ON→OFF
OFF
ON
OFF
(ALWAYS)
5. 8-bit D/A circuit (Audio)
This circuit converts the audio signals (analog signals) from the microphone to 8-bit digital signals.
8 bit
CPU
3.2 V
32KHzOFF
4 MHzOFF
4 MHzOFF
4 MHzOFF
4 MHzON
4 MHzON
LCD
MONITOR
+8.5V (L)
6. 8-bit A/D circuit (Audio)
The audio signals which were converted to digial form by the 8-bit A/D circuit are temporarily to a sound buffer and then recorded
in the SSFDC card. During playback, the 8-bit D/A circuit converts these signals into analog audio signals.
– 9 –
2. DISASSEMBLY
5
1
2
3
2
4
5
6
7
8
9
10
11
12
2-1. REMOVAL OF CABINET FRONT, CABINET BACK AND CABINET TOP
8
1. Six screws 1.7 x 2.5
2. Three screws 1.7 x 4
3. Four screws 1.7 x 2
4. Cabinet front
5. Cabinet back
6. FPC
7. Screw 1.7 x 2.5
8. Cabinet top
7
5
3
6
1
4
2
1
3
1
NOTE: Do not touch the holder cabi lock.
1
2
2
1
Because they change the shape
and get injured.
2-2. REMOVAL OF SY1 BOARD AND LCD
1. Two screws 1.7 x 3
2. Two connector
3. Connector
4. SY1 board
5. Four screws 1.7 x 3
6. Screw 1.7 x 3
7. Holder card
8. Holder monitor
9. FPC
10. Connector
11. LCD
12. Screw 1.7 x 4
NOTE: Attach the button buttery + side is
the bottom (Z3001 of SY1 board).
– 10 –
2-3. REMOVAL OF PW1 BOARD, CA2 BOARD, ST1 BOARD AND CA1 BOARD
6-3. LCD RGB Offset Adjustment
6-4. LCD Blue Brightness Adjustment
6-5. LCD Red Brightness Adjustment
Note: If the lens, CCD and board in item 2-5, it is necessary
to adjust again. Item 5 adjustment should be carried
out after item 3.
3-4. Setup
1. System requirements
Windows 98 or Me or 2000 or XP
IBM R -compatible PC with pentium processor
CD-ROM drive
3.5-inch high-density diskette drive
USB port
40 MB RAM
Hard disk drive with at least 15 MB available
VGA or SVGA monitor with at least 256-color display
2. Installing calibration software
1. Insert the calibration software installation diskette into your
diskette drive.
2. Open the explorer.
3. Copy the DscCalDI_129 folder on the floppy disk in the FD
drive to a folder on the hard disk.
J-5
3-2. Equipment
1. Oscilloscope
2. Digital voltmeter
3. AC adaptor
4. PC (IBM R -compatible PC, Pentium processor, Window
98 or Me or 2000 or XP)
3-3. Adjustment Items and Order
1. IC501 Oscillation Frequency Adjustment
2. Lens Adjustment
3. AWB Adjustment
4. CCD White Point Defect Detect Adjustment
5. CCD Black Point Defect Detect Adjustment In Lighted
6. LCD Panel Adjustment
6-1. LCD H AFC Adjustment
6-2. LCD Gain Adjustment
3. Installing USB driver
Install the USB driver with camera or connection kit for PC.
4. Pattern box (color viewer)
Turn on the switch and wait for 30 minutes for aging to take
place before using Color Pure. It is used after adjusting the
chroma meter (VJ8-0192) adjust color temperature to 3100 ±
20 K and luminosity to 900 ± 20 cd/m
2
. Be careful of handling
the lump and its circumference are high temperature during
use and after power off for a while.
5. Computer screen during adjustment
– 12 –
3-5. Connecting the camera to the computer
1. Line up the arrow on the cable connector with the notch on the camera's USB port. Insert the connector.
2. Locate a USB port on your computer.
To USB port
AC adaptor
USB cable
– 13 –
3-6. Adjust Specifications
[PW1 board (Side B)]
VR501
CL526
Note:
1. Frequency adjustment is necessary to repair in the PW1
board and replace the parts. It is carried out with LCD
through screen display mode.
Preparation:
1. Carry out the frequency adjustment disconnecting cabinet
front, cabinet back, cabinet top and screws of holder battery. Side B of PW1 board can be seen.
2. Connect FPC of cabinet back to CN303.
3. Insert the compact flash.
4. Set the main switch to the camera mode.
5. Set the selector dial to the still image shooting mode.
6. Push the power switch, and comfirm that the through screen
from the CCD can be seen on the LCD.
Preparation:
POWER switch: ON
Adjustment condition:
More than A3 size siemens star chart
Fluorescent light illumination with no flicker
Illumination above the subject should be 400 lux ± 10 %.
Adjustment method:
1. Set the siemens star chart 100 cm ± 3 cm so that it becomes center of the screen.
2. Double-click on the DscCalDi129.
3. Click the Focus, and click the Yes.
4. Lens adjustment value will appear on the screen.
3. Select “CCD Black” on the LCD “Test”, and click the “Ye s ”.
4. After the adjustment is completed, the number of defect
will appear.
6. LCD Panel Adjustment
[CA2 board (Side A)]
○○○○○○○○
○○
A
CL404
CL405
6-2. LCD Gain Adjustment
Adjusting method:
1. Adjust LCD “Gain” so that the amplitude of the CL403
waveform is 1.5 V ± 0.1 Vp-p.
1.5 V ±
0.1 Vp-p
CL403 waveform
CL401(B)
CL402(R)
CL403(G)
CL405(CSYNC)
CL404
(XENB)
6-1. LCD H AFC Adjustment
Preparation:
POWER switch: ON
Adjusting method:
1. Double-click on the DscCalDi129.
2. Select 0 on the LCD “H AFC”.
3. Apply a trigger using CL405, and adjust LCD “H AFC” so
that the time A from the rising signal at CL405 to the falling signal at CL404 is 5.00 ± 0.2 µsec.
6-3. LCD RGB Offset Adjustment
Adjusting method:
1. Adjust LCD “RGB Offset” so that the amplitude of the CL403
waveform is 3.5 V ± 0.1 Vp-p.
Note:
6-2. LCD Gain adjustment should always be carried out first.
3.5 V ±
0.1 Vp-p
CL403 waveform
– 15 –
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