Sanyo LED-32XR10F Schematic

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FILE NO.
SERVICE MANUAL
LED-LCD TV
LED-32XR10F
PRODUCT CODE No.
PRODUCT CODE No. 1 682 349 91: PAL-BG(TV) DTV
REFERENCE No.:SM0915112
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CONTENTS
Safety precautions………………………………………………………………………..…
Alignment instructions …………………………….…….…………………………………
Method of software upgrading instructions………………………………………………..
Working principle analysis of the unit……………………………….………….………….
Block diagram…………………………………..………………………………….…………
IC block diagram and instruction…………………………………………………………..……
Wiring diagram …………………………………………………………………………….
Troubleshooting guide ………………………………………………………………..……
Schematic diagram…………………………………………………………………………
APPENDIX-A: Main assembly list
APPENDIX-B: Exploded View
Installing the Stand or wall-mount bracket
Wall mounting instructions
3
5
13
17
19
20
29
30
33
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Attention: This service manual is only for service personnel to take reference with. Before
servicing please read the following points carefully.
Safety precautions
1. Instructions
Be sure to switch off the power supply before replacing or welding any components or inserting/plugging in connection wire Anti static measures to be taken (throughout the entire production process!): a) Do not touch here and there by hand at will; b) Be sure to use anti static electric iron; c) It’s a must for the welder to wear anti static gloves. Please refer to the detailed list before replacing components that have special safety requirements. Do not change the specs and type at will.
2. Points for attention in servicing of LED
2.1 Screens are different from one model to another and therefore not interchangeable. Be sure to use the screen of the original model for replacement.
2.2 The operation voltage of L protecting yourself and the machine when testing the system in the course of normal operation or right after the power is switched off. Please do not touch the circuit or the metal part of the module that is in operation mode. Relevant operation is possible only one minute after the power is switched off.
2.3 Do not use any adapter that is not identical with the TV set. Otherwise it will cause fire or damage to the set.
2.4 Never operate the set or do any installation work in bad environment such as wet bathroom, laundry, kitchen, or nearby fire source, heating equipment and devices or exposure to sunlight etc. Otherwise bad effect will result.
2.5 If any foreign substance such as water, liquid, metal slices or other matters happens to fall into the module, be sure to cut the power off immediately and do not move anything on the module lest it should cause fire or electric shock due to contact with the high voltage or short circuit.
2.6 Should there be smoke, abnormal smell or sound from the module, please shut the power off at once. Likewise, if the screen is not working after the power is on or in the course of operation, the power must be cut off immediately and no more operation is allowed under the same condition.
2.7 Do not pull out or plug in the connection wire when the module is in operation or just after the power is off because in this case relatively high voltage still remains in the capacitor of the driving circuit. Please wait at least one minute before the pulling out or plugging in the connection wire.
2.8 When operating or inst or extrusion, collision lest mishap should result.
2.9 As most of the circ to pay attention to anti statics. Before servicing ensure full grounding for all the parts that have to be grounded.
2.10 There are lots of connection wires between part moving the set please take care not to touch or scratch them. Once they are damaged the screen
alling LED please don’t subject the LED components to bending, twisting
uitry in LED TV set is composed of CMOS integrated circuits, it’s necessary
ED screen is 700-825V. Be sure to take proper measures in
LED TV make sure to take anti static measure and
s behind the LED screen. When servicing or
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would be unable to work and no way to get it repaired. If the connection wires, connections or components fixed by the thermotropic glue need to disengage when service, please soak the thermotropic glue into the alcohol and then pull them out in case of dagmage.
2.11 Special care must be taken in transporting or handling it. Exquisite shock vibration may lead to breakage of screen glass or damage to driving circuit. Therefore it must be packed in a strong case before the transportation or handling.
2.12 For the storage make sure to put it in a place where the environment can be controlled so as to prevent the temperature and humidity from exceeding the limits as specified in the manual. For prolonged storage, it is necessary to house it in an anti-moisture bag and put them altogether in one place. The ambient conditions are tabulated as follows:
o
Temperature Scope for operation
5
~ +35
C
Scope for storage -15~ +45 oC
Humidity Scope for operation 20% ~ 80%
Scope for storage <= 80%
2.13 Display of a fixed picture for a long time may result in appearance of picture residue on the screen, as commonly called “ghost shadow”. The extent of the residual picture varies with the maker of LED screen. This phenomenon doesn’t represent failure. This “ghost shadow” may remain in the picture for a period of time (several minutes). But when operating it please avoid displaying still picture in high brightness for a long time.
3. Points for attention during installation
3.1 The front panel of LED screen is of glass. When installing it please make sure to put it in place.
3.2 For service or installation it’s necessary to use specified screw lest it should damage the screen.
3.3 Be sure to take anti dust measures. Any foreign substance that happens to fall down between the screen and the glass will affect the receiving and viewing effect
3.4 When dismantling or mounting the protective partition plate that is used for anti vibration and insulation please take care to keep it in intactness so as to avoid hidden trouble.
3.5 Be sure to protect the cabinet from damage or scratch during service, dismantling or mounting.
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Alignment instructions
1. Safety Instructions
Be sure to switch off the power supply before replacing or welding any components or inserting/plugging in connection wire Anti static measures to be taken (throughout the entire production process!): a) Do not touch here and there by hand at will; b) Be sure to use anti static electric iron; c) It’s a must for the welder to wear anti static gloves. Please refer to the detailed list before replacing components that have special safety requirements. Do not change the specs and type at will.
2. Test equipment
VG-848 (VGA, YPbPr signal generator) VG-849 (HDMI digital video signal generator) CA210 (color analyzer)
3 Alignment flow
3.1 Voltage of power supply test
According to the wiring specified by Product Specification, connect power board, main/data processing board, IR/light sensor board, key board and backlight board correctly, then switch on main power and press key “
” to turn on the TV set.
a) Test each pin voltage of socket X401 (< 26” models) and 13-pin power socket X601 ( 26”
models) in turn, please refer voltage of CCFL to Table 1, refer voltage of LED to Table 2:
Pin 1 2 3 4 5 6
Vol. 2.5 V 0 5 V±5% 0 5 V±5% N.C. 0 12 V±5% 0 2.0 V 2.5 V
Table 1 Each pin voltage of 13-pin power socket for CCFL models
78 910
11 12 13
Table 2 Each pin voltage of 13-pin power socket for LED models
1
Pin 1 2 3
Vol. 2.5 V 2.0 V 0 12 V±5% 0 N.C. 5 V±5% 0 5 V±5% 0 2.5 V
b) Test each pin voltage of 5-pin power socket X606 in turn ( 26” models), please refer voltage
to Table 3:
Pin
Vol. 24 V±5% 0
Table 3 Each pin voltage of 5-pin power socket
12 345
45 67
8 9
0
11
1
13
2
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3.2 Alignment flow chart shown as Fig. 1
Check if EDID, HDCP KEY, FLASH have been burned?
Combination alignment for general assembly
Connect to central signal source, check if TV functions are normal-omitted channel, analog
parameters control, etc.? Check if the output of earphones and speakers are normal?
Input composite AV signal, check if AV functions are normal?
Input component signal YPbPr, check if YPbPr functions are normal?
Input RGB signal, check if display and other functions are normal - analog parameters control, H/V center, etc.?
Input digital HDMI signal, check if display and other functions are
normal - analog parameters control, H/V center, etc.?
Insert USBcheck its functions.
Other functions checkup, such as LCN, OTA, etc.
White balance alignment
Setup before shipment
Accessories checkup and packing
Fig. 1 Alignment flow chart
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4 Alignment instructions
4.1 Unit adjustment
4.1.1 According to the wiring specified by Product Specification, connect power board, main/data processing board, IR/light sensor board, key board and backlight board correctly, then switch on main power and press key “
4.1.2 Using method of factory menu
a) Press key “SOURCE” first, then press keys “2, 5, 8, 0” in turn to enter into initial factory
menu;
b) Press keys “” and “” to move cursor to the item of factory menu;
c) Press keys “” and “” to change the value when cursor is moved onto one item;
d) Press key “OK” to enter into the inferior factory menu from current menu page;
e) Press key “MENU” to exit current menu to its superior factory menu;
f) Press key EXIT” to exit factory menu in any case;
g) Factory menu item: ADC ADJUST, for ADC calibration of RGB and YP
h) Factory menu item: W/B ADJUST, for white balance adjustment;
i) Factory menu item: POWER Mode, for setting power-on mode; the default setting is
“Standby” mode unless specified by customer;
Standby: TV set will be in “standby” mode after power-on;
MEM: TV set will keep states before last power-off;
ForceOn: TV set will turn on automatically; it also can be used as aging mode at factory;
j) Factory menu item: Other Setting->ISP Mode, the item will not be kept in memory, that is, it
will be always in “OFF” mode after turning on again;
ON”: Upgrading unit software through D-SUB port while connecting to ISP device;
OFF”: Normal DDC functions of D-SUB port will recover;
k) Factory menu item: EEPROM Init, for factory and customer data initialization; TV set will
reset and initial guiding interface will display after executing the item;
l) Factory menu item: Fac. Channel Preset., for factory channels presetting; it is necessary to
connect to central signal source before operating the item; now digital frequency of central signal CH28(529.5 MHz)and CH33(564.5 MHz)are distributed to Australia programs DVB-T; original
preset digital programs will not change along with the modification of central signal, so please
operate relevant item of menu “Channel” to search programs;
m) Factory menu item: Shipment, all analog & digital programs for factory adjustment will be
cleared out first, then customer channels will be preset according to order requirements; the item
must be executed before shipment to clear out channels for factory adjustment;
n) Factory menu item: Other Setting->MST DEBUG, default setting is “OFF”, it will not be kept
in memory, that is, it will always in “OFF” mode after turning on TV set again;
OFF”: RS232 functions of some engineering machines can match design specifications;
ON”: It is convenient for design tools to debug the software;
o) Factory menu item: Backlight, for adjusting brightness of backlight; test voltage of 13-pin
power socket while adjusting the item to make it greater than PWM voltage corresponding to
mixture brightness described by panel specification; the item need not adjustment for it has been
preset by software;
p) Factory menu item: Other Setting->SSC ADJUST, for expanded spectrum adjustment; the
item need not adjustment for it has been preset by software;
” to turn on the TV set, check if the display is normal.
BPR
;
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q) Factory menu item: Other Setting->AUDIO Curve Setting, for sound curve adjustment; if
without special customer requirements, the item need not adjustment commonly for it has been
preset by software;
r) Factory menu item: Software Update, for software upgrade from USB port; at any channel,
insert USB memory device, select option “YES”, software will auto-search file “MERGE.bin” in
USB memory device to begin upgrade; please execute item “EEPROM Init” before adjustment
2
again, for old data still remain in E
4.1.3 ADC calibration of analog component YPbPr
a) Switch to analog component YPbPr channel;
b) Press key “SOURCE”, then press keys “2, 5, 8, 0” in turn to enter into initial factory menu;
c) Move cursor to item “ADC ADJUST” and press key “OK” to enter into inferior factory menu; d) Input analog component Y/Pb/Pr signalVG848 Timing 972(1080i), Pattern 918(8 Color & 16
Grey)); move cursor to item “MODE,press keys “▲” and “” to select item “YPbPrthen
move cursor to item “AUTO ADC” and press key “OK” to begin auto-adjustment until prompt
Success” displays which means successful auto-calibration;
4.1.4 ADC calibration of analog RGB
a) Switch to analog RGB channel;
b) Press key “SOURCE”, then press keys “2, 5, 8, 0” in turn to enter into initial factory menu;
c) Move cursor to item “ADC ADJUST” and press key “OK” to enter into inferior factory menu; d) Input analog RGB signalVG848: Timing 8561024×768/60 Hz, Pattern 914(Color Temp.));
move cursor to item “MODE ”press keys “” and “” to select item “RGB”then move cursor
to item “AUTO ADC” and press key “OK” to begin auto-adjustment until prompt “Success”
displays which means successful auto-calibration.
4.2 White balance adjustment”
Unless specified by customer: a)
26” models:
Default color temperature “Cool” is 10000K and its chromatic coordinates is (280, 288); color
temperature “Normal” is 8000K and its chromatic coordinates is (295, 305); color temperature
Warm” is 6500K and its chromatic coordinates is (323, 329);
b) 26” models:
Default color temperature “Cool” is 12000K and its chromatic coordinates is (272, 278); color
temperature “Normal” is 9300K and its chromatic coordinates is (285, 293); color temperature
Warm” is 6500K and its chromatic coordinates is (323, 329);
4.3 Adjustment procedure
TV set should be working over 30 mins to be in stabler state before white balance adjustment; Use
white balance apparatus CA-210 and switch to its BBY channel;
a) Switch to HDMI1channel;
b) Press key “SOURCE”, then press keys “2, 5, 8, 0” in turn to enter into initial factory menu;
c) Move cursor to item “W/B ADJUST” and press key “OK” to enter into inferior factory menu; d) Input HDMI signal (VG-848 Timing:856(1024×768/60 Hz)Pattern:921(Gray 16 step(H)); move
cursor to item “MODE”, press keys “” and “” to select item “HDMI1” or other HDMI channels,
then move cursor to item “Tem per..
e) Fix item “G-GAIN”, adjust items “R-GAIN, B-GAIN” to set chromatic coordinates of 13
the value of temperature “Normal”;
PROM after software upgrade.
” and press keys “” and “” to select item “Normal”;
th
scale as
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f) Fix item “G-OFFSET”, adjust items “R-OFFSET, B-OFFSET” to set chromatic coordinates of 4
th
scale as the value of temperature “Normal”;
g) During temperature “Normal” adjustment , make sure that chromatic coordinates errors of bright
scale are (x±10, y±15) and chromatic coordinates errors of dark scale are (x±10,y±25);
h) Move cursor to item “COPY ALL” again to copy data of white balance to other channels;
i) Check if chromatic coordinates of “Cool” and “Warm” meet the requirements or not, if not, adjust
items “R-GAIN/B-GAIN/R-OFFSET/B-OFFSET” to meet them:
Cool”: chromatic coordinates errors of bright scale are (x±5, y±15), chromatic coordinates
errors of dark scale are (x±8, y±30);
Warm”: chromatic coordinates errors of bright & dark scales are both (x±10, y±10);
j) Check if chromatic coordinates of other channels meet the requirements, if not, adjust them
respectively;
k) Check white balance of each channel by eye, check if the picture is normal;
l) Please refer to the adjusting rules as follows:
B Gun: coordinates of X and Y will increase when B gun is adjusted downwards;
coordinates of X and Y will decrease when B gun is adjusted upwards;
R Gun: adjusting R gun will effect coordinate of X, and value of Lv slightly;
coordinate of X will increase when R gun is adjusted upwards;
coordinate of X will decrease when R gun is adjusted downwards;
G Gun: adjusting G gun will effect coordinate of Y, and value of Lv greatly;
coordinate of Y will increase when G gun is adjusted upwards;
coordinate of Y will decrease when G gun is adjusted downwards.
5 Functions checkup
5.1 Analog & digital TV functions
Input central signal to RF port, enter into menu “CHANNEL”, then search channels automatically,
check if there is any omitted channel, check if the output of speakers and the picture are normal.
5.2 Composite video of AV port
Input composite video signal to AV port, check if the picture and the sound are normal under the
circumstances of power on/off, switching channel and format, etc.
5.3 Analog component YPbPr/YCbCr port
Input analog YP
signal from VG848 signal generator with YPBPR formats listed as Table 4
BPR
respectively, check if the picture and the sound are normal under the circumstances of power-on/off,
switching channel and format, etc.
Table 4 YP
No.
1 720×480 15.734/15.75 59.94/60 13.5/13.514
2 720×576 15.625 50 13.5 576i (PAL, PAL-N, SECAM)
3 720×480 31.469/31.5 59.94/60 27/27.027 480p
4 720×576 31.25 50 27 576p
5 1280×720 37.5 50 74.25 720p (50p)
6 1280×720 44.955/45 59.94/60 74.176/74.25 720p (59.94p/60p)
Definition
H. - fre.(kHz) V. – fre.(Hz)
signal formats
BPR
Dot pulse fre.
MHz
Note
480i
(NTSC, NTSC4.43,PAL60,PAL-M)
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7 1920×1080 28.125 50 74.25 1080i (50i)
8 1920×1080 33.75 59.94/60 74.176/74.25 1080i (59.94i/60i)
9 1920×1080 26.973 23.976 74.176 1080p (23.97p)
10 1920×1080 27 24 74.25 1080p (24p)
11 1920×1080 28.125 25 74.25 1080p (25p)
12 1920×1080 33.716 29.97 74.176 1080p (29.97p)
13 1920×1080 33.75 30 74.25 1080p (30p)
14 1920×1080 56.25 50 148.5 1080p (50p)
15 1920×1080 67.432/67.5 59.94/60 148.35/148.5 1080p (59.94p/60p)
5.4 Analog R, G, B port
Input analog RGB signal from VG-848 signal generator to VGA port with VGA signal formats listed in
Table 5 respectively, check if the display and the sound are normal under the circumstances of
power-on/off, switching channel and format, etc. if there is any H/V offset, enter into main menu and select
items “PICTURE”->“Screen”->“Auto Ajust” in turn to make calibration automatically;
Table 5 Analog RGB signal formats
No. Definition
1 640×480 31.469 59.94 25.175 IBM
2 720×400 31.469 70.086 28.322 IBM
3 640×480 37.861 72.809 31.5 VESA
4 640×480 37.5 75 31.5 VESA
5 800×600 35.156 56.25 36 VESA
6 800×600 37.879 60.317 40 VESA
7 800×600 48.077 72.188 50 VESA
8 800×600 46.875 75 49.5 VESA
9 1024×768 48.363 60.004 65 VESA
10 1024×768 56.476 70.069 75 VESA
11 1024×768 60.023 75.029 78.75 VESA
12 1152×864 67.5 75 108 VESA
13 1280×960 60 60 108 VESA
14 1280×1024 63.98 60.02 108 VESA
15 1280×1024 80 75 135 SXGA
16 1360×768 47.7 60 85.5 WXGA
17 1440×900 55.9 60 106.5 WXGA+
18 1400×1050 65.22 60 122.61 SXGA+
19 1680×1050 65.3 60 146.25 WSXGA+
20 1920×1080 67.5 60 148.5
H. - fre.(kHz) V. – fre.(Hz) Dot pulse fre.(MHz)
5.5 Digital HDMI port
Input HDMI signal from VG849 signal generator with the formats listed in Table 6 respectively, check
if the display and the sound (32 kHz, 44.1 kHz, 48 kHz) are normal under the circumstances of power-on,
switching channels or formats, etc.
Note
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Table 6 Digital HDMI signal format
No. Definition
1 640×480 31.469/31.5 59.94/60 25.175/25.2 640×480p@59.94/60 Hz
2 720×480 31.469/31.5 59.94/60 27/27.027 720×480p@59.94/60 Hz,4:3/16:9
3 1280×720 44.955/45 59.94/60 74.176/74.25 1280×720p@59.94/60 Hz
4 1920×1080 33.716/33.75 59.94/60 74.176/74.25 1920×1080i@59.94/60 Hz
5 720(1440)×480 15.734/15.75 59.94/60 27/27.027
6 720(1440)×240 15.734/15.75
7 (2880)×480 15.734/15.75 59.94/60 54/54.054 (2880)×480i@59.94/60 Hz,4:3/16:9
8 (2880)×240 15.734/15.75
9 1440×480 31.469/31.5 59.94/60 54/54.054 1440×480p@59.94/60 Hz,4:3/16:9
10 1920×1080 67.432/67.5 59.94/60
11 720×576 31.25 50 27 720×576p@50 Hz,4:3/16:9
12 1280×720 37.5 50 74.25 1280×720p@50 Hz
13 1920×1080 28.125 50 74.25 1920×1080i@50 Hz
14 720(1440)×576 15.625 50 27 720(1440)×576i@50 Hz,4:3/16:9
15 720(1440) ×288 15.625 Mode 1 49.761 27
16 (2880) ×576
17 (2880) ×288 15.625 Mode 1 49.761 54
18 1440×576
19 1920×1080 56.25 50 148.5 1920×1080p@50 Hz
20 1920×1080 26.973/27 23.97/24 74.176/74.25 1920×1080p@23.97/24 Hz
21 1920×1080 28.125 25 74.25 1920×1080p@25 Hz
22 1920×1080 33.716/33.75 29.97/30 74.176/74.25 1920×1080p@29.97/30 Hz
H. - fre.(kHz) V. – fre.(Hz)
Mode1 59.826/59.886
Mode 2 60.054/60.115
Mode 1 59.826/59.886
Mode 2 60.054/60.115
Mode 2 49.92
15.625
31.25
Mode 3 50.08
50 54
Mode 2 49.92
Mode 3 50.08
50 54
5.6 USB port
5.6.1 Media playing function
Insert USB memory containing files of picture, audio and video, check if the picture, the sound and
other functions are normal;
5.6.2 PVR function
Insert formatted USB memory containing recorded-program files, press key “Rec. List” to select and
play program, check if the picture, the sound and other functions are normal;
Dot pulse fre.
MHz
27/27.027
54/54.054 (2880)×240p@59.94/60 Hz,4:3/16:9
148.352/148.
5
(2880)×576i
@50
Hz,4:3/16:9
1440×576p
@50
Hz,4:3/16:9
Note
720(1440)×480i@59.94/60
Hz,4:3/16:9
720(1440)×240p@59.94/60
Hz,4:3/16:9
1920×1080p@59.94/60 Hz
720(1440)×288p@50 Hz,4:3/16:9
(2880)×288p@50 Hz,4:3/16:9
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5.7 MUSIC port
Input audio signal, check if the sound is normal;
5.8 Other functions checkup
a) Check if composite video out of AV port, digital audio port, earphone jack, etc., are normal;
b) Check if the functions of LCN, OTA are normal;
6 User menu setup before shipment
Enter into “LOCK” user menu, input initial password “0000”, select item “Restore Factory Default
and then press key “OK” to make setup before shipment;
a) Clear out information of all programs;
b) Clear out information of program-lock, favorite programs, etc.; c) Recover default analog parameters;
d) Set menu language as “English”;
e) Set power-on mode as “Standby”.
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Method of software upgrading instructions
Factory software burned instructions listed as Table 7
Table 7 Factory software burned instructions
Burned
before
SMT
Yes
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Yes
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Yes
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Yes Use ALL-100, etc.
Use ALL-100 with write-protect,
refer to Note 1 in detail.
Use ALL-100 with write-protect,
refer to Note 1 in detail.
Use ALL-100 with write-protect,
refer to Note 1 in detail.
Burning method
Model
<26”
CCFL
<26”
LED
26”
LED
Loc.
No.
N103 5272564002 EN25Q64-104HIP
N106
N301
N316
N305
N103 5272564002 EN25Q64-104HIP
N106
N301
N311
N305
N103 5272564002 EN25Q64-104HIP
N106
N302
N305
N316
N309
Part No. Part Type
5272404002
5272404005
5272402002
5272402003
5272402002
5272402003
5272404002
5272404005
5272402002
5272402003
5272402002
5272402003
5272404002
5272404005
5272402002
5272402003
5272402002
5272402003
AT24C04IV-10SU-2.7
IC_CAT24C04WI-GT3
AT24C02BN10SU-1.8
IC_CAT24C02WI
AT24C02BN10SU-1.8
IC_CAT24C02WI
AT24C04IV-10SU-2.7
IC_CAT24C04WI-GT3
AT24C02BN10SU-1.8
IC_CAT24C02WI
AT24C02BN10SU-1.8
IC_CAT24C02WI
AT24C04IV-10SU-2.7
IC_CAT24C04WI-GT3
AT24C02BN10SU-1.8
IC_CAT24C02WI
AT24C02BN10SU-1.8
IC_CAT24C02WI
Software
function
Main
program
HDCP
KEY
HDMI
EDID
VGA
EDID
Main
program
HDCP
KEY
HDMI
EDID
VGA
EDID
Main
program
HDCP
KEY
HDMI
EDID
VGA
EDID
Note 1: Method of write-protect setup: enter into burning interface of ALL-100, tick option “Config”,
press item “config Setting”, set option “Protect” as “All Protect”; make sure that option “Config
must be ticked before burning software and write-protect must be reset after ALL-100 burning
software is opened every time.
Note 2: Method of burning and upgrading software online by using ISP burning device:
a) For main board upgrade: connect 4-pin cable of ISP burning device to Debug port of main board
(<26”: X404, ≥26”: X604); for unit upgrade, connect both D-SUB ports of ISP burning device and
main board, enter into factory menu and set item “Other Settings->ISP Mode” as “ON”;
b) Using Mstar online burning program, enter into menu “Device”, tick option “WP Pin pull to high
during ISP” to ensure that hardware write-protect of Flash is removed and erasing process is
normal, please refer to Fig. 2;
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Fig. 2 Write-protect setup
c) Press menu “Connect”, a dialog box “Device Type is XXX (XXX is corresponding type of SPI
Flash)” will pop up, that is, connection has been successful, please refer to Fig. 3; if connection
is failed, press the first menu “Device” to select SPI Flash type manually, then press menu
Connect” again;
Fig. 3 Successful connection
d) Press menu “Read”, select the burning file, such as “MERGE.bin”, please refer to Fig. 4;
Fig. 4 Burning file
e) Press menu “Auto”, tick options “All chip”, “program” and relative option switches, please refer
to Fig.5, press key “Run” to begin burning;
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Fig. 5 Option switches
f) Burning process has two steps: Erase and Program; please refer to Fig. 6;
Fig. 6 Option switches
1) First, the step “Erasing…” will last for some time, or it is failed if it is passed by quickly,
please confirm procedure 2and begin burning process again;
2) Then the following step is “Programming…;
3) A prompt “Pass” will display at last;
g) A prompt “Pass” will display if burning process is successful, please refer to Fig. 7;
Fig. 7 Successful burning process
h) If there are other machines to be burned, remain ISP burning interface and repeat procedures
cto eonly;
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Note 3: Method of online burning and upgrade through USB:
a) Make sure that U disk is formatted as “FAT32”;
b) Copy firmware to U disk with name of “Merge.bin”;
c) Turn on the TV set, press key “SOURCE” first, then press keys “2, 5, 8, 0” in turn to enter into
initial factory menu at any channel;
d) Enter into factory menu, select item “Software Update”, press key “OK”, a prompt “Are you
sure?” will display, select option “Yes”, then software will auto-search file “MERGE.bin” in the
USB memory to begin upgrade, detailed upgrading processes are below:
1) Read data from USB memory, a prompt “Unknown image type” will display if upgrading file
is wrong;
2) If upgrading file is right, a prompt “Software upgrading...” and percent of upgrading
progress will display, while indicated light is twinkling at the same time;
3) The unit will restart after upgrading processes has completed;
e) Restart the unit, enter into factory menu, confirm software parameters - version and time, then
execute “EEPROM Init” to complete the whole upgrading processes;
f) USB burning method could not be sure to all kinds of U disks, so please try another U disk if one
is inapplicable.
Page 17
Working principle analysis of the unit
Signal Flow
1 PAL/SECAM signal flow
Send PAL/SECAM analog RF signal received from antenna to TUNER FT21XX which is controlled
2
by main chip MSD209GL through I
outputted after demodulation;
CVBS video signal is sent into main chip MSD209GL to be processed by modules of video decoding,
deinterlacing, video processing and zoom, then LVDS signal will be outputted to drive display panel;
SIF audio differential signal is sent into main chip MSD209GL to be demodulated to analog audio
signal, then it is sent to earphone amplifier BH3547F to be amplified after the processes of
preamplification, acoustic effect processing and volume control, and then it is divided into two, one is sent
to earphone jack, the other is sent to audio power amplifier TAS5711 (D class) to be amplified and then
drive speakers. 2 DVB-T signal flow
Send DVB-T digital RF signal received from antenna to TUNER FT21XX which is controlled by main
2
chip MSD209GL through I
C BUS; after down frequency conversion, differential IF signal will be inputted
into demodulator IC MSB1210 to be demodulated; then it will be sent to main chip MSD209GL with the
standard format of serial or parallel TS stream for demultiplexing and decoding;
C BUS; CVBS video signal and SIF audio differential signal will be
Page 18
Video route: digital video signal is sent into main chip MSD209GL for decoding and video processing
after demultiplexing, then LVDS signal will be outputted to drive display panel;
Audio route: digital audio signal will be sent into main chip MSD209GL for decoding and audio
processing after demultiplexing, then dual-sound-track analog audio signal (stereo) is sent to earphone
amplifier BH3547F to be amplified after the processes of preamplification, acoustic effect processing and
volume control by main chip MSD209GL, then one is sent to earphone jack, the other is sent to audio
power amplifier TAS5711 (D class) to be amplified and then drive speakers. 3 AV input signal flow
AV video signal is sent into main chip MSD209GL to be processed by modules of video decoding,
deinterlacing, video processing and zoom, then LVDS signal will be outputted to drive display panel;
AV audio signal is sent into main chip MSD209GL for acoustic effect processing and volume control
after the processing of voltage division, impendence matching and AC coupling, then it is sent to
earphone amplifier BH3547F to be amplified, one is sent to earphone jack, the other is sent to audio
power amplifier TDA7266SA (AB class) to be amplified and then drive speakers. 4 D-SUB/YPbPr input signal flow
D-SUB/YPbPr video signal is sent into main chip MSD209GL to be processed by modules of A/D
conversion, video decoding, deinterlacing, video processing and zoom, then LVDS signal will be
outputted to drive display panel;
D-SUB/YPbPr audio signal is sent into main chip MSD209GL for acoustic effect processing and
volume control after the processing of voltage division, impendence matching and AC coupling, then it is
sent to earphone amplifier BH3547F to be amplified, one is sent to earphone jack, the other is sent to
audio power amplifier TAS5711 (D class) to be amplified and then drive speakers. 5 HDMI input signal flow
HDMI video signal is sent into main chip MSD209GL to be processed by modules of video decoding,
video processing and zoom, then LVDS signal will be outputted to drive display panel;
HDMI audio signal is sent into main chip MSD209GL for audio processing, preamplification, acoustic
effect processing and volume control, then it is sent to earphone amplifier BH3547F to be amplified, one
is sent to earphone jack, the other is sent to audio power amplifier TAS5711 (D class) to be amplified and
then drive speakers. 6 AV input signal flow
Current active AV video signal is sent into main chip MSD209GL for video coding, then it is amplified
by peripheral video amplified circuits and then outputted;
Current active AV audio signal is sent into main chip MSD209GL for preamplification, acoustic effect
processing and volume control, then it is sent to operation amplifier to be amplified and then outputted. 7 SPDIF input signal flow
Current active AV audio signal is sent into main chip MSD209GL for acoustic effect processing,
volume control and digital audio coding, then it is outputted. 8 MEMC input signal flow
Current active AV video signal is sent into main chip MSD209GL for video coding, then LVDS signal
is outputted to MEMC chip 6M20S for frame insertion processing, and then frequency multiplication LVDS
signal is outputted to drive display panel.
Page 19
Block diagram
Page 20
IC Block Diagram and Instruction
1 MSD209GL-LF
GENERAL DESCRIPTION
The MSD209GL is a highly integrated controller IC for LCD/PDP DTV applications with resolutions up to
full-HD(1920 x 1080). It is configured with an integrated triple-ADC/PLL, a multi-standard TV video and
audio decoder, a motion adaptive video de-interlacer, a scaling engine, the MStarACE-3 color engine, an
advanced 2D graphics engine, a transport processor, a high-definition (HD) MPEG video decoder, a
high-definition (HD) H.264 video decoder, a RealVideo decoder, a JPEG video decoder, a MPEG-4
decoder, and a 24-bit DSP for MPEG audio decoding, a DVI/HDCP/HDMI receiver, and a peripheral
control unit providing a variety of HDTV control functions.
For digital TV application, the MSD209GL comprises an MPEG-2 transport processor with advanced
section filtering capability, an MPEG-2 (MP@HL profile) video decoder, a MPEG-4 decoder, a H.264
video decoder, and an audio DSP decoder for MPEG audio streams, MPEG layer I and II digital audio
decoder with analog audio outputs that are designed to support existing and future DVB-T programs while
handling conditional access. Furthermore,it is also possible to decode JPEG, RealVideo streams, and
MP3 formats from external sources such as USB interface.
For analog TV, the MSD209GL includes NTSC/PAL/SECAM multi-standard video decoder comprising a
3D motion adaptive comb filter and time-based correction, and a NICAM/A2 audio decoder to support
worldwide television standards. The MSD209GL is also configured with a VBI processor to decode digital
information such as Close Caption/V-chip/teletext/WSS/CGMS-A/VPS. In addition, the MStar advanced
LCD TV processor enhances video quality, motion adaptive de-interlacer, picture quality adjustment units,
and MStarACE-3 color engine.
With USB 2.0 host controllers, UART, IR, SPI, I2C, and PWM, the MSD209GL fulfills all requirements in
advanced DTV sets. To reduce system costs, the MSD209GL also integrates intelligent power
management control capability for green-mode requirements and spread-spectrum support for EMI
management.
MSD209GL Features
Twin-turbo 8051 Micro-controller
z Twin-turbo 8051 MCU
z Interrupt controller
z Supports ISP
z Two full duplex UARTs
z DMA engine to speed up large data movement
Transport Stream De-multiplexer
z One external TS input and one internal TS data path
z Supports serial TS interface, with or without sync signal
z Maximum TS data rate is 104 Mb/sec
z 32 general purpose PID filters and section filters for each transport stream de-multiplexer
z One video PES and one audio PES channel
z Supports DVB subtitle and digital teletext
Page 21
z Supports additional audio/video/PCR filters
z Supports TS DMA channel for time-shift
z Supports AES encryption/decryption
MPEG-2 A/V Decoder
z ISO/IEC 13818-2 MPEG-2 video MP@HL
z Automatic frame rate conversion
z Supports resolution in HDTV (1080i, 720p) and SDTV
z Supports MPEG-1, MPEG-2 (Layer I/II), Dolby Digital (AC-3), and AAC audio decoding
z Optionally Supports Dolby Digital Plus (E-AC-3) decoding, and Dolby Digital Compatible Output
(DDCO) for HE-AAC to DD transcoding
MPEG-4 Video Decoder
z ISO/IEC 14496-2 MPEG-4 ASP video decoding
z Supports resolution in HDTV (1080p@30fps)
3
z Supports DivX
Home Theater or HD profile
H.264 Decoder
z ITU-T H.264, ISO/IEC 14496-10 (main and high
z profile up to level 4.0) video decoding
z Supports resolutions for all DVB, ATSC, HDTV,DVD and VCD
z Supports resolution up to 1080p@30fps
z Supports CABAC and CAVLC stream types
z Processing of ES and PES streams, extractions and provision of time stamps
RealMedia Decoder
z Supports maximum resolution up to 720p@30fps
z Supports RV8, RV9, RV10, RA8-LBR and HE-AAC decoders
z Supports file formats with RM and RMVB
z Supports Picture Re-sampling
z Supports in-loop de-block for B-frame
Hardware JPEG
z Supports sequential mode, single scan
z Supports both color and grayscale picture
z Operates in scan unit; hardware decoder will handle the bit stream after scan header
z Supports programmable region of interest (ROI)
z Supports format: 422/411/420/444/422T
z Decoded picture will be stored in DRAM with UYVY format
z Supports scaling down ratio: 1/2, 1/4, 1/8,applied to height and width simultaneously
z Supports picture rotation
NTSC/PAL/SECAM Video Decoder
z Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B,D, G, H, M, N, I, Nc), and SECAM
z Automatic TV standard detection
z Motion adaptive 3D comb filter for NTSC/PAL
z Seven configurable CVBS & Y/C S-video inputs
z Supports Teletext level-1.5, Closed Caption(analog CC 608/ analog CC 708/digital CC 608/digital CC
708), V-chip and SCTE
z Two CVBS video outputs
Page 22
Multi-Standard TV Sound Processor
z Supports BTSC/A2/EIA-J demodulation in NTSC and A2/NICAM/FM/AM demodulation in PAL
z Supports MTS Mode Mono/Stereo/SAP in BTSC/EIA-J and Mono/Stereo/Dual in A2/NICAM
z L/R audio line-in x5 and SIF audio input
z L/R speaker and 2 additional L/R audio line-out
z Built-in audio sampling rate conversion (SRC)
z Built-in audio ADC
z Built-in audio DAC’s
z Audio processing for loudspeaker channel,including volume, balance, mute, tone, EQ,virtual
stereo/surround, and treble/bass
z Advanced soundOptional available (Dolby, SRS,BBE… etc)
z Supports digital audio format decoding:
¾ MPEG-1, MPEG-2 (Layer I/II), MP3, AC-3 (Dolby Digital), AAC-LC, WMA
¾ E-AC-3 (Dolby Digital Plus) decoding and E-AC-3 to AC-3 conversion at the same time
Digital Audio Interface
2
S digital audio input & output
z I
z S/PDIF digital audio input & output
z HDMI audio channel processing capability
z Programmable delay for audio/video synchronization
Analog RGB Compliant Input Ports
z Three analog ports support up to 1080P
z Supports PC RGB input up to SXGA@75Hz
z Supports HDTV RGB/YPbPr/YCbCr
z Supports Composite Sync and SOG (Sync-on-Green) separator
z Automatic color calibration
Auto-Configuration/Auto-Detection
z Auto input signal format and mode detection
z Auto-tuning function including phasing,positioning, offset, gain, and jitter detection
z Sync Detection for H/V Sync
DVI/HDCP/HDMI Compliant Input Port
z Three DVI/HDCP/HDMI input ports support up to 225MHz @ 1080P 60Hz with 12-bit deep-color
resolution
z Single link on-chip DVI 1.0 compliant receiver
z High-bandwidth Digital Content Protection
z (HDCP) 1.1 compliant receiver
z High Definition Multimedia Interface (HDMI) 1.3 compliant receiver with CEC (Consumer Electronics
Control) support
z Long-cable tolerant robust receiving
MACE-4, MStar Advanced Color Engine year 2009 Edition, provides superb visual quality for wider
gamut FHD panels
z Fully programmable shrink/zoom capabilities
z Panorama and various scaling supports
z 3D motion adaptive video de-interlacers with de-flickering and edge smoothing functions
z Automatic 3:2 pull-down & 2:2 pull-down detection and recovery
Page 23
z Automatic picture enhancement:
¾ Dynamic brilliant and fresh color
¾ Dynamic Blue Stretch
¾ Intensified contrast and details
¾ Dynamic Vivid Skin
¾ Dynamic sharpened Luma/Chroma edges
¾ Enhanced depth of field perception
¾ Accurate and independent color control
z Supports sRGB and xvYCC color processing
z Supports HDMI 1.3 deep color format
z Supports linear/nonlinear color mapping for wider gamut panels
z 10-bit internal data processing
z Programmable 12-bit RGB gamma CLUT
z 3D video noise reduction
z MPEG artifact removal including de-blocking and mosquito noise reduction
z Frame rate conversion
Output Interface
z Supports up to 10-bit dual LVDS full-HD (1920 x 1080) panel interface
z Supports 2 data output formats: Thine & TI data mappings
z Compatible with TIA/EIA
z With 6/8 bits optional dithered output
z Spread spectrum output frequency for EMI suppression
CVBS Video Output
z Supports CVBS bypass output
z Built-in video encoder for encoding digital video into CVBS output
2D Graphics Engine
z Point draw, line draw, rectangle draw/fill and text draw
z BitBlt and stretch BitBlt
z Raster Operation (ROP)
Miscellaneous
z DRAM controller to support 16-bit DDR2 interface
z SPI serial interface for external SPI flash
z High efficiency power control module
z Two ports of USB 2.0 host controller with the flexibility for connecting external storage devices
z 256-pin LQFP package
z Operating at 1.26V (core), 1.8V (DDR2), and 3.3V (I/O and analog)
Page 24
2 MSB1210-LF
Integrated DVBT receiver
z Compliant with DVBT(ETSI ET 300 744)
z Supports 2K, 4K, 8K and 1/4, 1/8, 1/16, 1/32 guard interval (GI) and hierarchical,non-hierarchical
modes
z Nordig Unified 1.0.3, D-Book, E-Book,IEC62002 (MBRAI) compliant
z Dual 11-bit ADCs: accept IF, low IF, zero-IF inputs in 5, 6, 7, 8MHz channel bandwidths
z All digital demodulation and timing recovery loops
z CCI and ACI rejection capability
z Independent ADC controls (for IF and RF)
z Configurable parallel/serial MPEG-2 transport stream interface
z Impulse-Noise suppression
z Advanced performance for SFN networks
z Supports single or dual AGC control
z Direct 36MHz, 44MHz IF sampling scheme from tuner
z Full-digital frequency offset recovery with wide acquisition range (+/-500kHz)
z IQ imbalance compensation for ZIF
Integrated VIF receiver
z Multi-standard analog TV receiver applications
z Digital low IF architecture
z Maximum IF gain of 48dB
z Programmable TOP to accommodate different tuner gain to optimize noise and linearity performance
Page 25
Miscellaneous
z Embedded 8-bit MCU
z Clock generation from a single 20.48/ 28.8MHz crystal
z Supports I2C interface with bypass mode
z Operating voltage: 3.3V and 1.2V
z 48-pin LQFP package
3 FT21XX
FT 21XX are newly developed low-cost Half-NIM modules designed for both digital (DVB-T/C) and analog
TV reception in compliance with the European ATV standards for analogue, as well as with the terrestrial
standard ETS 300 744 and cable standard ETS 300429 for digital. It consists of a 3-band RF tuner, which
receives RF signal and down-converts it to an IF frequency of 36MHz for digital and 38.9MHz for analog
IF. The analogue IF output can directly drive a SAW filter. A digital IF Stage, which consists of one SAW
filter & gaincontrollable IF that offers a sufficient output level to be connected directly to an A/D converter.
Page 26
4 TAS5711
• Audio Input/Output –20-W Into an 8- Load From an 18-V Supply
–Wide PVDD Range, From 8 V to 26 V
–Efficient Class-D Operation Eliminates Need for Heatsinks
–One Serial Audio Input (Two Audio Channels)
–2.1 Mode (2 SE + 1 BTL)
–2.0 Mode (2 BTL) –Single-Filter PBTL Mode Support –I2C Address Selection Pin (Chip Select)
–Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S) • Audio/PWM Processing
–Independent Channel Volume Controls With 24-dB to Mute –Separate Dynamic Range Control for
Satellite and Subchannels
–21 Programmable Biquads for Speaker EQ and Other Audio Processing Features
–Programmable Coefficients for DRC Filters
–DC Blocking Filters
–Support for 3D Effects
• General Features
–Serial Control Interface Operational Without MCLK
–Factory-Trimmed Internal Oscillator for Automatic Rate Detection –Surface Mount, 48-Pin, 7-mm ×
7-mm HTQFP Package
–Thermal and Short-Circuit Protection
–Support for AD or BD Mode
• Benefits
–Up to 90% Efficient
–AD and BD Filter Mode Support
–SNR: 106 dB, A-Weighted
–EQ: Speaker Equalization Improves Audio
Performance
–DRC: Dynamic Range Compression. Can
Be Used As Power Limiter. Enables
Speaker Protection, Easy Listening, Night-Mode Listening. –Separate DRC for Satellite and Subchannels
–Autobank Switching: Preload Coefficients for Different Sample Rates. No Need to Write new Coefficients
to the Part WhenSample Rate Changes
–Autodetect: Automatically Detects Sample-Rate Changes. No Need for External Microprocessor
Intervention
• Requires Only 3.3 V and PVDD
Page 27
5 MST6M20S
Input Interface
z Single/dual channel 8/10 bit LVDS input
z Each input LVDS channel frequency supports up to 100 MHz
z One channel input supports up to WXGA(1366x768)
z Two channel inputs support up to Full HD(1920x1080)
z Input mode supports JEIDA / VESA mode
z Image capturing window is defined by DE signal
z Supports flexible aging mode
Output Interface
z Single/dual/quad link 8/10 bit LVDS output
z Each output LVDS channel frequency supports up to 90 MHz
z Supports two channel LVDS up to WXGA (1366x768) @ 120Hz
z Supports four channel LVDS up to Full HD (1920x1080) @ 120Hz
Page 28
z Supports 2/4 phase output
z Supports left-right screen partition
z Supports TH/TI format
z Supports dithering options
z Spread spectrum output frequency for EMI suppression
Video Processing
z MFCPRO (Motion Frame Conversion Professional) supports:
z Wider searching range
z Refined judder-free motion video and film
z Motion blur elimination to improve MPRT
z Advanced halo and artifact elimination
z Output frame rate 50/60/100/120 f/sec
z Supports MFCPRO under Full-HD resolution
z Automatic 2:2 / 3:2 film mode detection
z Supports 2:2 / 3:2 pull-down reverse processing
z Support 1080p 24fps 5:5 pull-down
z Supports 10-bit 4:4:4 processing
z Brightness contrast saturation adjustment
z White balance adjustment
z Supports Gamma correction per bit and FRC function for 16.7M color selection
z Supports black insertion
z Supports OSD area handling
z Splits screen demo for motion frame conversion
Miscellaneous
z Embedded 8-bit Microcontroller
z Supports 16-bit DDR2 interface
z Supports I2C, SPI, PWM, and GPIOs
z Supports booting from internal SRAM, external EEPROM, and SPI flash
z 216-pin LQFP package
Page 29
WIRING DIAGRAM
Board
Backlight Board
Panel
Sound Box (Bass)
Power Board
Board
Amp. Power
Sound Box
Key
IR / Light sensor
Bass
Power
Main Board
Debug
Key Board
Power Switch
Sound Box
IR / Light sencor Board
Page 30
Troubleshooting guide LED-32XR10F
1 No Backlight
Page 31
2 No Picture, but backlight is normal.
Page 32
3 No sound, but picture is normal.
Check if voltage of N607­2#/3#/34#/35# is +24V?
Check if voltage of N607­19# / 25# is high level?
Yes No
Check audio output circuits of main chip
Yes
Check if N607-12# / 20#-22# has input signal?
Yes
Check mute circuits of power amplifier
No
Check peripheral
circuits of power
No
Check +24V of power board and its related circuits.
amplifier.
Page 33
ABCDEFGH
1
AT24LC32A/SN
1
A0
2
A1
3
A2 GND4SDA
+3.3V
CAT24C04WI
R156
1
10K
NC1
2
A1
3
A2 Vss4SDA
2
3
4
5
6
N105
N106
Vcc
SCL
Vcc
SCL
+3.3V
R155
8
10K
R154 33
7
WP
6 5
C172 100n
GND-D
+3.3V
8 7
WP
6 5
C173 100n
GND-D
GND-D
GND-D
R153 33 R152 33
R159
10K
R158 33 R157 33
R160
0
HDMI1-RXC-003:A2 HDMI1-RXC+003:A2 HDMI1-RX0-003:A2 HDMI1-RX0+003:A2
HDMI1-HP-003:B3 HDMI1-RX1-003:A2 HDMI1-RX1+003:A2
HDMI1-RX2-003:A2 HDMI1-RX2+003:A2 HDMI2-RXC-003:A4 HDMI2-RXC+003:A4 HDMI2-RX0-003:A4 HDMI2-RX0+003:A4
HDMI2-RX1-003:A3 HDMI2-RX1+003:A3 HDMI2-RX2-003:A3 HDMI2-RX2+003:A3
HDMI2-HP-003:B4
VGA-B_IN003:A6
VGA-SOG_IN003:A6
VGA-G_IN003:A6 VGA-R_IN003:A6
YPBPR-PB_IN003:D1
YPBPR-Y_IN003:D1
YPBPR-SOG_IN003:D1
YPBPR-PR_IN003:D1
CVBS1_IN003:D3
ATV-CVBS+002:A3
ATV-CVBS-002:A3
CVBS_OUT003:D4
ATV-SIF+002:A2 ATV-SIF-002:A3
E2PWP-
SCL SDA
SCL SDA
+3.3V-DVI
R104 47
R105 47
R106 47
R107 47
BG1608B121
GND-D
APX810-29SAG-7
HDMI1-RXC­HDMI1-RXC+ HDMI1-RX0­HDMI1-RX0+
HDMI1-HP­HDMI1-RX1­HDMI1-RX1+
+3.3V-DVI
HDMI1-RX2­HDMI1-RX2+ HDMI2-RXC­HDMI2-RXC+ HDMI2-RX0­HDMI2-RX0+
+3.3V-ADC
HDMI2-RX1­HDMI2-RX1+ HDMI2-RX2­HDMI2-RX2+
HDMI2-HP-
R103 390 C133 100n C134 100n C135 100n
VGA-B_IN
VGA-SOG_IN
GND-D
VGA-G_IN VGA-R_IN
C136 47n
YPBPR-PB_IN
C137 47n
YPBPR-Y_IN
YPBPR-SOG_IN C138 47n
YPBPR-PR_IN
+3.3V-ADC
CVBS1_IN
C139 47n
ATV-CVBS+
ATV-CVBS-
+3.3V-ADC
CVBS_OUT C140 10u C141 100n
ATV-SIF+
ATV-SIF-
GND-D
+1.2V-VDDC
C143 100n
C144 10u
L111
C145 100n
C146 10u
IR 005:C2
VGA-VSYNC 003:A5
HDMI-CEC 003:A2;003:A4;003:G2
+3.3V-S
Vcc
RESET
GND
GND-D
1
B_RXCN
2
B_RXCP
3
B_RX0N
4
B_RX0P
5
HOTPLUGB
6
B_RX1N
7
B_RX1P
8
AVDD_338
9
RXB2N
10
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
AVDD_33_15
16
RXA1N
17
RXA1P
18
RXA2N
19
RXA2P
20
HOTPLUGA
21
REXT
22
VCLAMP
23
REFP
24
REFM
25
BIN1
26
SOGIN1
27
GIN1P
28
RIN1P
29
BIN0M
30
BIN0P
31
GINM
32
GIN0P
33
SOGIN0
34
RIN0M
35
RIN0P
36
AVDD_33_36
37
BIN2P
38
GIN2P
39
SOGIN2
40
RIN2P
41
CVBS6P
42
CVBS5P
43
CVBS4P
44
CVBS3P
45
CVBS2P
46
CVBS1P
47
VCOM1
48
CVBS0
49
VCOM0
50
AVDD_33_50
51
CVBSOUT1
52
CVBSOUT0
53
TAGC
54
VR27
55
SIF0P
56
SIF0M
57
VIFM
58
VIFP
59
AVSS_VIF
60
AVDD_VIF
61
VDDC_61
62
AUVRM
63
AUOUTL1
64
AUOUTR1
R131
10K
C154
1n
257
CVBS-LOUT003:D6 CVBS-ROUT003:D5
N102
C153 100n
1%
VGA-HSYNC 003:A5
R130
10K
VGA-HSYNC
VGA-VSYNC
R129 33
253
254
255CE256
VSYNC1
HWRESET
251
252
VSYNC0
HSYNC1
IR
ISP_EN
249
250
IRIN
HSYNC0
RESET
PAD
HDMI-in x2
RGB-in x3
CVBS-in x7
(incl. S-video)
CVBS-O x2
SIF x1
VIF x1(NC)
Linx5, Lout x3
AUL066AUR067AUL168AUR169AUL270AUR271AUL372AUR373AUCOM74AUL475AUR4
65
VGA-LIN
VGA-RIN
VGA-LIN003:A5
YPBPR-LIN
YPBPR-RIN
VGA-RIN003:A5
YPBPR-LIN003:D2
YPBPR-RIN003:D2
R109
13K
CVBS1-RIN
CVBS1-LIN
CVBS1-RIN003:D4
CVBS1-LIN003:D3
C147
22n
G101
PWR_SW 005:B2
UART-RXSTB 003:A1
ISP_EN 003:B5
12MHz
R128
1M
C152
33p
XTALO
XTALI
PWR_SW
246
247
GPIO135
GPIO138
245
XIN
244
XOUT
+3.3V-MPLL
243
UART-RXSTB
248
GPIO139
GPIO140
PM SAR
AUDIO,
AUOUTL280AUOUTR2
AUVRP77AUVAG78AVDD_AU
79
76
R108 100
R111
13K
GND-D
C148
22n
R110 100
+3.3V-AUSDM
CVBS-ROUT
CVBS-LOUT
GND-D
C142 100n
E2PWP-
+3.3V
KEY 005:C1
R127
10K
SDA
C151
SCL
33p
KEY
234
235
236
237
238
239
240
241
242
SAR0
SAR1
SAR2
SAR3
AVDD_MPLL
x4 SPI
PM_SPI_CK
PM_SPI_DI
PM_SPI_DO
PM_SPI_CZ
PM-
USB0_DP
USB
x1
I2C-S
DDCx2
AUOUTL082AUOUTR083VDDC_8384DDCA_CK85DDCA_DA86DDCDA_CK87DDCDA_DA88DDCDB_CK
81
UART-RX
R112 100
R114 100
+1.2V-VDDC
UART-RX
HPAMP-LIN
HPAMP-RIN
C149
R113
22n
13K
DDCDB_DA90GPIO2091VDDP_9192VDDC_9293UART2_RX94UART2_TX95DDCDC_CK96RXCCKN97RXCCKP98DDCDC_DA
89
UART-TX
HDMI1-SCL
HDMI2-SCL
HDMI2-SDA
HDMI1-SDA
UART-TX
HDMI1-SCL003:A2
HDMI1-SDA003:A2
HDMI2-SDA003:A4
HDMI2-SCL003:A4
003:A5;003:A1;005:D1
003:A5;003:A1;005:D1
C150
22n
I2S-SD 005:F4
I2S-SCK 005:F3
I2S-WS 005:F3
I2S-WS
+1.2V-VDDC
+3.3V-USB
I2S-SCK
223
224
225
226
VDDP_224
VDDC_225
I2S_OUT_WS
I2S_OUT_SD
I2S_OUT_BCK
I2S-MCLK 005:F3
E2PWP-
I2S-MCLK
220
221
222
I2S_IN_SD
I2S_OUT_MCK
I2S_IN_BCK/GPIO68
BL_PWM 004:B2;005:B2
SCL 002:D3;004:B2;005:C2;005:F4
SDA 002:D3;004:B2;005:C2;005:F4
R125
SPDIF 003:H4
10K
SPDIF
BL_PWM
I2S-SD
R126 33
R124 33
227
228
229
230
231
232
233
PWM2
SPDIFO
GND_232
USB0_DM
UART2_RX/I2CM_SDA
UART2_TX/I2CM_SCK
UART I2S-O&I
&I2C-M
N101
MSD209GL-LF
DDC x1 X1 SPI
RXC0N
RXC0P
GND_101
99
100
101
SIF-CTL
R115
13K
SIF-CTL002:E4
HDMI3-SCL
HDMI3-RXC+
+3.3V-VDD
HPAMP-RIN 003:G3 HPAMP-LIN 003:G4
HDMI3-RXC-
+1.2V-VDDC
HDMI3-SCL003:G2
HDMI3-RXC-003:G1
HDMI3-RXC+003:G1
HDMI3-SDA
HDMI3-RX0-
HDMI3-RX0+
HDMI3-SDA003:G2
HDMI3-RX0+003:G1
HDMI3-RX0-003:G1
PNPWR_SW 005:A5
MCKE
+1.2V-VDDC
MADR[9]
MADR[7]
MADR[5]
MADR[3]
MADR[12]
PNPWR_SW
212
213
214
215
216
217
218
219
MCLKE
MADR[9]
MADR[7]
MADR[3]
MADR[12]
VDDC_218
I2S_IN_WS/GPIO67
USBHDMI-in x1
RXC1N
RXC1P
AVDD_DM
RXC2N
RXC2P
HOTPLUGC
102
103
104
105
106
107
108
USB-D-
HDMI3-HP-
HDMI3-RX2+
HDMI3-RX2-
HDMI3-RX1-
HDMI3-RX1+
+3.3V-DVI
HDMI3-HP-003:G2
HDMI3-RX1-003:G1
HDMI3-RX2-003:G1
HDMI3-RX1+003:G1
HDMI3-RX2+003:G1
MBA[0]
+1.8V-DDR2
MADR[1]
MADR[10]
208
209
210
211
BADR[0]
MADR[1]
MADR[5]
MADR[10]
AVDD_DDR_211
DDR2 x16
-Addr, CLK
USB1_DM
USB1_DP
SCK
SDI
SDO
109
110
111
112
SPI_DI
SPI_DO
USB-D+
SPI_CK
USB-D+003:G2
USB-D-003:G3
SDO
SDI
SCLK
MWE-
MBA[2]
205
206
207
BADR[2]
BADR[1]
SCZ
PWM0
113
114
115
SPI_CZ
RFAGC-SEL-
R116 1K
R132
33
SCS- MBA[1]
MADR[4]
MADR[6]
MADR[8]
MADR[11]
201
202
203
204
WEZ
MADR[6]
MADR[8]
MADR[11]
DDR2 x16
-Data
Serial TS
Ethernet
LVDS X2
(10 bits)
PWM1
LVA4P
LVA4M
116
117
118
R117 1K
R118 33
+3.3V-VDD
RXE4-004:B2
RXE4+004:B2
RFAGC-SEL-002:C2
MODT
MRAS-
MCAS-
MADR[0]
MADR[2]
196
197
198
199
200
RASZ
CASZ
MADR[0]
MADR[2]
MADR[4]
GPIO150_I2S_OUT_MUTE
LVA3P
LVA3M
LVACKP
LVACKM
LVA2P
119
120
121
122
123
R119 33
RXE3+004:B2
RXEC+004:B2
RXE2-004:B2
RXE3-004:B2
RXE2+004:B2
RXEC-004:B2
+3.3V-MEMPLL
MVREF
+3.3V-VDD
193
194
195
ODT
MVREF
VDDP_194
AVDD_MEMPLL
GND
MCLKZ
MCLK MDATA[5] MDATA[2] MDATA[0] MDATA[7]
AVDD_DDR_185
MDATA[13] MDATA[10]
MDATA[8]
MDATA[15] AVDD_DDR_180 DDR2_DQSB[1]
DDR2_DQS[1]
VDDP_177 AVDD_DDR_176 DDR2_DQSB[0]
DDR2_DQS[0] DDR2_DQM[0] DDR2_DQM[1]
AVDD_DDR_171
MADTA[14]
MADTA[9]
MADTA[12] MADTA[11]
AVDD_DDR_166
MADTA[6]
MADTA[1]
MADTA[3]
MADTA[4]
VDDC_161
TS1CLK
TS1SYNC
TS1VALID
TS1DATA GPIO105
VDDP_155
GPIO104 GPIO101 GPIO100
GPIO95 GPIO94 GPIO93 GPIO92 GPIO89
LVA1P
LVA1M
125
126
RXE1+004:B2
RXE1-004:B2
LVA0P
LVA0M
127
128
RXE0+004:B2
RXE0-004:B2
GPIO153
VDDC_142
AVDD_LPLL
LVB0M LVB0P LVB1M
VB1P LVB2M LVB2P
LVBCKM LVBCKP
LVB3M LVB3P LVB4M LVB4P
VDDP_128
+3.3V-VDD
SCS-
SDO
SPI_WP-
GPIO152_I2S_OUT_SD3 GPIO151_I2S_OUT_SD2
LVA2M
124
R120 33
192 191 190 189
MDATA[5]
188
MDATA[2]
187
MDATA[0]
186
MDATA[7] 185 184
MDATA[13]
183
MDATA[10]
182
MDATA[8] 181
MDATA[15] 180 179 178 177 176 175 174 173 172 171 170
MDATA[14] 169
MDATA[9]
168
MDATA[12] 167
MDATA[11] 166 165
MDATA[6]
164
MDATA[1]
163
MDATA[3]
162
MDATA[4] 161 160 159 158 157 156 155 154 153 152 151 150 149 148
LGBL_SW­147
146
HP-MUTE­145 144 143
AMP-RST­142 141 140
R123 33 139 138 137 136
R122 33 135 134 133 132
R121 33 131 130 129
GND-D
R133 33
MCLK­MCLK+
+1.8V-DDR2
+1.8V-DDR2 MUDQS-
MUDQS+
+3.3V-VDD +1.8V-DDR2
MLDQS­MLDQS+
MLDM MUDM
+1.8V-DDR2
+1.8V-DDR2
+1.2V-VDDC
TSCLK
TSSYNC
TSVALID
TSDATA
+3.3V-VDD
LED
AMP-STB
BL_SW-
SPI_WP-
HP-DCT-
DM-RST-
+1.2V-VDDC +3.3V-LPLL
+3.3V
R134
10K
SWP-
C156
1n
TSCLK 002:D2 TSSYNC 002:D2 TSVALID 002:D2 TSDATA 002:D2
LED 005:C2
AMP-STB 005:E3 BL_SW- 005:B1
LGBL_SW- @xrefL HP-DCT- 003:H4
HP-MUTE- 003:G3
DM-RST- 002:D3 AMP-RST- 005:F4
RXO0- 004:B1 RXO0+ 004:B1 RXO1- 004:B1 RXO1+ 004:B1 RXO2- 004:B1 RXO2+ 004:B1 RXOC- 004:B1 RXOC+ 004:B2 RXO3- 004:B2 RXO3+ 004:B2 RXO4- 004:B2 RXO4+ 004:B2
N103
EN25Q64-104HIP 1 2 3 4
CS
VCC
DO/DQ1
NC/DQ3
WP/DQ2
CLK
VSS5DI/DQ0
8 7 6
GND-D
C155 100n
+3.3V
SCLK
SDI
+1.2V-VDDC
+3.3V
+3.3V
+3.3V-S
MCKE MADR[3] MADR[7]
MADR[12]
MADR[9] MADR[5]
MADR[10]
MADR[1]
MBA[0] MBA[1] MBA[2]
MWE-
MADR[11]
MADR[8] MADR[6] MADR[4] MADR[2] MADR[0]
MCAS­MRAS-
MODT
MCLK­MCLK+
MDATA[5] MDATA[2] MDATA[0]
MDATA[7] MDATA[13] MDATA[10]
MDATA[8] MDATA[15]
MUDQS­MUDQS+
MLDQS­MLDQS+
MLDM MUDM
MDATA[14]
MDATA[9] MDATA[12] MDATA[11]
MDATA[6]
MDATA[1]
MDATA[3]
MDATA[4]
C101 100n
L102
BG1608B121
L106
BG1608B121
L108
BG1608B121
R137 56
R138 56
R139 56
R140 56
R141 56
R142 56 R144 22
GND-D
R145 22
R146 22
R147 22
R148 22
R149 22
GND-D
R150 22
R151 22
C102
C103
100n
100n
+3.3V-AUSDM
C116 100n
GND-D
+3.3V-VIF
C124 100n
GND-D
+3.3V-ADC
C126 100n
M_CKE M_ADR[3] M_ADR[7]
M_ADR[12]
M_ADR[9] M_ADR[5]
M_ADR[10]
M_ADR[1]
M_BA[0] M_BA[1] M_BA[2]
M_ADR[11]
M_ADR[8] M_ADR[6] M_ADR[4] M_ADR[2] M_ADR[0]
M_CAS­M_RAS- M_BA[1]
M_ODT
M_CLK-
R143
150
M_CLK+
M_DATA[5] M_DATA[2] M_DATA[0]
M_DATA[7] M_DATA[13] M_DATA[10]
M_DATA[8] M_DATA[15]
M_UDQS­M_UDQS+
M_LDQS­M_LDQS+
M_LDM M_UDM
M_DATA[14]
M_DATA[9] M_DATA[12] M_DATA[11]
M_DATA[6]
M_DATA[1]
M_DATA[3]
M_DATA[4]
C105 100n
L103
BG1608B121
L107
BG1608B121
+3.3V-S
C128 100n
GND-D
C106 100n
+3.3V-MEMPLL
C117
1u
+3.3V-USB
+3.3V+3.3V-VIF
+3.3V
C104 100n
C127 100n
+1.8V-DDR2
+1.8V
C107 100n
GND-D
+3.3V
C118 100n
GND-D
C125 100n
GND-D
L109
BG1608B121
M_ADR[10] M_ADR[11] M_ADR[12]
+1.8V-DDR2
C157 100n
+3.3V-DVI
DRAWN BY
APPROVED BY
M_ADR[0] M_ADR[1] M_ADR[2] M_ADR[3] M_ADR[4] M_ADR[5] M_ADR[6] M_ADR[7] M_ADR[8] M_ADR[9]
M_CLK+ M_CLK-
M_CKE
M_BA[0]
M_BA[2]
M_RAS­M_CAS-
M_WE-
M_VREF
C158 100n
L101
BG1608B121
L104
BG1608B121
C129 100n
K4T1G164QE-HCF7
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
J8
CK
K8
CK
K2
CKE
L2
BA0
L3
BA1
L1
BA2
K7
RAS
L7
CAS
K3
WE
L8
CS
A1
VDD1
E1
VDD2
J9
VDD3
M9
VDD4
R1
VDD5
A9
VDDQ1
C1
VDDQ2
C3
VDDQ3
C7
VDDQ4
C9
VDDQ5
E9
VDDQ6
G1
VDDQ7
G3
VDDQ8
G7
VDDQ9
G9
VDDQ10
J1
VDDL
J2
VREF
C159 100n
+1.8V-DDR2
+3.3V-LPLL
GND-D
+3.3V-S
C130 100n
GND-D
C160 100n
C108 100n
+3.3V
C119 100n
BG1608B121
N104
G8
M_DATA[0]
DQ0
G2
M_DATA[1]
DQ1
H7
M_DATA[2]
DQ2
M_DATA[3]
H3
DQ3
H1
M_DATA[4]
DQ4
M_DATA[5]
H9
DQ5
F1
M_DATA[6]
DQ6
F9
M_DATA[7]
DQ7
C8
M_DATA[8]
DQ8
C2
M_DATA[9]
DQ9
D7
M_DATA[10]
DQ10
D3
M_DATA[11]M_WE-
DQ11
D1
M_DATA[12]
DQ12
D9
M_DATA[13]
DQ13
M_DATA[14]
B1
DQ14
B9
M_DATA[15]
NC#E2
NC#A2
E2
R3
A2
C161 100n
C109 100n
BG1608B121
L110
DQ15
LDQS LDQS UDQS UDQS
LDM UDM ODT
VSS1 VSS2 VSS3 VSS4
VSS5 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSQ10
VSSDL
NC#R3
NC#R7
NC#R8
R7
R8
C162
C163
100n
100n
C110
C111
100n
100n
L105
+3.3V-VDD
+3.3V-MPLL
C131
C132
1u
100n
GND-D
F7 E8 B7 A8
F3 B3 K9
A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
GND-D
C164 100n
C112 100n
C120 100n
GND-D
M_LDQS+ M_LDQS­M_UDQS+ M_UDQS-
M_LDM M_UDM M_ODT
C165 100n
+1.8V-DDR2
C113 100n
C121 100n
+1.8V-DDR2
R135
1K 1%
R136
1K 1%
C166
C167
100n
100n
C123
C122
100n
100n
GND-D
C170
1n
C168 100n
R101
1K
1%
M_VREF
GND-D
GND-D
TITLE: DWG NO.
Core & Memory 9232KH5101DL
REV.
Sheet to
XOCECO
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
C171 100n
C169 100n
R102
1K 1%
MVREF
C114
1n
GND-D
A1.1
C115 100n
91
Page 34
ABCDEFGH
1
+5V
R223
R224
6.8K
2
C208
R202
100n
ATV-SIF+001:B4
ATV-SIF-001:B4
ATV-CVBS+001:B4
ATV-CVBS-001:B4
3
C209 100n
C210 100n
C211 100n
47
R203
47
R205
47
R206
47
C212
1u
GND-D
GND-D
R201
300
R204
300
C213
1n
+3.3V-DE
+3.3V-DE
1
2
3
4
5
6
TP201
7
8
9
SIF+
10
SIF- IF_AGC
11
VIF-
12
VIF+
GND-D
GND_1
AVDD_33_2
SSIFO
CVBSOUT
GND_5
CLKO
AVDD_33_7
VR27
SIFIP
SIFIM
VIFIM
VIFIP
RFAGC
+1.2V-DE
46
47
48
RF_AGC
VDDC_47
GND_1314AVDD_33_14
13
15
C214
+3.3V-DE
100n
4
V202
10K
2SA1576UB
C228
22n
R227
R226
100K
GND-D
BC847AW
44
45
TS_DATA[1]
TS_DATA[0]
GND_1516VREFM17VREFP18AVDD_33_18
C215 100n
C216 100n
GND-D
1K
R225
10K
V201
GND-D
42
43
TS_DATA[4]
TS_DATA[3]
TS_DATA[2]
N201
MSB1210-LF
ZIF_QM20ZIF_QP21ZIF_IM22ZIF_IP23GND_2324XIN
19
C217 100n
R207
+3.3V-DE
2K
GND-D
L203
STLI1608_R33KT
+5V
RFAGC-SEL- 001:D5
39
40
41
TS_DATA[7]
TS_DATA[6]
TS_DATA[5]
C218
C221
100n
100n
R209
R208
100
2K
L204
STLI1608_R33KT
C220
51p
C219
5.6p
DIF+
37
38
TS_SYNC
TS_VALID
TS_CLK
I2CS_SDA
I2CS_SCL
GND_33
VDDC_32
I2CM_SDA
I2CM_SCL
EXTRSTN
GND_28
IF_AGC
AVDD_33_26
XOUT
G201
24MHz
C223
R211
100n
C224
R210
33p
100
L205
STLI1608_R33KT
C222
5.6p
DIF-
GND-DGND-D
RF_AGC
R222
33
TSDATA
TSVALID
TSSYNC
TSCLK
36
R221
35
34
33
32
31
30
29
28
27
26
25
1M
GND-D
R220
+1.2V-DE R218
33
R216
33
IFAGC
+3.3V-DE
C225
33p
+5V
33
33
R212
1K
+5V
R217
4.7K
R213
TSDATA 001:E4 TSVALID 001:E3 TSSYNC 001:E3 TSCLK 001:E3
SDA 001:C1;004:B2;005:C2;005:F4
SCL 001:C1;004:B2;005:C2;005:F4
R219
10K
GND-D
4.7K
C226
22n
SDA-T
SCL-T
+3.3V-DE
R215
1K
C227
1n
GND-D
R214
33
DM-RST- 001:E4
VIF+
VIF-
SIF-
SIF+
C242 100n
C243 100n
C244 100n
C245 100n
1
C233
10n
NC_1
2
NC_2
3
RF_AGC
4
Vt
5
AS
6
SCL
7
SDA
8
Vcc
9
IF_AGC
10
D-IF_out+
11
D-IF_out-
12
IF_out
GND-D
TUNER201 FT2130
L206
+5V
22uH
C229
C230
220u
100n
16V
GND-D
L207
+5V
L209
V203
2SC4215
?
R239
680
R240
39
+12V
GND-D
R235
300
R237
5.1K
R238
1K
Z201
K3953
12345
C241
5.6p
SIF-CTL001:C5
+5V
GND-D
R243
1K
C240
1n
GND-D
R244
10K
V204 BC847AW
R245
10K
D201
BA891
R241
R242
GND-D
10K
10K
C238
10n
C239
10n
+12V-AIF
0.68uH
C237
R236
0
C236
10n
22uH
C235 100n
GND-D
C231 220u
16V
C234 220u
16V
GND-D
C232 100n
R234
100
GND-D
R228
0
R229
0
L208
0.56uH
RF_AGC
SCL-T
SDA-T
SCL-T
SDA-T
IF_AGC
DIF+
DIF-
AIF
R230 33
R231 33
R232 33
R233 33
12345
Z202
K9656
+1.2V-VDDC
L201
BG1608B121
+1.2V-DE
C201 100n
GND-D
C202 100n
+3.3V
L202
BG1608B121
+3.3V-DE
C203 100n
GND-D
C204 100n
C205 100n
C206 100n
C207 100n
5
TITLE: DWG NO.
RF Demodulation 9232KH5101DL
6
DRAWN BY
APPROVED BY
REV.
Sheet to
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
A1.1
92
XOCECO
Page 35
ABCDEFGH
N301
C305 100n
MAX232CSE
1
C1+
2
V+
3
C1-
4
C2+
5
C2-
6
V-
7
T2OUT R2IN8R2OUT
Vcc GND
T1OUT
R1IN
R1OUT
T1IN T2IN
16 15 14 13 12 11 10
9
C301 100n
+5V-S
RS232-TXD RS232-RXD
+5V-S
C302 100n C303 100n
C304 100n
1
R326
10K
R314
47R342
47R338
47R335
15KR336
47R333
GND-D
+5V-HDMI1
10K
GND-D
+5V-HDMI2
GND-D
GND-D
N303
CM1213-08MS
1
CH1
CH8
2
CH2
CH7
3
CH3
VP
4
CH4
CH6
VN5CH5
R315
1K
V301 BC847AW
GND-D
N306
CM1213-08MS
1
CH1
CH8
2
CH2
CH7
3
CH3
VP
4
CH4
CH6
VN5CH5
R327
1K
V302
12345
BC847AW
R339
22K
500MHzZ303
500MHzZ302
500MHzZ301
R332
10
9 8 7 6
12345
GND-D
10
9 8 7 6
GND-D
R341
22K
R334
75
75
+5V-HDMI1
+5V-HDMI1
N304
PESD5V0L4UG
+5V-HDMI2
+5V-HDMI2
N307
PESD5V0L4UG
12345
C312 100n
GND-D
VCC-VGA
R337
75
12345
C318 100n
GND-D
R301
UART-RXSTB
001:C1
N302
Vcc
SCL
WP
HDMI1-RX2+001:B2 HDMI1-RX2-001:B2 HDMI1-RX1+001:B2 HDMI1-RX1-001:B2
HDMI1-RX0+001:B2 HDMI1-RX0-001:B2 HDMI1-RXC+001:B2 HDMI1-RXC-001:B2
HDMI-CEC001:B1;003:A4;003:G2
HDMI1-SCL001:C5 HDMI1-SDA001:C5
8 7 6 5
UART-TX
UART-RX
R310 10K R309 33 R307 33 R311 0
001:C5;003:A5;005:D1
001:C5;003:A5;005:D1
2
CAT24C02WI
1
A0
2
A1
3
A2 Vss4SDA
GND-D
33
R302
33
R303
33
R304
10
R305
10
R308 4.7K R306 4.7K
+5V
+5V-HDMI1
GND-D
D301
MMBD1204
HDMI1-HP-
001:B2
C306 100n
+3.3V
+5V-HDMI1
R312
1K
R313
1K
3
R316
N309
Vcc
SCL
WP
10
R317
10
R320 4.7K R318 4.7K
1uC309
1uC311
C308
47p
R345
33
R347
33
8 7 6
+5V
GND-D
R329
12K
V303
BC847AW
V304
BC847AW
10KR352
33R351 33R349
0R353
+5V-HDMI2
D302
MMBD1204
HDMI2-HP-
001:B3
C307 100n
C310
R331
47p
+3.3V-S
R344
10K
R346
10K
10KR328
10KR330
12K
R343
1K
V305 BC847AW
4.7KR350
4.7KR348
+3.3V
+5V
GND-D
+5V-HDMI2
R324
1K
ISP_EN 001:C1
47nC316
47nC314
1nC315
47nC313
VCC-VGA
MMBD1204
C317 100n
R325
1K
R340 47
D303
VGA-SCL VGA-SDA
HDMI2-RX2+001:B3 HDMI2-RX2-001:B3 HDMI2-RX1+001:B3 HDMI2-RX1-001:B3
HDMI2-RX0+001:B3 HDMI2-RX0-001:B3 HDMI2-RXC+001:B3 HDMI2-RXC-001:B3
HDMI-CEC001:B1;003:A2;003:G2
HDMI2-SCL001:C5 HDMI2-SDA001:C5
4
N305
CAT24C02WI
1
A0
Vcc
2
A1
WP
3
A2
SCL
Vss4SDA
GND-D
001:C5;003:A1;005:D1
8 7 6 5
VGA-LIN
VGA-RIN
UART-RX
001:B5
001:B5
R322 10K R321 33 R319 33 R323 0
5
001:C5;003:A1;005:D1
6
UART-TX
VGA-VSYNC
001:B1
VGA-HSYNC
001:B1
VGA-B_IN
001:B3
VGA-G_IN
001:B3
VGA-SOG_IN
001:B3
VGA-R_IN
001:B3
24C02N-10SI27
1
AO
2
A1
3
A2
4
GND5SDA
GND-D
X301
JY-3541L-01-030
L
R
G
GND-D
X302 HDMI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND-D
X303 HDMI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND-D
X304
JY-3541L-01-030
L
R
G
GND-D
N308
PESD5V0L4UG
X305
HC1041-15F-3
5
4
3
2
1
GND-D
N310
PESD5V0L4UG
10 15
9
8
7
6
R355
C320
47
+5V-VP
47n
C321
1n
C323
47n
C325
47n
C330
1u
C328
1u
C333
47n
C335
1u
C337
1u
C341 100n
C342 100n
C347
1u
GND-D
C348
1u
R356
470
R358
47
R360
47
R366
47
1
2
3
4
+5V
+12V
GND-D
GND-D
GND-D
GND-D
GND-D
CH1_IN
CH2_IN
CH3_IN
VS+
R3A0
10K
+6V-REF
R3A3
10K
GND-D
C319 100p
GND-D
C322 100p
GND-D
C324 100p
GND-D
R363
10K
C329
R364
47p
12K
R361
10K
C327
R362
47p
12K
R365
C332
75
100p
R367
10K
R368
C334
12K
47p
R369
10K
R370
C336
12K
47p
N314
THS7314D
CH1_OUT
CH2_OUT
CH3_OUT
+5V-VP
R371
47
C339 100n
GND-D R3A1 33K
C371
R3A2
100p
7.5K
C370
1n
+6V-REF
234
OUT1
OU2
567
+12V-AU
C373
R3A5
100p
7.5K
R3A4
33K
C372
1n
+12V-AU
R373
47
C344
10u
R354
75
R357
75
R359
75
GND
1
8
C340 100u
16V
R374
10K
C345 100n
8
R37275C343
7
470u
16V
6
5
GND-D
C350 100u
16V
N315
AZ4558CM-E1
C351 100u
16V
+6V-REF
C349
R399
10u
10K
R3A6
470
R3A7
10K
R3A8
470
R3A9
10K
GND-D
GND-D
GND-D
C369 100n
C367
4.7n
C368
4.7n
12345
C326 100n
GND-D
12345
C331 100n
GND-D
12345
C338 100n
GND-D
12345
GND-D
C352 100n
YPBPR-Y_IN
001:B3
YPBPR-SOG_IN
001:B3
YPBPR-PB_IN
001:B3
YPBPR-PR_IN
001:B3
YPBPR-LIN
001:B5
YPBPR-RIN
001:B5
CVBS1_IN
001:B4
CVBS1-LIN
001:B5
CVBS1-RIN
001:B5
CVBS_OUT
001:B4
CVBS-ROUT
001:B6
14
13
12
11
CVBS-LOUT
001:B6
X306
RCA-389A-01
GND-D
N311
PESD5V0L4UG
X307
RCA-289A-01
GND-D
N312
PESD5V0L4UG
X308
RCA-389A-02
GND-D
N313
PESD5V0L4UG
RCA-389A-02
N316
PESD5V0L4UG
GND-D
GBR
R
X309
N318
CM1213-08MS
1
10
CH1
GND-D
GND-D
2
CH2
3
CH3
4
CH4 VN5CH5
R386
1K
V306 BC847AW
CH8
9
CH7
8
VP
7
CH6
6
12345
GND-D
+5V-HDMI3
+5V-HDMI3
N319
PESD5V0L4UG
X310 HDMI
1
3
5
7
9
11
13
15
17
19
GND-D
X311
UBA-100/W
2
4
6
8
10
12
14
16
18
G
GBU
R375
HDMI3-RX2+001:D5 HDMI3-RX2-001:D5 HDMI3-RX1+001:D5
N317
CAT24C02WI
A0
Vcc
A1
WP
A2
SCL
Vss4SDA
HDMI3-RX1-001:D5
HDMI3-RX0+001:D5 HDMI3-RX0-001:D5 HDMI3-RXC+001:D5 HDMI3-RXC-001:D5
HDMI-CEC001:B1;003:A2;003:A4
HDMI3-SCL001:D5 HDMI3-SDA001:D5
8 7 6 5
R381 10K R380 33 R378 33 R382 0
R
1 2
WR
3
GND-D
10
R376
10
R379 4.7K R377 4.7K
+5V
+5V-HDMI3
GND-D
D304
MMBD1204
HDMI3-HP-
001:D5
C353 100n
+3.3V
+5V-HDMI3
R383
1K
R384
1K
R385
10K
+5V-HDMI3
4
R387 0
USB-D+ 001:D5
R388 0
USB-D­001:D5
C361
Y
YW
R
Y
W
R
R
HPAMP-RIN
001:C6
HP-MUTE-
001:E4
HPAMP-LIN
001:C6
1u
R398 100K
C362
1u
GND-D
C360
1u
+5V
4
5
2
3
1
IN1
GND
MUTE
IN26BIAS7OUT28VCC
C363 100u
+5V-EP
16V
GND-D
+5V-EP
R397
47
C358
10u
GND-D
FU301 SMD1206P075TF
+5V-PU
OUT1
N321
BH3547F
R389
10K
+5V
C359 100n
C364 220u
16V
HP-DCT-
C365
001:E4
220u
16V
G
R390
47
SD
R391
0
123
BC847AW
SPDIF
001:C1
V307 AO3401A
GND-D
+3.3V
V308
456
N320
IP4223CZ6
R3951KR396
R394
10K
R392 100
C356
C357
10u
100n
+5V-USB
C354 100u
16V
1K
R393
10K
12345
DETECTOR_5
DETECTOR_6
C366 100n
GND-D
C355 100n
GND-D
GND_4
L
R
Vin
Vcc
GND_1
GND-D
PESD5V0L4UG
N322
3
2
1
G
X312
HKTX179J
5
4
8
7
6
3
DRIVE
2
IC
1
TITLE: DWG NO.
AV Interface 9232KH5101DL
DRAWN BY
APPROVED BY
REV.
Sheet to
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
A1.1
93
XOCECO
Page 36
ABCDEFGH
X401
PHB-2x20-2.0-W
L408
STPB3216-380PT
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
LDQS LDQS UDQS UDQS
LDM
UDM
ODT
VSS1 VSS2 VSS3 VSS4 VSS5
C451 100n
+5V-PU
G8
M1_DATA[0]
G2
M1_DATA[1]
H7
M1_DATA[2] M1_DATA[3]
H3 H1
M1_DATA[4] M1_DATA[5]
H9 F1
M1_DATA[6]
F9
M1_DATA[7]
C8
M1_DATA[8]
C2
M1_DATA[9]
D7
M1_DATA[10]
D3
M1_DATA[11]
D1
M1_DATA[12]
D9
M1_DATA[13] M1_DATA[14]
B1 B9
M1_DATA[15]
M1_LDQS+
F7 E8
M1_LDQS-
B7
M1_UDQS+
A8
M1_UDQS-
F3 B3 K9
A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8
J7
GND-D
C452 100n
GND-D
RXO0-001:E4 RXO0+001:E4 RXO1-001:E4 RXO1+001:E4 RXO2-001:E4 RXO2+001:E4 RXOC-001:E4 RXOC+001:E5 RXO3-001:E5 RXO3+001:E5 RXO4-001:E5 RXO4+001:E5
RXE0-001:E5 RXE0+001:E5 RXE1-001:E5 RXE1+001:E5 RXE2-001:E5 RXE2+001:E5 RXEC-001:E5 RXEC+001:E5 RXE3-001:E5 RXE3+001:E5 RXE4-001:D5 RXE4+001:D5
M1_LDM M1_UDM M1_DOT
C453 100n
VDD-P
1
SCL
SCL001:C1;002:D3;005:C2;005:F4
OPC_OUT005:A1
SDA001:C1;002:D3;005:C2;005:F4
BL_PWM001:C1;005:B2
2
3
4
+1.8V-DDR2
R425
M1_VREF
1K 1%
R426
C440
1K
1n
1%
5
+1.8V-DDR2
C443
C442
100n
10u
GND-D
C441 100n
C444 100n
M1_ADR[0] M1_ADR[1] M1_ADR[2] M1_ADR[3] M1_ADR[4] M1_ADR[5] M1_ADR[6] M1_ADR[7] M1_ADR[8]
M1_ADR[9] M1_ADR[10] M1_ADR[11] M1_ADR[12]
M1_CLK+ M1_CLK-
M1_CKE
M1_BA[0] M1_BA[1]
M1_RAS­M1_CAS-
M1_WE-
+1.8V-DDR2
M1_VREF
C446
C445
100n
100n
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
J8 K8 K2
L2 L3 L1
K7 L7 K3 L8
A1 E1 J9 M9 R1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9
J1
J2
C447 100n
R459 0
OPC_OUT
R460 0 R420 R461 0
SDA
BL_PWM
R462 0 R463 10K
+3.3V
R464 0 R470 0 R465 10K R466 0
GND-D
N404
K4T51163QI-HCF7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
CK CK CKE
BA0 BA1 NC
RAS CAS WE CS
VDD1 VDD2 VDD3 VDD4 VDD5 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10
VDDL
VREF
C448 100n
C449 100n
NC#A2
E2
A2
NC#E2
NC#R3
R3
R7
C450 100n
VSSQ10
NC#R7
NC#R8
R8
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9
VSSDL
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
171818
19
19
21
21
23
232424
25
25
27
272828
29
293030
31
313232
33
333434
35
353636
37
373838
39
394040
6
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
20
20
22
22
26
26
GND-D
M1_DATA[4] M1_DATA[3] M1_DATA[1]
M1_DATA[6] M1_DATA[11] M1_DATA[12]
M1_DATA[9] M1_DATA[14]
M1_UDM M1_LDM
M1_LDQS+ M1_LDQS-
M1_UDQS+ M1_UDQS-
M1_DATA[15]
M1_DATA[8] M1_DATA[10] M1_DATA[13]
M1_DATA[7]
M1_DATA[0]
M1_DATA[2]
M1_DATA[5]
M1_CLK+
R435
150
M1_CLK-
M1_DOT M1_RAS­M1_CAS-
M1_ADR[0] M1_ADR[2] M1_ADR[4] M1_ADR[6] M1_ADR[8]
M1_ADR[11]
M1_WE-
M1_BA[1] M1_BA[0]
M1_ADR[1]
M1_ADR[10]
M1_ADR[5] M1_ADR[9]
M1_ADR[12]
M1_ADR[7] M1_ADR[3]
M1_CKE
VDD-P
R441
0
R444
0
R447
0
R450
0
R453
0
R456
0
K401
R427 22
R428 22
R429 56
R430 22
R431 22
GND-D
R432 22
R433 22
R434 22
GND-D
R436 56
R437 56
R438 56
R439 56
R440 56
RO0-
R442 100
RO0+ RO1-
R443
RO1+
100
RO2-
R445 100
RO2+
ROCK-
R446 100
ROCK+
RO3-
R448
RO3+
100
RO4-
R449 100
RO4+
RE0-
R451 100
RE0+ RE1-
R452
100
RE1+ RE2-
R454
RE2+
100
RECK-
R455
RECK+
100
RE3-
R457
100
RE3+ RE4-
R458
RE4+
100
M1DATA[4] M1DATA[3] M1DATA[1]
M1DATA[6] M1DATA[11] M1DATA[12]
M1DATA[9] M1DATA[14]
M1UDM M1LDM
M1LDQS+ M1LDQS-
M1UDQS+ M1UDQS-
M1DATA[15]
M1DATA[8] M1DATA[10] M1DATA[13]
M1DATA[7]
M1DATA[0]
M1DATA[2]
M1DATA[5]
M1CLK+ M1CLK-
M1ODT M1RAS­M1CAS-
M1ADR[0] M1ADR[2] M1ADR[4] M1ADR[6] M1ADR[8]
M1ADR[11]
M1WE-
M1BA[1] M1BA[0]
M1ADR[1]
M1ADR[10]
M1ADR[5] M1ADR[9]
M1ADR[12]
M1ADR[7] M1ADR[3]
M1CKE
+1.2V-VDDC
+3.3V
GND-D
+3.3V
X404
TJC10-04A
1
2
3
4
GND-D
R401 33
SDA
R402 33
SCL
R403 10K
+3.3V
+3.3V-MEMPLLM
C401
10u
L402
BG1608B121
C416
10u
L405
+3.3V-MEMPLLM
BG1608B121
R477
?
+1.2V-VDDC
+3.3V-VDDP
+1.2V-VDDC
M1DATA[4] M1DATA[3]
M1DATA[1] M1DATA[6]
+1.8V-DDR2
M1DATA[11] M1DATA[12]
M1DATA[9]
M1DATA[14]
+1.8V-DDR2
M1UDM M1LDM
M1LDQS+ M1LDQS-
+1.8V-DDR2 +3.3V-VDDP
M1UDQS+ M1UDQS-
+1.8V-DDR2
M1DATA[15]
M1DATA[8]
M1DATA[10] M1DATA[13]
+1.8V-DDR2
M1DATA[7] M1DATA[0] M1DATA[2] M1DATA[5]
M1CLK+ M1CLK-
C402
C403
100n
100n
+3.3V-AVDD
C417 100n
GND-D
C425
C424
100n
1u
GND-D
+3.3V
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
52 53 54
C404 100n
C418 100n
1 2 3 4 5 6 7 8 9
+3.3V
+3.3V
RE4+
216
217
GND_217
GND_1 SDAS SCLS GPIO[8] GPIO[9] GND_6 VDDC_7 GPIO[10] GPIO[11] GPIO[12] GPIO[13] PDI BIST GPIO[14] VDDP_15 GND_16 VDDC_17 MDATA[4] MDATA[3] GND_20 MDATA[1] MDATA[6] AVDD_DDR_23 MDATA[11] MDATA[12] GND_26 MDATA[9] MDATA[14] AVDD_DDR_29 DQM[1] DQM[0] GND_32 DQS[0] DQSB[0] AVDD_DDR_35 VDDP_36 GND_37 DQS[1] DQSB[1] AVDD_DDR_40 MDATA[15] MDATA[8] GND_43 MDATA[10] MDATA[13] AVDD_DDR MDATA[7] MDATA[0] MDATA[2] MDATA[5] MCLK MCLKZ
GND_53
AVDD_MEMPLL
55
M1ODT
C405
C406
100n
100n
L403
BG1608B121
L406
BG1608B121
RE3-
RE4-
RE3+
213
214
215
RE3P
RE4N
RE4P
RASZ57CASZ58MADR[0]59MADR[2]60MADR[4]61GND_6162MADR[6]63MADR[8]64MADR[11]65WEZ66BADR[1]67BADR[0]68MADR[1]69MADR[10]70AVDD_DDR_70
ODT
56
M1CAS-
M1RAS-
M1ADR[0]
C407 100n
+3.3V-LPLLM
GND-D
+3.3V-MPLLM
C426
1u
GND-D
RE2+
RECK+
RECK-
210
211
212
RE3N
RECKN
RECKP
M1ADR[4]
M1ADR[2]
C408 100n
GND-D
C419 100n
C427 100n
RE1-
RE1+
RE2-
207
208
209
RE1P
RE2N
RE2P
M1ADR[8]
M1ADR[6]
M1ADR[11]
C409 100n
+3.3V
+3.3V
RE0-
RE0+
205
206
RE0N
RE0P
RE1N
M1WE-
M1BA[1]
+1.8V
L404
BG1608B121
L407
BG1608B121
RO3-
RO4-
RO4+
RO3+
+3.3V-AVDD
204
M1BA[0]
BG1608B121
ROCK+
198
199
200
201
202
203
RO3N
RO3P
RO4N
RO4P
GND_203
AVDD_33_204
MADR[5]72MADR[9]73MADR[12]74MADR[7]75MADR[3]81VDDP82GND_8283GPIO_8384GPIO_8485GPIO_8586GPIO_8687GPIO_8788GPIO_8889GPIO_8990GPIO_9091GPIO_9192GND_9293GPIO_9394GPIO_9495GPIO_9596SDAM2R97SCLM2R98GPIO[31]
71
M1ADR[9]
M1ADR[1]
M1ADR[5]
M1ADR[12]
M1ADR[10]
+1.8V-DDR2
+1.8V-DDR2
L401
GND-D
+3.3V-LVDS
C420 100n
GND-D
+3.3V-VDDP
C428 100n
GND-D
RO2-
RO2+
ROCK-
195
196
197
RO2P
ROCKN
ROCKP
76
M1CKE
M1ADR[3]
M1ADR[7]
C410 100n
C421 100n
C429 100n
RO1+
194
RO1P
RO2N
MCLKE77GND_7778VDDC_78
G401
12MHz
1M
C435
33p
RO0-
RO1-
193
RO1N
RO0+
192
+3.3V-AVDD
189
190
191
RO0N
RO0P
AVDD_33_190
XIN1
XOUT1
+3.3V-MPLLM
+1.2V-VDDC
186
187
188
XIN
XOUT
VDDC_189
AVDD_MPLL
N401
MST6M20S
SCLM2L80SDAM2L
79
+1.2V-VDDC
+3.3V-VDDP
C411
C412 100n
C423 100n
C431 100n
C413 100n
C432 100n
100n
C422 100n
C430 100n
C434
33p
+3.3V-VDDP
+1.2V-VDDC
183
184
185
GND_185
VDDC_183
VDDP_184
C414 100n
GND-D
C433 100n
LVA0+
LVA0-
+3.3V-LPLLM
R419 33
179
180
181
182
LVAOM
LVA0P
GND_182
AVDD_LPLL
APX810-29SAG-7
C415 100n
LVA1+
LVA1-
177
178
LVA1P
LVA2+
R418 33
176
LVA2P
LVA1M
N402
C436 100n
LVA2-
LVACK+
174
175
LVA2M
LVA3+
LVACK-
R417 33
172
173
LVA3P
LVACKM
LVACKP
GPIO[22]
99
+3.3V
Vcc
RESET
GND
GND-D
LVA4-
LVA3-
LVA4+
169
170
171
LVA4P
LVA3M
GPIO[23]
GPIO[24]
100
101
102
LVB1+
LVB0-
LVB0+
+3.3V-LVDS
R416 33
164
165
166
167
168
LVB1P
LVB0M
LVB0P
LVA4M
GND_167
AVDD_LVDS_168
AVDD_LVDS_160
AVDD_LVDS_148
AVDD_LVDS_123
GPIO[25]
GPIO[26]
GPIO[27]
GND_105
RESET
VDDP_107
103
104
105
106
107
SPI1-WP-
RESET-MEMC
+3.3V-VDDP
R421
10K
C437
1n
LVB1-
163
LVB1M
REXT
GND_161
VDDC_159 GPIO_158 GPIO_157
LVB2P
LVB2M LVBCKP LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
GND_147
LVC0P
LVC0M
LVC1P
LVC1M
LVC2P
LVC2M LVCCKP LVCCKM
LVC3P
LVC3M
LVC4P
LVC4M
LVD0P
LVD0M
LVD1P
LVD1M
GPIO_130 GPIO_129
GND_128
LVD2P
LVD2M LVDCKP LVDCKM
LVD3P
LVD3M
LVD4P
LVD4M
VDDP_118 VDDC_117
GPIO[1]
PWM0 PWM1
CSZ SDO SDI SCK
GND_109
VDDC_108
108
+1.2V-VDDC
R415
162 161 160
+3.3V-LVDS
159
+1.2V-VDDC
158 157
R414 33
156 155 154 153
R413 33
152 151 150 149 148
+3.3V-LVDS
147
R412 33
146 145 144 143
R411 33
142 141 140 139
R410 33
138 137 136 135
R409 33
134 133 132 131 130 129 128
R408 33
127 126 125 124 123
+3.3V-LVDS
R407 33
122 121 120 119 118
+3.3V-VDDP
117
+1.2V-VDDC
R406 10K
116
R405 10K
115
R404 10K
114
R422 33
113 112 111 110 109
GND-D
1%
820
LVB2+
LVB2­LVBCK+ LVBCK-
LVB3+
LVB3-
LVB4+
LVB4-
LVC0+
LVC0-
LVC1+
LVC1-
LVC2+
LVC2­LVCCK+ LVCCK-
LVC3+
LVC3-
LVC4+
LVC4-
LVD0+
LVD0-
LVD1+
LVD1-
LVD2+
LVD2­LVDCK+ LVDCK-
LVD3+
LVD3-
LVD4+
LVD4-
+3.3V
SCS1-
SDO1 SDI1
SCLK1
DRAWN BY
SCS1-
SDO1
SPI1-WP-
BL_PWM
OPC_OUT
+3.3V
+3.3V
+3.3V
R423 33
LVA0+ LVA1+
LVA0-
R467 0
R468 0
R469 10K
R471 10K R472 0
GND-D
VDD-P
LVB4+
LVB4-
GND-D
LVC0+
LVC0-
R473 10K R474 0 R475 10K R476 0
GND-D
VDD-P
LVD4+
LVD4-
GND-D
N403
R424
EN25F40-100GCP
1K
1
CS#
VCC
2
DO
HOLD#
3
SWP1-
WP#
CLK
GND4DI
C439
1n
TITLE: DWG NO.
APPROVED BY
X402
DF13D-SMT-40A(Y)
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
171818
19
19
21
21
23
232424
25
25
27
272828
29
293030
31
313232
33
333434
35
353636
37
373838
39
394040
DF13D-SMT-40A(B)
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
171818
19
19
21
21
23
232424
25
25
27
272828
29
293030
31
313232
33
333434
35
353636
37
373838
39
394040
8
+3.3V
7 6
SCLK1
5
SDI1
C438 100n
GND-D
X403
2
2
4
LVA1-
4
6
LVA2+
6
8
LVA2-
8
10
LVACK+
10
12
LVACK-
12
14
LVA3+
14
16
LVA3-
16
LVA4+
20
LVA4-
20
22
LVB0+
22
LVB0-
26
LVB1+
26
LVB1-
LVB2+
LVB2-
LVBCK+
LVBCK-
LVB3+
LVB3-
2
LVC1+
2
4
LVC1-
4
6
LVC2+
6
8
LVC2-
8
10
LVCCK+
10
12
LVCCK-
12
14
LVC3+
14
16
LVC3-
16
LVC4+
20
LVC4-
20
22
LVD0+
22
LVD0-
26
LVD1+
26
LVD1-
LVD2+
LVD2-
LVDCK+
LVDCK-
LVD3+
LVD3-
MEMC 9232KH5101DL
REV.
A1.1
Sheet to
XOCECO
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
94
Page 37
ABCDEFGH
+5V
V601
GND-D
V602
GND-D
+5V-S
V603
GND-D
R644
10K
+5V
L605
R603
1K
R607
1K
R612
1K
C608
10u
C616
10u
C629
10u
+3.3V-S
R602
10K
+3.3V
R606
10K
+3.3V-S
R611
10K
C609
10u
C617
10u
C623
10u
R601
1K
BL_SW- 001:E4
R605
1K
BL_PWM 001:C1;004:B2
R610
1K
PWR_SW 001:C1
R630 100K
C614 100n
R634 100K
C621 100n
C624
10u
C628 100n
V610 BC847AW
R645
47K
GND-D
X602
TJC10S-03AW
1
2
3
GND-D
X603
TJC10S-07AW
1
2
3
4
5
6
7
GND-D
C607 100n
N601
MP2307
N602
MP2309
N603
MP2309
C613
10n
1
2
3
4
BS
COMP
BS
COMP
BS
COMP
S2
G2
S1
G1
1
SW
FB
6
C612
1n
R633 100K
1
SW
FB
6
C620
10n
R637
4.7K
1
SW
FB
6
C627
10n
R640
4.7K
3
5
C615 100n
3
5
C622 100n
3
5
N604
AO4803A
C630 100n
2
IN
7
EN
8
SS
GND4
4
GND-D
2
IN
7
EN
8
SS
GND
4
GND-D
2
IN
7
EN
8
SS
GND
4
GND-D
R646
47K
R647
47K
+3.3V-S
+5V-S
+5V-S
+3.3V
NR8040T100M
D601
SK34A
NR6045T150M
NR6045T150M
D2_8
D2_7
D1_6
D1_5
R615
5.6K 1%
KEY 001:C1
+5V-S
+5V-S
R620
1K
R618
R619
1K
10K
V605
R621
10K
+1.2V-VDDC C611 470u
16V
+1.8V
C619
10u
+5V-PU
C626
10u
R617
10K
V606
BC847AW
BC847AW
V607
BC847AW
IR 001:B1
SDA 001:C1;002:D3;004:B2;005:F4
SCL 001:C1;002:D3;004:B2;005:F4
L602
10uH
C610 100n
R631
4.3K
1%
R632
10K
1%
L604
15uH
C618
10u
R635
10K
1%
R636
10K
1%
L606
15uH
C625
10u
R638
45.3K
1%
R639
10K
1%
VDD-P
8
7
6
5
+3.3V-S
R616
1K
+5V-S
LED 001:E4
C631 100u
+5V
C635 100u
16V
16V
X604
TJC10-04A
1
2
3
4
X605
TJC3S-05AW
1
2
3
4
5
X606
TJC10S-02AW
1
2
N605
AS1117-3V3
IN
GND
C632 100n
GND-D
N606
AS1117-3V3
IN
GND
C636 100n
GND-D
GND-D
GND-D
GND-D
OUT
OUT
+3.3V
R622
33
R624
33
R626
47K
+5V-S
V608
BC847AW
+3.3V
R629
1K
+3.3V-S
C633 100n
+3.3V
C637 100n
C606 820u
35V
R623
4.7K
+24V
+3.3V-S
R628
10K
C634 100u
16V
C638 100u
16V
R625
4.7K UART-RX 001:C5;003:A5;003:A1
UART-TX 001:C5;003:A5;003:A1
R627
1K
LGBL_SW- 001:E4
+3.3V-S
2SA1576UB
R658
AMP-STB
001:E4
1K
+5V
V611
R660
1K
+12V
R661
1K
CD4148WP
D604
CD4148WP
D602
CD4148WP
D603
R662
10K
R659
10K
C659 470u
16V
+5V
R663
V612 BC847AW
GND-D
C653
4.7n
R651
C654
470
47n
C655
4.7n
R652
C656
470
47n
+3.3V
R653
10K
+3.3V-AA
R654
10K
R655
CD4148WP
C660 100n
I2S-WS001:D1
I2S-SCK001:D1
I2S-SD001:C1
D605
SDA001:C1;002:D3;004:B2;005:C2
SCL001:C1;002:D3;004:B2;005:C2
33
R656
C680
10K
5.6p
C657
10u
R664
33
C681
5.6p
R667
+3.3V
33
L607
BG1608B121
AMP-RST-001:E4
I2S-MCLK001:D1
1K
+3.3V
GND-D
R657
18.2K
1%
C658 100n
R665
33
R666
33
C682
5.6p
GND-D
R668
1K
C661
1n
+3.3V-AA
C639
10u
GND-S
13
14
15
16
17
18
19
20
21
22
23
24
+3.3V
C640 100n
AVDD
A_SEL
MCLK
OSC_RES
DVSSO
VR_DIG
PDN
LRCLK
SCLK
SDIN
SDA
SCL
12
VR_ANA
RESET26STEST
25
L608
BG1608B121
11
PLL_FLTP
+3.3V-AD
+3.3V-AD
C641
10u
GND-D GND-D
GND-S
9
10
PLL_FLTM
DVDD
28
27
C642 100n
AVSS
DVSS
8
29
C651
C652
2.2n
R649
R650
PBTL
GND
1u
22K
0
7
OC_ADJ
GND-D
N607
TAS5711
AGND
30
C662 100n
C663
1u
+24V
C643
6
31
1n
5
SSTIMER
GVDD_OUT
GVDD+OUT
VREG
32
C644 100n
4
BST_A
BST_D
33
C645
+24V
3
PVDD_A_3
PVDD_D_34
34
+24V
1n
C664
33n
1
2
PVDD_A_2
PGND_AB_48
PGND_AB_47
PGND_CD_38
PGND_CD_37
PVDD_D3_5
36
35
C674
33n
C646 100n
OUT_A
OUT_B
PVDD_B_45
PVDD_B_44
BST_B
BST_C
PVDD_C_41
PVDD_C_40
OUT_C
OUT_D
C647
C648
1n
100n
L609
NR8040T220M
22uH
R669
18
C665 330p
L610
NR8040T220M
22uH
R670
18
C668 330p
L612
NR8040T220M
22uH
R676
18
C678 330p
L611
NR8040T220M
22uH
R675
18
C675 330p
GND-D
GND-D
GND-D
GND-D
GND-D
R648
48
47
46
45
44
C667
33n
43
42
C677
41
33n
40
+24V
39
38
37
C649
C650
1n
100n
33
C666 680n
C669 680n
C679 680n
C676 680n
GND-S
+24V
C670 220u
25V
C671 220u
25V
R671
10K
R672
10K
C672 220u
25V
C673 220u
25V
GND-D
R673
10K
R674
10K
X607
TJC3S-04AW
1
2
3
4
X608
TJC3S-02AW
1
2
TITLE: DWG NO.
InternalInterface POWER & Audio AMP
DRAWN BY
APPROVED BY
9232KH5101DL
REV.
Sheet to
A1.1
95
XOCECO
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
1
2
X601
TJC3S-13AW
1
2
3
4
5
6
7
8
9
10
11
12
13
GND-D
C603 470u
25V
C604 220u
16V
C605 220u
16V
+12V
+5V
+5V-S
DCDC_SW
C601
R604
100n
2K
OPC_OUT004:B2
R608
100
R609
C602
10K
10u
+5V-S
V604
BC847AW
STPB3216-380PT
+12V
BC847AW
BC847AW
R614
1K
BC847AW
L601
R613
10K
3
L603
STPB3216-380PT
+12V
4
STPB3216-380PT
+12V
R642
10K
+3.3V
R643
V609 BC847AW
GND-D
1K
+3.3V
R641
PNPWR_SW001:D1
1K
5
6
Page 38
ABCDEFGH
TP1
D[0-7]
1
5V
X1
1
VCC
2
GND
3
IRQ
GND/THD
4
5
SCL
6
SDA
5V
LED1
5V
2
3
LED2
LED3
LED4
LED5
LED6
LED7
LED8
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[0-7]
R1
0
R2
0
C1
12p
D[0-7]
KEY
SCL
SDA
C2
12p
VOL-
PAD6
CH+
PAD5
5V
AS1117-3V3
IN OUT
5V
C3
10u
INPUT
PAD3
MENU
PAD8
CH-
PAD4
R3
NC
0
N1
V33
BG1608B121
C4
1u
POWER
PAD2
PAD1
RESERVE
1
CIN1
2
CIN2
3
CIN3
4
CIN4
5
CIN5
6
CIN6
7
CIN7
8
CIN8
9
CIN9
10
CIN10
AVCC
L1
PAD7
VOL+
D[0]
D[7]
D[6]
CIN1112CIN12
11
R4
100
C5
100p
D[1]
37
38
NC
THD139THD040CIN0
GND
VSHILD14VBIAS15AVSS16AVCC17GPIO1218GPIO1119GPIO1020DVCC
13
C6
100n
AVCC
TP2
D[3]
D[4]
D[2]
33
GPIO334GPIO235GPIO136GPIO0
N2
IT7230AFN
AVCC
C7
100n
GPIO432DVSS
31
GPIO5
GPIO6
GPIIO7
GPIO8
GPIO9
C8
100n
D[5]
V33
V33
R5
R6
10K
30
29
28
27
INT#
26
SDA
25
SCLK
24
ADD0
23
ADD1
22
21
V33
10K
R7
3.6K
5.6K R13
SDA
SDA
SCL
R8
NC
10K
R9
20K
R10
2K
R11
1K
R12
0
5.6K
V33
R14
KEY
KEY BOARD
+3.3V
4
10V
22uF
C901
C902
100n
GND
N902
HRM138CB5400
Vout GND Vcc
5
R901
N901
ISL29001
1
2
3
100K
GND
GND
VDD
GND
REXT4PD
SDA
SCL
6
5
LED901
GHZRB703D0
R
+3.3V
R904
2.7K
2.7K
22uF
V901
BC847AW
GND
R911
1.1K
+3.3V
3K
R914
R913
R905
SDA
SCL
47
R912
3K
TJC10S-07AW
SCL
7
SDA
6
VCC_3.3V
5
IR
4
VCC_5V
3
GND
X903
2
LED
1
GND
IR BOARD
R902
100
R903
100
GND
10V
C912
100n
C911
GND
B
TITLE: DWG NO.
KEY BOARD IR BOARD
6
DRAWN BY
APPROVED BY
9232KH5101DL
REV.
Sheet to
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
A1.0
96
XOCECO
Page 39
ABCDEFGH
C522
4.7u C526
1000p
C527
7D78
D8
S/OCP2FM/SS3GND4FB/CC/OLP
STR-A6059H
1
1.8
100n
R521
V_PFC
H
220n
R522
18K
C529
C523
1000p
C524
2.2u
C525 100p
C568
5.6n
C521
10u
R523
120
NC
5
VCC
47K
R524
V_9512
4.7n
R525
C528
680
120
R527
C530
R526
680
100n
D508
V_15
1
2
3
4
5
6
7
8
63V
MMSZ5245B
R528
R529
N503
SSC9512
Vsen
VC1
FB
GND
SS
OC
RC
RV9VC2
1KV
10p
C532
FR105P
D509
47u
C531
2SA966-0
V502
10
10
NC16
NC12
PGND
V_9512
R536
22
16
15
VGH
14
VS
13
VB
12
11
VGL
10
82K
R531
82K
R532
H
R530
4.7K
C535 220n
R534
MMSZ5245B
10
R538
D510
ES1J
C533
220n
H
M
1n
1KV
C534
M
D511
1N4007
33
R533
R535
2.2K
D504
C510
100n
H
V_15
EM2A
D505
NC
3
1
E
4
6
10K
R509
22
R507
D506
CD4148WP
R508
22
VCC
10p
C512
N501
SG6961SZ
R578
NC.
C566
1M
R506
INV2COMP3MOT4CS
1
R510
27K
47n
C513
C514
D507
FMY-1106S
1KV
220p C518
L505
V501
D
G
C517
S
E
M
M
2W
2W
0.39
0.39
R511
R512
47K
R513
5
7GD8
ZCD6GND
10K
C516
C515
100p
1000p
220n
220p
56u
C519
450V
1KV
220
R514
470K
R516
470K
R517
470K
R518
470K
R519
12K
R520
R515
470K
1M
1M
R503
R502
450V
V_PFC
56u
C520
H
R504
2M
E
-
AC
4
L503
1u
450V
C508
H
L504
1
+
1
D501
23
PFC3812QM-231K06B-03
2
E
L501
470p
470p
C501
C502
C506
0.22u
3
4
275VAC
C503
0.22u
275VAC
L502
1M
R501
275VAC
0.22u C504
RT501
D503
HZ20-2
NC
C509
10u
E
t
2
C567
N502
FU501
UL:5A 250V
X501
IEC:5AL 250V
2
1
470K
R505
C511
5
R537
2.2M
D512
22
BK-20-12XL
1
3
5
4
H
R539
33
CD4148WP
D513
R540
CD4148WP
D514
T502
N504
TLP781
N505
TLP781
R541
2.2M
10K
R545
33
10K
R546
10
8
9
7
6
R542
1K
510
R543
R544
510
MMBT3904
V_PFC
D
G
V503
E
S
E
D
G
V504
2KV
470p
C539
V505
R547
S
D515
SR506
C538
C536
4.7n
4.7n
470
C537 100n
N506
LM431A
C540
0.022u
250VAC
H
1KV
330p C543
R550
10
25V
C541
1000u
1.6K
R552
R548
10K
Z
A
C
1.5K
R553
V506
47K
R554
R551
4.7K
47K
C542
100n
R549
T501
BK-50-32XL
3
610
N507
TLP781
25V
H
1000u
R555
C545
C544
1K
100n
1000p
C507
NC
C546
1000p
C547
D516
L506
24VCF
MMSZ5254B
D517
CD4148WP
R556
2.2K
D518
MMSZ5245B
16
13
14
12
15
9
11
8
N508
LM431A
25V
12VSC
CD4148WP
C
D519
NC
NC
D521
SR506
D520
SR506
25V
D524
35V
D523
35V
820u
R557
2.2K C550
100n
33K
R561
2.2K
R559
NC
C549
Z
220u
A
C548
C551
R558
27K
R560
2.7K
R563
D522
FR105P
100n
1
S2
2
G2
3
S1
4
G1
47K
10K
R562
V507
MMBT3904
C555
27K
C552
1000u
820u
35V
R564
63V
N509
AO4803A
C553 470n
C556
25V
24VCF
47u
C554
820u
R566
L507
C557
1000u
10K
C561
220u
R568
C564
100n
25V
35V
1K
47K
C558
R565
D2_8
D2_7
D1_6
D1_5
10K
10K
C559
R570
820u
R569
10K
35V
10K
C562
820u
R572
R573
24VCF
63V
47u
N510
C560
100K
R571
uPC574
25V
C563
220u
C565
100n
8
7
6
5
R567
10K
TJC3S-14AW
X502
R577
R576
1
2
3
BON
PWM
24VCF
12VSC
TJC3S-13AW
X504
X503
4
5
6
7
8
9
10
11
12
13
14
5
4
3
2
1
13
12
11
10
9
8
7
6
5
4
3
2
1
PWM
BON
TITLE: DWG NO.
32" Power Board 9232KH5101DL
6
DRAWN BY
APPROVED BY
REV.
Sheet to
XIAMEN OVERSEAS CHINESE ELECTRONIC CO., LTD.
A1.0
97
XOCECO
Page 40
APPENDIX-A: Main assembly 9232KH5111 LED-32XR10F
NAME NO. MAIN COMPONENT AND IT'S NO.
Main board
IR board
Key board
Power board
Remote control
Panel
N101 N104
XI6KH01401B0
XI6KH0230910
XI6KQ0020510
XI6KH0142010
XI6010900501 RC-905-0A
XI5203328501 V315H3-LE2
N201
7
N60 N103 TUNER201
MSD209GL-LF (5270209002) K4T1G164QE-HCF7 (5270164002)
MSB1210-LF (5271210001) TAS5711 (5275711001) EN25Q64-104HIP (5272564002) FT2130 (5524050027)
Page 41
APPENDIX-B: Exploded view (LED-32XR10F)
Page 42
PART LIST OF EXPLODED VIEW
REF.No. DESCRIPION
1 Front cabinet
2 3 IR assembly
4
5
6
7
8 9 Main board washer 10 Power board assembly 11 Standing pole bracket (right) 12 Standing pole bracket (left)
13
14
15
16
17
18
19
20
21
22
23
24
Decorative board for front cabinet
Light-guided pole Pressing block for panel Sound box assembly Display panel Main board assembly
Insulating partition for power board Interface baffle (right) Interface baffle (down) Back cover Pedestal assembly Standing pole assembly Adjustable clasp Board partition pole Power cord bracket Power switch Power cord clip Touching key assembly
Note: design and specification are subject to change without notice.
Page 43
PART LIST
LED-32XR10F ver.1.0
REF.No. PARTS No. DESCRIPION Q'TY REMARK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 XI5944037630
27 XI60Z0000727
XI5Q32510010
XI5850447010
XI635KH01302
XI570031901A
XI5810074600
XI6170856000
XI5203328501
XI6KH01401B0
XI5810074900
XI6KH0142010
XI5810074400
XI5810074300
XI588052500A
XI5810074710
XI5810A74810
XI5H3251H01A
XI6151230010
XI6156112000
XI5720124000
XI58B0044100
XI58B0043610
XI5293000056
XI572011201C
XI635KH01102
XI6010900501
Front cabinet 1 Decorative board for front cabinet
IR assembly 1 Light-guided pole Pressing block for panel Sound box assembly Display panel Main board assembly
Main board washer 4 Power board assembly 1 Standing pole bracket (right) 1 Standing pole bracket (left) 1 Insulating partition for power board Interface baffle (right) Interface baffle (down) Back cover Pedestal assembly Standing pole assembly Adjustable clasp Board partition pole Power cord bracket Power switch Power cord clip Touching key assembly Remote control User manual Backlight board
1
1
4
1
1 V315H3-LE2
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
Only the parts in above list are used for repairing. Other parts except the above parts can't be supplied.
Page 44
Appendix: Installing the Stand or wall-mount bracket
If the stand is provided, please read these instructions thoroughly before attempting this installation.
You must install your TV into the stand in order for it to stand upright on a cabinet or other flat surface. If you intend to mount your TV on a wall or other vertical surface, you must remove the stand column.
Cautions:
Make sure that you handle your TV very carefully when attempting assembly or removal of the stand. If you are not sure of your ability to do this, or of your ability to use the tools necessary to complete this job, refer to a professional installer or service personnel. The manufacturer is not responsible for any damages or injuries that occur due to mishandling or improper assembly.
When using a table or bench as an aid to assembly, make sure that you put down a soft cushion or covering to prevent accidental scratching or damage to your TV's finish.
The speaker is not intended to support the weight of your TV. Do not move or handle your TV by the speaker. This can cause damage to your TV that is not covered by the manufacturer's warranty.
Before attempting assembly or removal of the stand, unplug the AC power cord.
Installing the stand
Table edge
Table edge
Stand column
Stand
Secure with
four screws
Installing a wall-mount bracket (not provided)
To install the stand:
1. Remove the stand from the box and place it on a table or bench.
You must pay attention to the direction of the stand. The wide
portion of the stand should go towards the front of the TV.
2. Lay your TV flat (screen down) on the edge of a table or
bench. Make sure that you put down a soft cushion or cloth so that your TV is not scratched.
3. Put the stand close to the TV back, align the stand with the
stand column by moving the stand steadily, and align the screw holes on the stand column with the holes in the stand, then secure the stand to the TV with provided screws .
To remove the stand from the TV, perform these steps in reverse order.
To attach your TV to a wall-mount bracket (not provided)
1. Carefully place your TV screen face-down on a cushioned, clean surface to protect the screen from damages and scratches.
2. Remove the four screws holding the TV to its stand column.
3. Remove the stand column.
4. Secure the wall-mount bracket to the back of your TV using
Remove these screws
the four screws provided with the bracket.
NOTE:
The appearance of this product in these illustrations may differ from your actual product, and is for comparative purposes only.
Page 45
WALL MOUNTING INSTRUCTIONS
Safety Precautions:
1. Be sure to ask an authorized service personnel to carry out setup.
2. Thoroughly read this instruction before setup and follow the steps below precisely.
3.The wall to be mounted should be made from solid materials. Only use accessories supplied by the manufacturer.
4.Very carefully handle the unit during setup. We are not liable for any damage or injury caused by mishandling or improper installation.
5.Be sure to place the unit on a stable and soft platform which is strong enough to support the unit.
6.Do not uplift the speaker when moving the display. The appearance of the unit may different from the actual ones.
7.Design and specifications are subject to change without notice.
8. Retain these instructions for future reference.
Note: All the wall mounting parts are optional and may be unavailable in your model.
Below we will show you how to mount the Display on the wall using our company’s wall mounting components.
11
Take out these parts from the box.
Wall Mounting Component
(including bracket and connector)
Expansion Bolt
Wood Screw
M4 Screw
Fig. 1
Fully insert the two insertions on the wall mounting connector into the
44
locating grooves on the wall mounting bracket from top to bottom end.
22
Screw 4pcs expansion bolts to fix the wall mounting bracket on the wall.
Wall
Wall Mounting Bracket
Fig. 2a
If your wall is a wooden structure, please fix the wall mounting bracket on the wall with 8 pcs wood screws.
Wall
Wall Mounting Bracket
Fig. 2b
55
Use screwdriver to revolve the Clasper to the Positioner
following the direction of the arrow.
33
Use the 4pcs M4 screws to fix the wall
mounting connector to the rear of the
display unit.
Wall Mounting Connector
Fig. 3
Clasper
Positioner
Fig. 4
Fig. 5
Page 46
July 2010
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