SANYO LC78011E Datasheet

Overview

The LC78011E is a CMOS IC that integrates a digital RGB encoder and a synchronizing signal generation circuit on a single chip. A video CD or CD-G system can be formed using the LC78011E together with an MPEG video decoder or a CD-G decoder, respectively.

Features

• System structure — Each system (Video CD or CD-G system) formed

with an additional chip: MPEG decoder or CD-G decoder chip.

• Video outputs — 8-bit D/A converter outputs: 2 channels — The LC78011E supports the following two video

signal output formats: Luminance signal (Y) and chroma signal (C) outputs Composite video signal (C • VIDEO) output (Only one D/A converter channel operates in this mode.)

• System clock — External 4fsc clock

NTSC mode: 14.31818 MHz PAL mode: 17.734475 MHz PAL-M mode: 14.30244596 MHz

• External subcarrier input — An external fsc clock is input and used for subcarrier

synchronization timing.

• Video data input — The LC78011E supports the following four input

formats: R, G, and B: 8 bits each Y, U, and V: 8 bits each Y and UV: 8 bits each (The UV input is a

multiplexed input)

R, G, and B: 4 bits each (In CD-G input support

mode)

• OSD input support — R, G, and B + BLK 4-bit inputs (color support)

(BLK is an OSD display switching timing signal.)

• External synchronizing signal input — Horizontal synchronizing signal, composite

synchronizing signal, and composite blanking signal inputs: HSYNC, CSYNC, and BLANK.

• Video signal formats — The LC78011E supports the NTSC, PAL, and PAL-

M formats.

Package Dimensions

unit: mm

3156-QIP48E

CMOS IC

33198RM (OT) No. 5755-1/13

SANYO: QIP48E

[LC78011E]

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Digital RGB Encoder IC for Video CD and CD-G

LC78011E

Ordering number : EN5755

Pin Assignment

No. 5755-2/13

LC78011E

No. 5755-3/13

LC78011E

Pin Functions

Pin No. Symbol I/O Polarity Function

1 RYIN3 IN Positive R/Y data input A pull-down resistor is built in. 2 RYIN2 IN Positive R/Y data input A pull-down resistor is built in. 3 RYIN1 IN Positive R/Y data input A pull-down resistor is built in. 4 RYIN0 IN Positive R/Y data input (LSB) A pull-down resistor is built in. 5 DV

— — Digital system ground 6 CLKI IN — 4fsc clock input A feedback resistor is built in. 7 FSCIN IN — fsc clock input A feedback resistor is built in. 8 DV

— — Digital system power supply 9 GUIN7 IN Positive G/U data input (MSB) A pull-down resistor is built in.

10 GUIN6 IN Positive G/U data input A pull-down resistor is built in. 11 GUIN5 IN Positive G/U data input A pull-down resistor is built in. 12 GUIN4 IN Positive G/U data input A pull-down resistor is built in. 13 GUIN3 IN Positive G/U data input A pull-down resistor is built in. 14 GUIN2 IN Positive G/U data input A pull-down resistor is built in. 15 GUIN1 IN Positive G/U data input A pull-down resistor is built in. 16 GUIN0 IN Positive G/U data input (LSB) A pull-down resistor is built in. 17 BVIN7 IN Positive B/V/UV data input (MSB) A pull-down resistor is built in. 18 BVIN6 IN Positive B/V/UV data input A pull-down resistor is built in. 19 BVIN5 IN Positive B/V/UV data input A pull-down resistor is built in. 20 BVIN4 IN Positive B/V/UV data input A pull-down resistor is built in. 21 BVIN3 IN Positive B/V/UV data input A pull-down resistor is built in. 22 BVIN2 IN Positive B/V/UV data input A pull-down resistor is built in. 23 BVIN1 IN Positive B/V/UV data input A pull-down resistor is built in. 24 BVIN0 IN Positive B/V/UV data input (LSB) A pull-down resistor is built in. 25 AV

— — Analog system power supply (For the D/A converters.) (+5 V)

26 CROUT OUT — Chroma signal/composite video signal output (8-bit D/A converter output) 27 BIAS OUT — Ripple rejection capacitor connection (Use a 10 µF capacitor.) 28 YOUT OUT — Luminance signal output (8-bit D/A converter output) 29 AV

— — Analog system ground (For the D/A converters.)

30 CCSEL IN Positive D/A converter output control signal input (Low: YC signal output, High: Composite video signal output) 31 NPSEL IN Positive Signal format selection input

32 PMSEL IN Positive

33 CDGSEL IN Negative

Video CD/CD-G selection input (Low: CD-G, High: Video-CD)

(The input digital data can be selected to be either 4-bit or 8-bit data.) 34 TEST IN Positive Test mode selection input (This pin must be tied low during normal operation.) 35 RESET IN Negative Reset signal input 36 OSBIN IN Positive OSD signal (B) input 37 OSGIN IN Positive OSD signal (G) input 38 OSRIN IN Positive OSD signal (R) input 39 OSBLK IN Positive OSD switching signal input (The OSD blanking signal input)

NPSEL PMSEL D/A converter output signal mode

0 0 NTSC 1 0 PAL 0 1 PAL-M 1 1 – (Illegal setting)

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No. 5755-4/13

LC78011E

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Pin No. Symbol I/O Polarity Function

40 BLANK IN Positive Composite blanking signal input (HBLANK + VBLANK) 41 CSYNC IN Negative Composite synchronizing signal input (HSYNC + VSYNC) 42 HSYNC IN Negative Horizontal synchronizing signal input (HSYNC) 43 YUVSEL1 IN Positive Signal input setup

44 YUVSEL2 IN Positive

45 RYIN7 IN Positive R/Y data input (MSB) A pull-down resistor is built in. 46 RYIN6 IN Positive R/Y data input A pull-down resistor is built in. 47 RYIN5 IN Positive R/Y data input A pull-down resistor is built in. 48 RYIN4 IN Positive R/Y data input A pull-down resistor is built in.

YUVSEL1 YUVSEL2 Video signal input signal mode

0 0 RYIN = R in, GUIN = G in, BVIN = B in 1 0 RYIN = Y in, GUIN = U in, BVIN = V in 0 1 RYIN = Y in, GUIN = none, BVIN = UV in 1 1 — (Illegal setting)

Notes:1. The voltage applied as the digital system power supply voltage must not exceed the voltage applied as the analog system power supply voltage.

2. Unused input pins must be tied high or low. If the OSD inputs are not used, tie OSBLK (pin 39) low.

3. Note that the clock input frequencies (CLKI: pin 6, and FSCIN: pin 7) depend on the TV subcarrier pull-in range. The CLKI input clock and the FSCIN clock must be synchronized.

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage

1 max DVDD(DVDD≤ AVDD) DVSS– 0.3 to DVSS+7.0 V

2 max AV

AVSS– 0.3 to AVSS+7.0 V

RYIN0 to RYIN7, GUIN0 to GUIN7, BVIN0 to BVIN7, CLKI, FSCIN,

Input voltage V

OSRIN, OSGIN, OSBIN, OSBLK,

– 0.3 to DVDD+0.3 V

BLANK, CSYNC, HSYNC, RESET, CCSEL, NPSEL, PMSEL, CDGSEL, YUVSEL1, YUVSEL2, and TEST

Output voltage V

OUT

CROUT, YOUT, and BIAS DVSS– 0.3 to DVDD+0.3 V Allowable power dissipation Pd max Ta = 25°C 500 mW Operating temperature Topr –20 to +75 °C Storage temperature Tstg –40 to +125 °C

Specifications

Absolute Maximum Ratings

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage

1 DVDD(DVDD≤ AVDD) 3.0 5.5 V

2 AV

4.5 5.0 5.5 V

OSRIN, OSGIN, OSBIN, OSBLK

VIH1 CCSEL, NPSEL, PMSEL, CDGSEL, 0.7 VDD1 VDD1 + 0.3 V

Input high-level voltage

YUVSEL1, YUVSEL2, TEST RYIN0 to RYIN7, GUIN0 to GUIN7,

2 BVIN0 to BVIN7, BLANK, CSYNC 2.2 VDD1 + 0.3 V

HSYNC, RESET OSRIN, OSGIN, OSBIN, OSBLK

1 CCSEL, NPSEL, PMSEL, CDGSEL, VSS1 – 0.3 0.3 VDD1 V

Input low-level voltage

YUVSEL1, YUVSEL2, TEST RYIN0 to RYIN7, GUIN0 to GUIN7,

2 BVIN0 to BVIN7, BLANK, CSYNC VSS1 – 0.3 0.8 V

HSYNC, RESET

NTSC 14.31818 MHz

1 CLKI PAL 17.734475 MHz

Clock frequency

PAL-M 14.3024459 MHz NTSC 3.579545 MHz

2 FSCIN PAL 4.43361875 MHz

PAL-M 3.57561149 MHz

Allowable Operating Ranges at Ta = –20 to 75°C unless otherwise specified

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