Ordering number : ENN6304
12800RM (OT) No. 6304-1/6
Overview
The LC35W256EM-10W and LC35W256ET-10W are
asynchronous silicon-gate CMOS SRAMs with a 32768word by 8-bit structure. These are full-CMOS devices
with 6 transistors per memory cell, and feature ultralowvoltage operation, a low operating current drain, and an
ultralow standby current. Control inputs include OE for
fast memory access and CE for power saving and device
selection. This makes these devices optimal for systems
that require low power or battery backup, and makes
memory expansion easy. The ultralow standby current
allows these devices to be used with capacitor backup as
well.
Features
• Supply voltage range: 2.7 to 3.6 V
• Access time: 100 ns (maximum)
• Standby current: 0.8 µA (Ta ≤ 60°C)
4.0 µA (Ta ≤ 70°C)
• Operating temperature: –10 to +70°C
• Data retention voltage: 2.0 to 3.6 V
• All I/O levels: CMOS compatible (0.8 VCC, 0.2 VCC)
• Input/output shared function pins, 3-state output pins
• No clock required (fully static circuits)
• Package
28-pin SOP (450 mil) plastic package:
LC35W256EM-10W
28-pin TSOP (8 × 13.4 mm) plastic package:
LC35W256ET-10W
Package Dimensions
unit: mm
3187A-SOP28D
unit: mm
3221-TSOP28 (Type I)
LC35W256EM, ET-10W
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
256K (32K words × 8 bits) SRAM
Control pins: OE and CE
CMOS IC
1
14
15
28
11.8
1.0
8.4
9.8
18.0
0.1
2.3
1.27
0.4
0.15
SANYO: SOP28D
[LC35W256EM-10W]
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
0.55
22 7
21 8
1
28
8.1
1.27max
11.8
13.4
0.5
0.2
0.125
0.08
SANYO: TSOP28 (Type I)
[LC35W256ET-10W]
Pin Assignment (Top view)
No. 6304-2/6
LC35W256EM, ET10W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
14
V
CC
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
1
I/O
2
I/O
3
GND
LC35W256EM-10W
SOP28
OE 22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A
11
A
10
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
GND
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
CE
A
9
A
8
A
13
WE
V
CC
A
14
A
12
A
7
A
6
A
5
A
4
A
3
TSOP28
LC35W256ET-10W
Block Diagram
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
V
CC
GND
I/O
1
I/O
8
CE
WE
OE
A0A1A2A3A4A
5
Address buffer
Row decoder
Memory cell array
512 × 512
Column I/O
circuit
Column decoder
Address buffer
Output
data
buffer
Input data buffer
Input data
control circuit
Pin Functions
No. 6304-3/6
LC35W256EM, ET10W
A0 to A14 Address input
WE Read/write control input
OE Output enable input
CE Chip enable input
I/O1 to I/O8 Data I/O
V
CC
, GND Power supply, ground
Function Table
Mode CE OE WE I/O Supply current
Read cycle L L H Data output I
CCA
Write cycle L X L Data input I
CCA
Output disable L H H High impedance I
CCA
Unselected H X X High impedance I
CCS
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
CC
max 4.6 V
Input pin voltage V
IN
–0.3* to VCC+ 0.3 V
I/O pin voltage V
I/O
–0.3 to VCC+ 0.3 V
Operating temperature Topr –10 to +70 °C
Storage temperature Tstg –55 to +125 °C
Specifications
Absolute Maximum Ratings
Note: * The minimum value is –2.0 V for pulse widths under 30 ns.
I/O Capacitances at Ta = 25°C, f = 1 MHz
Parameter Symbol Conditions
Ratings
Unit
min typ max
I/O pin capacitance C
I/OVI/O
= 0 V 6 10 pF
Input pin capacitance C
I
VIN= 0 V 6 10 pF
Note: All units are not tested; only samples are tested.
DC Allowable Operating Ranges at Ta = –10 to +70°C, VCC= 2.7 to 3.6 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
CC
2.7 3.0 3.6 V
Input voltage
V
IH
0.8V
CC
VCC+ 0.3
V
V
IL
–0.3* 0.2V
CC
V
Note: * The minimum value is –2.0 V for pulse widths under 30 ns.
No. 6304-4/6
LC35W256EM, ET10W
DC Electrical Characteristics at Ta = –10 to +70°C, VCC= 2.7 to 3.6 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Input leakage current I
LI
VIN= 0 to V
CC
–1.0 +1.0 µA
Output leakage current I
LO
VCE= VIHor VOE= VIHor VWE= V
IL
–1.0 +1.0 µA
V
I/O
= 0 to V
CC
Output high-level voltage
V
OH1IOH1
= –2.0 mA
VCC– 0.4
V
V
OH2IOH2
= –100 µA
VCC– 0.1
V
Output low-level voltage
V
OL1IOL1
= 2.0 mA 0.4 V
V
OL2IOL2
= 100 µA 0.4 V
I
CCA2VCE
= VIL, I
I/O
= 0 mA, VIN= VIHor V
IL
1.2 mA
Operating current drain
I
CCA3
VCE= VIL, VIN= VIHor V
IL
min cycle 15 18 mA
I
I/O
= 0 mA, DUTY 100 %
1 µs cycle 1.5 2.5 mA
Ta ≤ 25°C 0.01 µA
Standby mode I
CCS1
Ta ≤ 60°C 0.8 µA
current drain Ta ≤ 70°C 4.0 µA
I
CCS2VCE
= VIH, VIN= 0 to V
CC
0.4 mA
Note: * Reference values when VCC= 3 V and Ta = 25°C.
CMOS inputs
VCE≥ VCC– 0.2 V,
V
IN
= 0 to V
CC
VCC– 0.2 V/
0.2 V inputs
CMOS inputs
AC Electrical Characteristics at Ta = –10 to +70°C, VCC= 2.7 to 3.6 V
AC test conditions
Input pulse voltage levels: 0.2 VCCto 0.8 V
CC
Input rise and fall times: 5 ns
Input and output timing levels: 1/2 V
CC
Output load: 30 pF (including the jig capacitance)
Parameter Symbol min max Unit
Read cycle time t
RC
100 ns
Address access time t
AA
100 ns
CE access time t
CA
100 ns
OE access time t
OA
50 ns
Output hold time t
OH
10 ns
CE output enable time t
COE
10 ns
OE output enable time t
OOE
5ns
CE output disable time t
COD
35 ns
OE output disable time t
OOD
30 ns
Read Cycle
Parameter Symbol min max Unit
Write cycle time t
WC
100 ns
Address setup time t
AS
0ns
Write pulse width t
WP
80 ns
CE setup time t
CW
90 ns
Write recovery time t
WR
0ns
CE write recovery time t
WR1
0ns
Data setup time t
DS
50 ns
Data hold time t
DH
0ns
CE data hold time t
DH1
0ns
WE output enable time t
WOE
5ns
WE output disable time t
WOD
35 ns
Write Cycle
No. 6304-5/6
LC35W256EM, ET10W
Timing Charts
[Read cycle] *
1
A
0 to A14
CE
OE
*
5
D
OUT
1 to 8
t
RC
t
AA
t
OH
t
COD
t
OOD
t
CA
t
COE
t
OA
t
OOE
Output data valid
[Write cycle 1] (WE write) *
6
A
0 to A14
CE
WE
D
OUT
1to 8
DIN1 to 8
t
WC
t
CW
*
4
t
WP
*
3
*7
*2
*
5
*2
t
WR
t
WOE
t
AS
t
WOD
t
DS
t
DH
Data in stable
[Write cycle 2] (CE write) *
6
A
0 to A14
CE
WE
D
OUT
1to 8
DIN1 to 8
*
5
t
WC
t
CW
*
4
t
WP
*
3
t
WR1
t
AS
t
DS
t
DH1
Data in stable
High impedance
PS No. 6304-6/6
LC35W256EM, ET-10W
This catalog provides information as of Januarly, 2000. Specifications and information herein are subject
to change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
Notes:1. WE must be held at the high level during the read cycle.
2. Do not apply reverse phase signals to the DOUT pins when those pins are in the output state.
3. The time t
WP
is the period when both CE and WE are low. It is defined as the time from the fall of WE to the rise of CE or WE, whichever occurs
first.
4. The time t
CW
is the period when both CE and WE are low. It is defined as the time from the fall of CE to the rise of CE or WE, whichever occurs first.
5. The D
OUT
pins will be in the high-impedance state if any one of the following is held: OE is at the high level, CE is at the high level, or WE is at the
low level.
6. The OE pin must be either held high or held low during the write cycle.
7. D
OUT
has the same phase as the write data during this write cycle.
Parameter Symbol Conditions min max Unit
Data retention supply voltage V
DR
VCE≥ VCC– 0.2 V 2.0 3.6 V
Chip enable setup time t
CDR
0ns
Chip enable hold time t
R
tRC* ns
Note: * tRC: Read cycle time
Data Retention Characteristics at Ta = –10 to +70°C
Data Retention Waveforms (CE control)
V
CC
2.7 V
V
IH
V
DR
V
CE
GND
V
CE ≥ VCC –
0.2 V
t
CDR
t
R
Data retention mode
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