This module generates the 26MHz reference clock to drive the logic and RF.
It is turned on when the supply voltage +VCC_SYN is applied.
After buffering a reference clock of 26MHz is supplied to the other parts of the system
through the transceiver pin OUT.
4. TRANSCEIVER (U100)
This chip is fully integrated GSM GPRS tri-band transceiver with VCO, loop filters and most of the
passive component in it.
And also fully integrated fractional N RF synthesizer with AFC control possibility, RF VCO with integrated supply
regulator. Semi integrated reference oscillator with integrated supply regulator.
RF Receiver front-end amplifies the E-GSM900, DCS1800 and PCS1900 aerial signal, convert the chosen channel
down to a low IF of 100kHz.
In IF section, further amplifies the wanted channel output level to the desired value and rejects DC.
2) TX PART
The transmitter is fully differential using a direct up conversion architecture. It consists of a signal side band
power up mixer. Gain is controlled by 6 dB via 3-wire serial bus programing. The fully integrated VCO and power
mixer achieve LO suppression, quadrature phase error, quadrature amplitude balance and low noise floor specification.
Output matching/balun components drive a standard 50 ohms single ended load.
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Circuit Description
2. Baseband Circuit description of SGH-E350
1. PCF50603 (U400)
1.1. Power Management
Eight low-dropout regulators designed specifically for GSM applications power the terminal and help ensure optimal
system performance and long battery life. A programmable boost converter provides support for 1.8V, 3.0V SIMs,
while a self-resetting, electronically fused switch supplies power to external accessories. Ancillary support functions,
such as RTC module and High Voltage Charge pump, Clock generator, aid in reducing both board area and system
complexity.
I2C BUS serial interface provides access to control and configuration registers. This interface gives a microprocessor
full control of the PCF50603 and enables system designers to maximize both standby and talk times.
Supervisory functions. including a reset generator, an input voltage monitor, and a temperature sensor, support reliable
system design. These functions work together to ensure proper system behavior during start-up or in the event of a
fault condition(low microprocessor voltage, insufficient battery energy, or excessive die temperature).
1.2. Backlight Brightness Modulator
The Backlight Brightness Modulator (BBM) contains a programmable Pulse-width modulator (PWM) and FET to
modulate the intensity of a series of LED? s or to control a DC/DC converter that drives LCD backlight.
This phone (SGH-E350) use PWM control to contrast the backlight brightness.
1.3. Clock Generator
The Clock Generator (CG) generates all clocks for internal and external usage. The 32.768 kHz crystal oscillator
provides an accurate low clock frequency for the PCF50603 and other circuitry.
2. LCD Connector
LCD is consisted of main LCD(color 6.5K TFT LCD).
Chip select signals in the U305, LCD_CS, can enable LCD. BACKLIGHT signal enables white LED of main LCD. These
signal is from U400.
16-bit data lines(LD(0)~LD(15)) transfers data and commands to LCD. Data and commands use "RS" signal. If this signal
is high, Inputs to LCD are commands. If it is low, Inputs to LCD are data. The signal which informs the input or output
state to LCD, is required. But this system is not necessary this signal. So "L_WR" signal is used to write data or
commands to LCD. Power signals for LCD are "VDD_IO_HIGH".
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Circuit Description
4. Key
This is consisted of key interface pins KEY_ROW(0:4) and KEY_COL(0:4) in PCF5213EL1. These signals compose the
matrix. Result of matrix informs the key status to key interface in the PCF5213EL1. Power on/off key is seperated from
the matrix. So power on/off signal is connected with PCF50603 to enable PCF50603. Key LED is consisted of sixteen
blue LEDs.
key LED use the 3.3V LDO(U606) for a supply voltage. KEY_LED_ON signal enables eight white LED.
"FLIP" informs the status of slide (up or down) to the PCF5213EL1. This uses the hall effect IC, EM-1681-FT(U607).
A magnet under LCD enables EM-1681-FT.
5. EMI ESD Filter(F501,F502)
This system uses the EMI ESD filter, F501,F502 to protect noise from IF CONNECTOR part.
6. IF connetor(IFC500)
It is 18-pin connector. They are designed to use VBAT, V_EXT_CHARGE, USB_D+, +VBUS, USB_D-, TXD1, RXD1,
AUX_ON, EXT1, EXT2 and GND. They connected to power supply IC, microprocessor and signal processor IC.
7. Battery Charge Management IC(U501)
A complete constant-current/constant-voltage linear charger for single cell lithium-ion batteries is used.
If TA connected to phone, "V_EXT_CHARGE" enable charger IC and supply current to battery.
When fault condition caused, "CHG_ON" signal level change low to high and charger IC stop charging process.
8. Audio
HFR_P and HFR_N from PCF5213EL1 are connected to the main speaker via analog switches. MIC_P and MIC_N
are connected to the main MIC as well. EAR1 is the source of External Speaker. YMU762 is a synthesizer LSI for
mobile phones. This LSI has a built-in speaker amplifier for outputting sounds that are used by mobile phones in addition
to game sounds and ringing melodies that are replayed by a synthesizer.
The synthesizer section adopts“stereophonic hybrid synthesizer system”that are given advantages of both FM
synthesizers and Wave Table sy nthesizers to allow simultaneous generation of up to 32 FM voices and 32 Wave
Table voices.
It provides simultaneous generation of up to 40 tones by stereophonic hybrid synthesizer.
YMU762 has built a speaker amplifier of which maximum out is 580 mW at SPVDD=3.6V in this device.
There is Stereophonic analog output for Headphone.
9. Memory(U303)
This system uses Samsung's memory, KAP17SG00A. The KAP17SG00A is a Multi Chip Package Memory which
combines 256Mbit Synchronous Burst Multi Bank NOR Flash Memory and two 512Mbit OneNAND Flash and
128Mbit Synchronous Burst UtRAM.
It has 16 bit data line, HD[1~16] which is connected to PCF5213EL1 and MV3018SAQ, also has 24 bit address lines,
HA[1~24]. There are 3 chip select signals, CS0n_FLASH, CS4n_NAND, and CS1n_RAM.
In the Writing process, WEn is fallen to low and it enables writing process to operate. During reading process,
OEn is fallen to low and it enables reading process to operate. Each chip select signals in the PCF5213EL1 choose
different memories.
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Circuit Description
10. PCF5213EL1(U200)
The PCF5213EL1 is mainly composed of embeded DSP and ARM core. The DSP subsystem includes the Saturn
DSP core with embedded RAM and ROM, and a set of peripherals. It has 24kx16 bits PRAM, 104k*16 bits,
32k*16 XYRAM and 63k*16 XYROM in the DSP.
The ARM946E-S consists of an ARM9E-S processor core, 8 kbyte instruction cache and 8 kbyte data cache,
tghtly-coupled ITCM(Instruction Tightly Coupled Memory) and DTCM(Data Tightly Coupled Memory) memories, a
memory protection unit, and an AMBA(Advanced Microcontroller Bus Architecture) AHB(Advanced
High-performance Bus) bus interface with a write buffer.
HD(0:15), data lines and HA(0:23), address lines are connected to KAP17SG00A (memory), MV3018B (image dsp)
and YMU762 (melody IC). It has 64 kbyte SC RAM (0.5 Mbit) and 32 kbyte SC program ROM for bootstrap
loader in the ARM core.
HD(0:15), data lines and HA(0:23), address lines are connected to memory and YMU762 to communicate.
MV3018B(Camera DSP Chip) controls the communication between ARM core and DSP core.
OEn, WEn control the access of memory. KROW, and KCOL recognize the key string input status.
It has J-TAG control pins (TDI/TDO/TCK) for ARM and DSP core. J-SEL signal controls different access to ARM
and DSP core.
ADC(Analog to Digital Convertor) receives the condition of temperature, battery type and battery voltage.
11. TCO-5871U(26MHz)(U102)
This system uses the 26MHz TCXO, TCO-5871U, Toyocom. AFC control signal form PCF5213EL1 controls
frequency from 26MHz x-tal. It generates the clock frequency. This clock is connected to PCF5213EL1, YMU762 and
HD155166.
12. Camera DSP(MV3018SAQ)(U305)
MV3018SAQ provides rich video functions up to 30-frame display with minimized tasks in the handset main processor
as well as hardware based real-time JPEG compression and decompression. MV3018SAQ directly transmits and
previews the RGB data to the LCD graphic memory by processing the sensor output data according to the
handset's command. It can save the raw RGB data up to VGA resoultion into its image buffer and allows the
host processor to download with scalable sized compressed data.
It utilizes 16 bit data bus for communication with the main processor, including bus interface types.
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3. SGH-E350 Exploded View and its Parts list
1. Exploded View
QFU01
QKP02
QMO01
QSP01
QMP02
QFL01
QCR05
QSC01
QLC01
QME02
QPC01
QVK01
QAN02
QCA01
QFR01
QKP01
QCA02
QMI01
QMP01
QME01
QRF03
QCK01
QRF01
QVO01
QCW01
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