Samsung S6B0716X01-C0C8, S6B0716X11-C0C8 Datasheet
of this document may be reproduced or
transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express written
permission of LCD Driver IC Team.
S6B0716
33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD
January.2000
Ver. 3.0
Prepared by: Jae-Su, Ko
Ko1942@samsung.co.kr
Contents in this document are subject to change without notice. No part
33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
S6B0716 Specification Revision History
Version Content Date
0.0 Original
1.0
2.0 Reference voltage is only fixed VREF = 2.1V Mar.1999
2.1 Reference voltage could be used both VREF = 1.9V and VREF = 2.1V May.1999
COM PAD NAME modify (reference PAD Center Coordinate)
Reference voltage [VREF1]: 2.0V -> 2.1V (reference DC Characteristics)
3.0 Change VDD Range : 2.4V to 5.5V → 2.4V to 3.6V Jan.2000
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
CO
NTENTS
INTRODUCTION.................................................................................................................................................. 1
FEATURES ......................................................................................................................................................... 1
BLOCK DIAGRAM.............................................................................................................................................. 3
PAD CONFIGURATION....................................................................................................................................... 4
PAD CENTER COORDINATES........................................................................................................................... 5
PIN DESCRIPTION.............................................................................................................................................. 7
POWER SUPPLY......................................................................................................................................... 7
LCD DRIVER SUPPLY................................................................................................................................. 7
SYSTEM CONTROL .................................................................................................................................... 8
MICROPROCESSOR INTERFACE .............................................................................................................. 9
LCD DRIVER OUTPUTS.............................................................................................................................11
TEST PINS ..................................................................................................................................................11
FUNCTIONAL DESCRIPTION............................................................................................................................12
MICROPROCESSOR INTERFACE .............................................................................................................12
DISPLAY DATA RAM (DDRAM)..................................................................................................................16
LCD DISPLAY CIRCUITS ............................................................................................................................19
LCD DRIVER CIRCUIT................................................................................................................................21
POWER SUPPLY CIRCUITS.......................................................................................................................22
REFERECE CIRCUIT EXAMPLES..............................................................................................................28
RESET CIRCUIT.........................................................................................................................................29
INSTRUCTION DESCRIPTION...........................................................................................................................30
SPECIFICATIONS..............................................................................................................................................43
ABSOLUTE MAXIMUM RATINGS...............................................................................................................43
DC CHARACTERISTICS.............................................................................................................................44
REFERENCE DATA....................................................................................................................................47
AC CHARACTERISTICS.............................................................................................................................49
REFERENCE APPLICATIONS...........................................................................................................................53
MICROPROCESSOR INTERFACE .............................................................................................................53
3
S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
INTRODUCTION
The S6B0716 is a driver & controller LSI for graphic dot-matrix liquid crystal display systems. It contains 33 common
and 100 segment driver circuits. This chip is connected directly to a microprocessor, accepts serial or 8-bit parallel
display data and stores in an on-chip display data RAM of 65 x 132 bits. It provides a highly-flexible display section
due to 1-to-1 correspondence between on-chip display data RAM bits and LCD panel pixels. And it performs display
data RAM read/write operation with no external operating clock to minimize power consumption. In addition,
because it contains power supply circuits necessary to drive liquid crystal, it is possible to make a display system
with the fewest components.
FEATURES
Driver Output Circuits
− 33 common outputs / 100 segment outputs
On-chip Display Data RAM
− Capacity: 65 x 132 = 8,580 bits
− Bit data "1": a dot of display is illuminated
− Bit data "0": a dot of display is not illuminated
Multi-chip Operation (Master, Slave) Available
Applicable Duty-ratios
Duty ratio Applicable LCD bias Maximum display area
1/33 1/5 or 1/6
Microprocessor Interface
− 8-bit parallel bi-directional interface with 6800-series or 8080-series
− Serial interface (only write operation) available
Various Instruction Setting
On-chip Oscillator Circuit
On-chip Low Power Supply for LCD Driving Voltage Generation
− Voltage converter (x2, x3, x4)
− Voltage regulator (Temperature coefficient: -0.05%/°C, -0.2%/°C)
− Voltage follower (LCD Bias: 1/5 or 1/6)
On-chip Electronic Contrast Control Function (32 steps)
Operating Voltage Range
− Supply voltage (VDD): 2.4 to 3.6 V
− LCD driving voltage (VLCD = V0 - VSS): 4.0 to 15.0 V
Low Power Consumption
− 100 µΑ Typ. (VDD = 3V, x4 boosting, V0 = 8V, Internal power supply ON and display OFF)
− 10 µΑ Max. (standby mode)
Wide Operating Temperature Range
33 × 100
− Ta = -40°C to +85°C
CMOS Process
Package Type
− Bare die for COB
1
33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
Series Specifications
Product code TEMPS pin Temp. coefficient
S6B0716X01-C0C8
S6B0716X11-C0C8
(VSS connected)
(VDD connected)
0
1
-0.05%/°C 300 µm
-0.2%/°C
Package Chip thickness
COB
300 µm
2
S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
V
DB0
DB1
COMS
COM31
BLOCK DIAGRAM
SEG99
SEG98
SEG66
SEG65
VDD
V0
V1
V2
V3
V4
SS
SEG64
SEG1
SEG0
:
100 SEGMENT
DRIVER CIRCUITS
:
COM1
COM0
DRIVER CIRCUITS
:
:
33 COMMON
V0
VR
TEMPS
VOUT
C1-
C1+
C2-
C2+
C3-
C3+
V / F
CIRCUIT
V / R
CIRCUIT
V / C
CIRCUIT
PAGE
ADDRESS
CIRCUIT
I/O
BUFFER
DISPLAY DATA
CONTROL CIRCUIT
DISPLAY DATA RAM
65 X 132 = 8,580 Bits
COLUMN ADDRESS
CIRCUIT
STATUS REGISTER INSTRUCTION REGISTER
COMMON OUTPUT
CONTROL CIRCUIT
LINE
ADDRESS
CIRCUIT
INSTRUCTION DECODERBUS HOLDER
DISPLAY
TIMING
GENERATOR
CIRCUIT
OSCILLATOR
MS
CL
M
FRS
DISP
TESTL2
TESTL1
MPU INTERFACE (PARALLEL & SERIAL)
DB2
DB3
DB4
DB5
DB6(SCLK)
DB7(SID)
MI
RESETB
PS
RW_WR
E_RD
RS
CS2
CS1B
Figure 1. Block Diagram
3
33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
88
138
87
139
52
17451 1
рррррррррррр
- - -
рррррррррррр
рррррррррррр
- - -
рррррррррррр
S6B0716
PAD CONFIGURATION
ррр ррррррррррррррррррр
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Figure 2. S6B0716 Chip Configuration
- - - - - - - - - -
(TOP VIEW)
Y
(0,0)
- - - - - - - - - -
ррррррррррррррррррр
X
ððð
ррррррррррррррррррррррр
Table 1. S6B0716 Pad Dimensions
Size
Item Pad No.
X Y
Chip size - 5950 4300
Pad pitch All pad 110
Pad center size All pad 90 x 90
Chip thickness - 300
Unit
µm
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
PAD CENTER COORDINATES
Table 2. Pad Center Coordinates
[Unit: µm]
No. Name X Y No. Name X Y No. Name X Y
1 COM28 -2750 -2046 51 COM11 2750 -2046 101 SEG38 1320 2046
2 COM29 -2640 -2046 52 COM10 2871 -1925 102 SEG39 1210 2046
3 COM30 -2530 -2046 53 COM9 2871 -1815 103 SEG40 1100 2046
4 COM31 -2420 -2046 54 COM8 2871 -1705 104 SEG41 990 2046
5 COMS -2310 -2046 55 COM7 2871 -1595 105 SEG42 880 2046
6 TESTL1 -2200 -2046 56 COM6 2871 -1485 106 SEG43 770 2046
7 FRS -2090 -2046 57 COM5 2871 -1375 107 SEG44 660 2046
8 M -1980 -2046 58 COM4 2871 -1265 108 SEG45 550 2046
9 CL -1870 -2046 59 COM3 2871 -1155 109 SEG46 440 2046
10 DISP -1760 -2046 60 COM2 2871 -1045 110 SEG47 330 2046
11 MS -1650 -2046 61 COM1 2871 -935 111 SEG48 220 2046
12 RESETB -1540 -2046 62 COM0 2871 -825 112 SEG49 110 2046
13 PS -1430 -2046 63 SEG0 2871 -715 113 SEG50 0 2046
14 CS1B -1320 -2046 64 SEG1 2871 -605 114 SEG51 -110 2046
15 CS2 -1210 -2046 65 SEG2 2871 -495 115 SEG52 -220 2046
16 MI -1100 -2046 66 SEG3 2871 -385 116 SEG53 -330 2046
17 RS -990 -2046 67 SEG4 2871 -275 117 SEG54 -440 2046
18 RW_WR -880 -2046 68 SEG5 2871 -165 118 SEG55 -550 2046
19 E_RD -770 -2046 69 SEG6 2871 -55 119 SEG56 -660 2046
20 VDD -660 -2046 70 SEG7 2871 55 120 SEG57 -770 2046
21 DB0 -550 -2046 71 SEG8 2871 165 121 SEG58 -880 2046
22 DB1 -440 -2046 72 SEG9 2871 275 122 SEG59 -990 2046
23 DB2 -330 -2046 73 SEG10 2871 385 123 SEG60 -1100 2046
24 DB3 -220 -2046 74 SEG11 2871 495 124 SEG61 -1210 2046
25 DB4 -110 -2046 75 SEG12 2871 605 125 SEG62 -1320 2046
26 DB5 0 -2046 76 SEG13 2871 715 126 SEG63 -1430 2046
27 DB6 110 -2046 77 SEG14 2871 825 127 SEG64 -1540 2046
28 DB7 220 -2046 78 SEG15 2871 935 128 SEG65 -1650 2046
29 VSS 330 -2046 79 SEG16 2871 1045 129 SEG66 -1760 2046
30 VOUT 440 -2046 80 SEG17 2871 1155 130 SEG67 -1870 2046
31 CAP3P 550 -2046 81 SEG18 2871 1565 131 SEG68 -1980 2046
32 CAP3M 660 -2046 82 SEG19 2871 1375 132 SEG69 -2090 2046
33 CAP1P 770 -2046 83 SEG20 2871 1485 133 SEG70 -2200 2046
34 CAP1M 880 -2046 84 SEG21 2871 1595 134 SEG71 -2310 2046
35 CAP2P 990 -2046 85 SEG22 2871 1705 135 SEG72 -2420 2046
36 CAP2M 1100 -2046 86 SEG23 2871 1815 136 SEG73 -2530 2046
37 V0 1210 -2046 87 SEG24 2871 1925 137 SEG74 -2640 2046
38 VR 1320 -2046 88 SEG25 2750 2046 138 SEG75 -2750 2046
39 VSS 1430 -2046 89 SEG26 2640 2046 139 SEG76 -2871 1925
40 V1 1540 -2046 90 SEG27 2530 2046 140 SEG77 -2871 1815
41 V2 1650 -2046 91 SEG28 2420 2046 141 SEG78 -2871 1705
42 V3 1760 -2046 92 SEG29 2310 2046 142 SEG79 -2871 1595
43 V4 1870 -2046 93 SEG30 2200 2046 143 SEG80 -2871 1485
44 V0 1980 -2046 94 SEG31 2090 2046 144 SEG81 -2871 1375
45 TEMPS 2090 -2046 95 SEG32 1980 2046 145 SEG82 -2871 1265
46 TESTL2 2200 -2046 96 SEG33 1870 2046 146 SEG83 -2871 1155
47 COM15 2310 -2046 97 SEG34 1760 2046 147 SEG84 -2871 1045
48 COM14 2420 -2046 98 SEG35 1650 2046 148 SEG85 -2871 935
49 COM13 2530 -2046 99 SEG36 1540 2046 149 SEG86 -2871 825
50 COM12 2640 -2046 100 SEG37 1430 2046 150 SEG87 -2871 715
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33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
Table 2. Pad Center Coordinates (Continued)
[Unit: µm]
NO. Name X Y NO. Name X Y NO. Name X Y
151 SEG88 -2871 605
152 SEG89 -2871 495
153 SEG90 -2871 385
154 SEG91 -2871 275
155 SEG92 -2871 165
156 SEG93 -2871 55
157 SEG94 -2871 -55
158 SEG95 -2871 -165
159 SEG96 -2871 -275
160 SEG97 -2871 -385
161 SEG98 -2871 -495
162 SEG99 -2871 -605
163 COM16 -2871 -715
164 COM17 -2871 -825
165 COM18 -2871 -935
166 COM19 -2871 -1045
167 COM20 -2871 -1155
168 COM21 -2871 -1265
169 COM22 -2871 -1375
170 COM23 -2871 -1485
171 COM24 -2871 -1595
172 COM25 -2871 -1705
173 COM26 -2871 -1815
174 COM27 -2871 -1925
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
PIN DESCRIPTION
POWER SUPPLY
Table 3. Power Supply Pin Description
Name I/O Description
VDD Supply Power supply
VSS Supply Ground
LCD driver supply voltages
The voltage determined by LCD pixel is impedance-converted by an operational amplifier
for application.
V0
V1
V2
V3
V4
I/O
Voltages should have the following relationship;
V0 ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ VSS
When the internal power circuit is active, these voltages are generated as following table
according to the state of LCD Bias.
LCD bias V1 V2 V3 V4
1/6 bias (5/6) x V0 (4/6) x V0 (2/6) x V0 (1/6) x V0
1/5 bias (4/5) x V0 (3/5) x V0 (2/5) x V0 (1/5) x V0
LCD DRIVER SUPPLY
Table 4. LCD Driver Supply Pin Description
Name I/O Description
C1- O Capacitor 1 negative connection pin for voltage converter
C1+ O Capacitor 1 positive connection pin for voltage converter
C2- O Capacitor 2 negative connection pin for voltage converter
C2+ O Capacitor 2 positive connection pin for voltage converter
C3- O Capacitor 3 negative connection pin for voltage converter
C3+ O Capacitor 3 positive connection pin for voltage converter
VOUT I/O Voltage converter input / output pin
VR I V0 voltage adjustment pin
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33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
SYSTEM CONTROL
Table 5. System Control Pin Description
Name I/O Description
Master / slave operation select pin
− MS = "H": master operation
− MS = "L": slave operation
The following table depends on the MS status.
MS I
CL I/O
M I/O
FRS O
DISP I/O
TEMPS I
MS
H Enabled Input Output Output Output Output
L Disabled Disabled Input Input Output Input
Display clock input / output pin
When the S6B0716 is used in master/slave mode (multi-chip), the CL pins must be
connected each other for sync.
LCD AC signal input / output pin
When the S6B0716 is used in master/slave mode (multi-chip), the M pins must be
connected each other.
− MS = “H” : output
− MS = “L” : input
Static driver segment output pin
This pin is used together with the M pin.
LCD display blanking control input / output
When S6B0716 is used in master/slave mode (multi-chip), the DISP pins must be
connected each other.
− MS = “H” : output
− MS = “L” : input
Selects temperature coefficient of the reference voltage
− TEMPS = "L": -0.05%/°C
− TEMPS = "H": -0.2%/°C
OSC
circuit
Power
supply
circuit
CL M FRS DISP
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
MICROPROCESSOR INTERFACE
Table 6. Microprocessor Interface Pin Description
Name I/O Description
RESETB
PS I
MI I
CS1B
CS2
RS I
RW_WR
Reset input pin
I
When RESETB is “L”, initialization is executed.
Parallel / Serial data input select input
PS
Interface
mode
H Parallel
L Serial
Chip
select
CS1B,
CS2
CS1B,
CS2
Data /
instruction
RS DB0 to DB7
Data Read / Write Serial clock
RW_WR
RS SID (DB7) Write only SCLK (DB6)
*NOTE: In serial mode, it is impossible to read data from the on-chip RAM.
And DB0 to DB5 are high impedance and E_RD and RW_WR must
be fixed to either “H” or “L”.
Microprocessor interface select input pin
− MI = "H": 6800-series MPU interface
− MI = "L": 8080-series MPU interface
Chip select input pins
I
Data / instruction I/O is enabled only when CS1B is “L” and CS2 is “H”.
When chip select is non-active, DB0 to DB7 may be high impedance.
Register select input pin
− RS = "H": DB0 to DB7 are display data
− RS = "L": DB0 to DB7 are control data
Read / Write execution control pin
MI MPU Type RW_WR Description
Read / Write control input pin
H 6800-series
I
RW
− RW = “H”: read
− RW = “L”: write
Write enable clock input pin
L 8080-series
/WR
The data on DB0 to DB7 are latched at the rising
edge of the /WR signal.
E_RD
-
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33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
Table 6. Microprocessor Interface Pin Description (Continued)
Name I/O Description
Read / Write execution control pin
MI MPU Type E_RD Description
Read / Write control input pin
− RW = “H”: When E is “H”, DB0 to DB7 a re in an
E_RD I
H 6800-series
E
output status.
− RW = “L”: The data on DB0 to DB7 are latched at
the falling edge of the E signal.
DB0
to
DB7
I/O
L 8080-series
/RD
Read enable clock input pin
When /RD is “L”, DB0 to DB7 are in an output status.
8-bit bi-directional data bus that is connected to the standard 8-bit microprocessor data
bus. When the serial interface selected (PS = "L");
− DB0 to DB5: high impedance
− DB6: serial input clock (SCLK)
− DB7: serial input data (SID)
When chip select is not active, DB0 to DB7 may be high impedance.
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
LCD DRIVER OUTPUTS
Table 7. LCD Driver Outputs Pin Description
Name I/O Description
LCD segment driver outputs
The display data and the M signal control the output voltage of segment driver.
SEG0
to
SEG99
COM0
to
COM31
COMS O
O
O
Display data M
Segment driver output voltage
Normal display Reverse display
H H V0 V2
H L VSS V3
L H V2 V0
L L V3 VSS
Power save mode VSS VSS
LCD common driver outputs
The internal scanning data and M signal control the output voltage of common driver.
Scan data M Common driver output voltage
H H VSS
H L V0
L H V1
L L V4
Power save mode VSS
Common output for the icons. The output signals of two pins are same. When not used,
these pins should be left open. In multi-chip (master / slave) mode, all COMS pins on both
master and slave units are the same signal.
TEST PINS
Table 8. Test Pin Description
Name I/O Description
TESTL1
TESTL2
IC test pins with pull-up
I
These pins should be opened (floated).
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33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
FUNCTIONAL DESCRIPTION
MICROPROCESSOR INTERFACE
Chip Select Input
There are CS1B and CS2 pins for chip selection. The S6B0716 can interface with an MPU only when CS1B is “L”
and CS2 is “H”. When these pins are set to any othe r combination, RS, E_RD, and RW_WR inputs are disabled and
DB0 to DB7 are to be high impedance. And, in case of serial interface, the internal shift register and the counter are
reset.
Parallel / Serial Interface
S6B0716 has three types of interface with an MPU, which are one serial and two parallel interfaces. This parallel or
serial interface is determined by PS pin as shown in table 9.
Table 9. Parallel / Serial Interface Mode.
PS Type CS1B CS2 MI Interface mode
H Parallel CS1B CS2
L Serial CS1B CS2
Parallel Interface (PS = "H")
The 8-bit bi-directional data bus is used in parallel interface and the type of MPU is selected by MI as shown in table
10. The type of data transfer is determined by signals at RS, E_RD and RW_WR as shown in table 11.
Table 10. Microprocessor Selection for Parallel Interface
MI CS1B CS2 RS E_RD RW_WR
H CS1B CS2 RS E RW DB0 to DB7 6800-series
L CS1B CS2 RS /RD /WR DB0 to DB7 8080-series
Table 11. Parallel Data Transfer
Common
RS
H H H L H Display data read out
H H L H L Display data write
L H H L H Register status read
L H L H L Writes to internal register (instruction)
6800-series 8080-series
E_RD
(E)
RW_WR
(RW)
E_RD
(/RD)
RW_WR
(/WR)
H 6800-series MPU mode
L 8080-series MPU mode
*×
DB0 to DB7 MPU bus
Description
Serial-mode
*×: Don't care
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S6B0716 33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
Serial Interface (PS = "L")
When the S6B0716 is active, serial data (DB7) and serial clock (DB6) inputs are enabled. And not active, the internal
8-bit shift register and the 3-bit counter are reset. Serial data can be read on the rising edge of serial clock going into
DB6 and processed as 8-bit parallel data on the eighth serial clock. Serial data input is display data when RS is high
and control data when RS is low. Since the clock signal (DB6) is easy to be affected by the external noise caused by
the line length, the operation check on the actual machine is recommended.
CS1B
CS2
SID
SCLK
RS
DB6DB7DB0DB1DB2DB3DB4DB5DB6DB7
Figure 3. Serial Interface Timing
Busy Flag
The Busy Flag indicates whether the S6B0716 is operating or not. When DB7 is “H” in read status operation, this
device is in busy status and will accept only read status instruction. If the cycle time is correct, the microprocessor
needs not to check this flag before each instruction, which improves the MPU performance.
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33 COM / 100 SEG DRIVER & CONTROLLER FOR STN LCD S6B0716
Data Transfer
The S6B0716 uses bus holder and internal data bus for Data Transfer with the MPU. When writing data from the
MPU to on-chip RAM, data is automatically transferred from the bus holder to the RAM as shown in figure 4. And
when reading data from on-chip RAM to the MPU, the data for the initial read cycle is stored in the bus holder
(dummy read) and the MPU reads this stored data from bus holder for the next data read cycle as shown in figure 5.
This means that a dummy read cycle must be inserted between each pair of address sets when a sequence of
address sets is executed. Therefore, the data of the specified address cannot be output with the read display data
instruction right after the address sets, but can be output at the second read of data.
MPU signals
RS
/WR
DB0 to DB7
Internal signals
/WR
BUS HOLDER
COLUMN ADDRESS
N D(N) D(N+1) D(N+2) D(N+3)
N D(N) D(N+1) D(N+2) D(N+3)
N N+1 N+2 N+3
Figure 4. Write Timing
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