Samsung KM68257CP-20, KM68257CP-15, KM68257CLTG-15, KM68257CLP-15, KM68257CLP-12 Datasheet
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PRELIMINARY
KM68257C/CL CMOS SRAM
Document Title
32Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out.
Operated at Commercial Temperature Range.
Revision History
Rev No.
Rev. 0.0
Rev. 1.0
Rev. 2.0
Rev. 3.0
History
Initial release with Preliminary.
Release to final Data Sheet.
1. Delete Preliminary
Update A.C parameters
2.1. Updated A.C parameters
Items
tOE - / 8/10ns - / 7 /9 ns
tCW - /12/ - ns - /11/ - ns
tHZ 8/10/10ns 6/7/8ns
tOHZ - / 8 / - ns - / 7 / - ns
tDW - / 9 / - ns - / 8 / - ns
2.2. Add Voh1=3.95V with the test condition as Vcc=5V±5% at 25°C
3.1. Add 28-TSOP1 Package.
3.2. Add L-version.
3.3. Add Data Rentention Characteristics.
Previous spec.
(12/15/20ns part)
Updated spec.
(12/15/20ns part)
Draft Data
Apr. 1st, 1994
May 14th,1994
Oct. 4th, 1994
Feb. 22th, 1996
Remark
Preliminary
Final
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this
device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 -
Rev 3.0
February-1996
PRELIMINARY
KM68257C/CL CMOS SRAM
32K x 8 Bit High-Speed CMOS Static RAM
FEATURES
¡Ü
Fast Access Time 12, 15, 20§À(Max.)
¡Ü
Low Power Dissipation
Standby (TTL) : 40§Ì(Max.)
(CMOS) : 2§Ì(Max.)
0.1§Ì(Max.)- L-ver. only
Operating KM68257C/CL - 12 : 165§Ì(Max.)
KM68257C/CL - 15 : 150§Ì(Max.)
KM68257C/CL - 20 : 140§Ì(Max.)
¡Ü
Single 5.0V±10% Power Supply
¡Ü
TTL Compatible Inputs and Outputs
¡Ü
I/O Compatible with 3.3V Device
¡Ü
Fully Static Operation
- No Clock or Refresh required
¡Ü
Three State Outputs
¡Ü
Low Data Retention Voltage : 2V(Min.)- L-ver. only
¡Ü
Standard Pin Configuration
KM68257C/CLP : 28-DIP-300
KM68257C/CLJ : 28-SOJ-300
KM68257C/CLTG : 28-TSOP1-0813, 4F
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
Pre-Charge-Circuit
GENERAL DESCRIPTION
The KM68257C is a 262,144-bit high-speed Static Random
Access Memory organized as 32,768 words by 8 bits. The
KM68257C uses 8 common input and output lines and has an
output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNG's
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The KM68257C is packaged in
a 300 mil 28-pin plastic DIP, SOJ or TSOP1 forward.
PIN CONFIGURATION(Top View)
OE
A11
A9
A8
A13
WE
Vcc
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TSOP1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
Vss
I/O3
I/O2
I/O1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A12
A13
A14
I/O1 ~ I/O8
CS
WE
OE
Data
Cont.
CLK
Gen.
Memory Array
512 Rows
64x8 Columns
Row Select
I/O Circuit
Column Select
A0 A1 A2 A9 A10 A11
1
A14
2
A12
3
A7
4
A6
5
A5
6
A4
7
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
8
9
10
11
12
13
14
SOJ/DIP
PIN FUNCTION
Pin Name Pin Function
A0 - A14 Address Inputs
WE Write Enable
CS Chip Select
OE Output Enable
I/O1 ~ I/O8 Data Inputs/Outputs
VCC Power(+5.0V)
VSS Ground
28
Vcc
27
WE
26
A13
25
A8
24
A9
23
A11
22
OE
21
A10
20
CS
19
I/O8
18
I/O7
17
I/O6
16
I/O5
15
I/O4
- 2 -
Rev 3.0
February-1996
PRELIMINARY
KM68257C/CL CMOS SRAM
ABSOLUTE MAXIMUM RATINGS*
Parameter Symbol Rating Unit
Voltage on Any Pin Relative to VSS VIN, VOUT -0.5 to 7.0 V
Voltage on VCC Supply Relative to VSS VCC -0.5 to 7.0 V
Power Dissipation PD 1.0
Storage Temperature TSTG -65 to 150 °C
Operating Temperature TA
* Stresses greater than those listed under "Absolute Maximum Rating" may cause permanent damage to the device. This is a stress ra ting only and func-
tional operation of the device at these at these or any other conditions above those indicated in the operating sections of thi s specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
0 to 70
RECOMMENDED DC OPERATING CONDITIONS(TA=0 to 70°C)
Parameter Symbol Min Typ Max Unit
Supply Voltage VCC 4.5 5.0 5.5 V
Ground VSS 0 0 0 V
Input Low Voltage VIH 2.2 - VCC+0.5** V
Input Low Voltage VIL -0.5* - 0.8 V
W
°C
* VIL(Min) = -2.0(Pulse Width≤10ns) for I≤20§Ì
** VIH(Max) = VCC+2.0V(Pulse Width ≤10ns) for I≤20
§Ì
DC AND OPERATING CHARACTERISTICS(TA=0 to 70°C,VCC=5.0V±10% unless otherwise specified)
Parameter Symbol Test Conditions Min Max Unit
Input Leakage Current ILI VIN = VSS to VCC -2 2
Output Leakage Current ILO
Operating Current ICC
ISB Min. Cycle, CS=VIH - 40
Standby Current
Output Low Voltage Level VOL IOL=8mA - 0.4 V
Output High Voltage Level
* VCC=5.0V±5% Temp.=25°C
ISB1
VOH IOH=-4mA 2.4 - V
VOH1* IOH1=0.1mA - 3.95 V
CS=VIH or OE=VIH or WE=VIL
VOUT = VSS to VCC
Min. Cycle, 100% Duty
CS=VIL, VIN = VIH or VIL,
IOUT=0mA
f=0MHz, CS≥VCC-0.2V,
VIN≥VCC-0.2V or VIN≤0.2V
-2 2
12ns - 165
15ns - 150
20ns - 140
Normal - 2
L-ver - 0.1
µA
µA
§Ì
§Ì
§Ì
CAPACITANCE*(TA =25°C, f=1.0MHz)
Item Symbol Test Conditions MIN Max Unit
Input/Output Capacitance CI/O VI/O=0V - 8 pF
Input Capacitance CIN
* NOTE : Capacitance is sampled and not 100% tested.
VIN=0V
- 3 -
- 7 pF
February-1996
Rev 3.0
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