Samsung KM416V4100CS-L6, KM416V4100CS-L5, KM416V4100CS-L45, KM416V4100CS-6, KM416V4100CS-45 Datasheet
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KM416V4000C, KM416V4100C CMOS DRAM
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) are
optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung′s
advanced CMOS process to realize high band-width, low power consumption and high reliability.
• Part Identification
- KM416V4000C/C-L(3.3V, 8K Ref.)
- KM416V4100C/C-L(3.3V, 4K Ref.)
• Fast Page Mode operation
• 2CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic TSOP(II) packages
• +3.3V±0.3V power supply
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
FEATURES
• Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal L-ver
KM416V4000C* 8K
64ms 128ms
KM416V4100C 4K
• Performance Range
Speed
tRAC tCAC tRC tPC
-45 45ns 12ns 80ns 31ns
-5 50ns 13ns 90ns 35ns
-6 60ns 15ns 110ns 40ns
• Active Power Dissipation
Speed 8K 4K
-45 324 468
-5 288 432
-6 252 396
Unit : mW
Control
Clocks
Lower
Data out
Buffer
RAS
UCAS
LCAS
W
Vcc
Vss
DQ0
to
DQ7
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Memory Array
4,194,304 x 16
Cells
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
Sense Amps & I/O
Upper
Data in
Buffer
Upper
Data out
Buffer
Lower
Data in
Buffer
DQ8
to
DQ15
OE
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
KM416V4000C, KM416V4100C CMOS DRAM
PIN CONFIGURATION (Top Views)
VCC
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
N.C
VCC
W
RAS
N.C
N.C
N.C
N.C
A0
A1
A2
A3
A4
A5
VCC
VSS
DQ15
DQ14
DQ13
DQ12
VSS
DQ11
DQ10
DQ9
DQ8
N.C
VSS
LCAS
UCAS
OE
N.C
N.C
A12(N.C)*
A11
A10
A9
A8
A7
A6
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
Pin Name Pin function
A0 - A12 Address Inputs(8K Product)
A0 - A11 Address Inputs(4K Product)
DQ0 - 15 Data In/Out
VSS Ground
RAS Row Address Strobe
UCAS Upper Column Address Strobe
LCAS Lower Column Address Strobe
W Read/Write Input
OE Data Output Enable
VCC Power(+3.3V)
N.C No Connection
(400mil TSOP(II))
*(N.C) : N.C for 4K Refresh Product
•KM416V40(1)00CS
KM416V4000C, KM416V4100C CMOS DRAM
ABSOLUTE MAXIMUM RATINGS
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to
the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Parameter Symbol Rating Units
Voltage on any pin relative to VSS VIN,VOUT -0.5 to +4.6 V
Voltage on VCC supply relative to VSS VCC -0.5 to +4.6 V
Storage Temperature Tstg -55 to +150 °C
Power Dissipation PD 1 W
Short Circuit Output Current IOS Address 50 mA
RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70 °C)
*1 : VCC+1.3V at pulse width ≤15ns which is measured at VCC
*2 : -1.3 at pulse width ≤15ns which is measured at VSS
Parameter Symbol Min Typ Max Units
Supply Voltage VCC 3.0 3.3 3.6 V
Ground VSS 0 0 0 V
Input High Voltage VIH 2.0 -
VCC+0.3
*1
V
Input Low Voltage VIL
-0.3
*2
- 0.8 V
DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.)
Parameter Symbol Min Max Units
Input Leakage Current (Any input 0≤VIN≤VCC+0.3V,
all other pins not under test=0 Volt)
II(L) -5 5 uA
Output Leakage Current
(Data out is disabled, 0V≤VOUT≤VCC)
IO(L) -5 5 uA
Output High Voltage Level(IOH=-2mA) VOH 2.4 - V
Output Low Voltage Level(IOL=2mA) VOL - 0.4 V
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