Samsung K6T4008C1B-GP55, K6T4008C1B-GL70, K6T4008C1B-GF55, K6T4008C1B-GB70, K6T4008C1B-GB55 Datasheet
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K6T4008C1B Family
Document Title
512Kx8 bit Low Power CMOS Static RAM
Revision History
CMOS SRAM
Revision No.
0.0
0.1
1.0
2.0
3.0
History
Initial Draft
Revise
- Changed Operating current by reticle revision
ICC at write : 35mA → 45mA
ICC1 at read/write : 15/35mA → 10/45mA
Finalize
- Changed Operating current
ICC1 at write : 45mA → 40mA
ICC2; 90mA → 80mA
- Change test load at 55ns : 100pF → 50pF
Revise
- Change datasheet format
Revise
- Industrial product speed bin change:70/100ns → 55/70ns
Draft Date
December 7, 1996
March 6, 1997
October 9, 1997
February 17, 1998
September 8, 1998
Remark
Advance
Preliminary
Final
Final
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 3.0
September 1998
K6T4008C1B Family
512Kx8 bit Low Power CMOS Static RAM
CMOS SRAM
FEATURES
• Process Technology: TFT
• Organization: 512Kx8
• Power Supply Voltage: 4.5~5.5V
• Low Data Retention Voltage: 2V(Min)
• Three state output and TTL Compatible
• Package Type: 32-DIP-600, 32-SOP-525
32-TSOP2-400F/R
PRODUCT FAMILY
Product Family Operating Temperature Vcc Range Speed
K6T4008C1B-L
K6T4008C1B-B
K6T4008C1B-P
Commercial (0~70°C)
Inderstrial (-40~85°C)
4.5~5.5V
551)/70ns
K6T4008C1B-F
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
A15
A17
WE
A13
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
A8
27
A9
26
32-TSOP2
25
(Reverse)
24
23
22
21
20
19
18
17
1
A18
A16
2
A14
3
A12
4
A7
5
A6
6
A5
7
A4
8
9
A3
A2
10
A1
11
A0
12
I/O1
13
I/O2
14
I/O3
15
VSS
16
A18
A16
A14
A12
I/O1
I/O2
I/O3
VSS
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
32-DIP
7
32-SOP
8
32-TSOP2
9
(Forward)
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
GENERAL DESCRIPTION
The K6T4008C1B families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support
various operating temperature ranges and various package
types for user flexibility of system design. The family also
support low data retention voltage for battery back-up operation with low data retention current.
Power Dissipation
Standby
(ISB1, Max)
100µA
20µA
Operating
(ICC2, Max)
PKG Type
32-DIP-600, 32-SOP-525
32-TSOP2-400F/R
80mA
100µA
50µA
32-SOP-525
32-TSOP2-400F/R
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
A18
A16
A14
A12
A7
A6
A5
A4
A1
A0
I/O1 Data
I/O8
Row
select
cont
Data
cont
Precharge circuit.
Memory array
1024 rows
512×8 columns
I/O Circuit
Column select
Pin Name Function
A9 A8 A13A17A15 A11A10
A3
A2
WE Write Enable Input
CS Chip Select Input
OE Output Enable Input
A0~A18 Address Inputs
CS
WE
OE
Control
logic
I/O1~I/O8 Data Inputs/Outputs
Vcc Power
Vss Ground
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
2
Revision 3.0
September 1998
K6T4008C1B Family
PRODUCT LIST
Commercial Temperature Products(0~70°C) Industrial Temperature Products(-40~85°C)
Part Name Function Part Name Function
K6T4008C1B-DL55
K6T4008C1B-DB55
K6T4008C1B-DL70
K6T4008C1B-DB70
K6T4008C1B-GL55
K6T4008C1B-GB55
K6T4008C1B-GL70
K6T4008C1B-GB70
K6T4008C1B-VB55
K6T4008C1B-VB70
K6T4008C1B-MB55
K6T4008C1B-MB70
FUNCTIONAL DESCRIPTION
CS OE WE I/O Pin Mode Power
H
L H H High-Z Output disbaled Active
L L H Dout Read Active
L
1. X means don′t care.( Must be in low or high state.)
32-DIP, 55ns, L-pwr
32-DIP, 55ns, LL-pwr
32-DIP, 70ns, L-pwr
32-DIP, 70ns, LL-pwr
32-SOP, 55ns, L-pwr
32-SOP, 55ns, LL-pwr
32-SOP, 70ns, L-pwr
32-SOP, 70ns, LL-pwr
32-TSOP2-F, 55ns, LL-pwr
32-TSOP2-F, 70ns, LL-pwr
32-TSOP2-R, 55ns, LL-pwr
32-TSOP2-R, 70ns, LL-pwr
1)
X
1)
X
CMOS SRAM
K6T4008C1B-GP55
K6T4008C1B-GF55
K6T4008C1B-GP70
K6T4008C1B-GF70
K6T4008C1B-VF55
K6T4008C1B-VF70
K6T4008C1B-MF55
K6T4008C1B-MF70
1)
X
L Din Write Active
High-Z Deselected Standby
32-SOP, 55ns, L-pwr
32-SOP, 55ns, LL-pwr
32-SOP, 70ns, L-pwr
32-SOP, 70ns, LL-pwr
32-TSOP2-F, 55ns, LL-pwr
32-TSOP2-F, 70ns, LL-pwr
32-TSOP2-R, 55ns, LL-pwr
32-TSOP2-R, 70ns, LL-pwr
ABSOLUTE MAXIMUM RATINGS
Item Symbol Ratings Unit Remark
Voltage on any pin relative to Vss VIN,VOUT -0.5 to 7.0 V Voltage on Vcc supply relative to Vss VCC -0.5 to 7.0 V Power Dissipation PD 1.0 W Storage temperature TSTG -65 to 150 °C -
Operating Temperature TA
Soldering temperature and time TSOLDER 260°C, 10sec(Lead Only) - -
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
1)
0 to 70 °C K6T4008C1B-L/-B
-40 to 85 °C K6T4008C1B-P/-F
3
Revision 3.0
September 1998
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