Samsung Firenze II Schematic

4
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PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
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4
FIRENZE II
CPU :
Chip Set :
Remarks :
Model Name :
PBA Name :
PCB Code :
Dev. Step : Revision :
T.R. Date :
DRAW
3
3
Intel Yonah (533/667MHz) RC410MD & SB450
Mobility Platform
FIRENZE II
MAIN
GCE : BA41-00659A TPT : BA41-00671A
PRR X03
2006.03.30
CHECK
APPROVAL
2
2
1
1
Table of Contents
Sheet 1. COVER Sheet 2 - 7. DIAGRAM (Block/Power) & ANNOTATIONS Sheet 8. CLOCK GENERATOR Sheet 9 - 11. YONAH Sheet 12. THERMAL SENSOR / FAN CONTROL Sheet 13 - 17. RC410MD/RC410ME Sheet18. DDR II SODIMM Sheet19. DDR II TERMINATION Sheet20 - 23. SB450 Sheet24. SB450 STRAPS Sheet25. FIRMWARE Sheet26. LCD Sheet27. CRT AND TV CONN Sheet28-29. CARDBUS Sheet30. 6 IN 1 Sheet31. MINIPCI Sheet32-34. AUDIO Sheet35. HDD & ODD Sheet36. MICOM Sheet37. LID S/W & WLAN ON/OFF S/W & DMB Sheet38. LOM Sheet39. LAN & MDC CONN &USB Sheet40. LED & BLUETOOTH & TOUCHPAD & KEYBOARD Sheet41. CHARGE Sheet42. P3.3V _AUX & P5V_AUX Sheet43. P1.2V & VCCP Sheet44. DDR2 POWER Sheet45. CPU VRM Sheet46. P2.5V/P1.5V POWER & SWITCHED POWER Sheet47. P1.8V_ALW Sheet48. POWER STRAPS
Sheet49-50. TP
D
D
C
C
B
B
TERMI
Owner :
4
4
HJ KIM
SEC Mobile R & D
SJ PARK
Signature :
A
A
X
2
3
3
2
1
1
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D
C
4
PG 32
AUDIO
AMP
ALC260
PG 33
B
PG 34
HP MIC-IN
SPKR R
SPKR L
Audio
AZALIA
Codec
PG 32
4P
CRT
PG 27
TV
PG 27
SVHS / Composit
PG 39
PG 33
PG 26
CRT/TV
USB 0,1,2,3
RJ11
PG 39
LCD
LVDS
PG 35
PG 35
1ch
ANT
Bluetooth
AZALIA
MDC 1.5
HDD
ODD
30P
PG 40
Clocking
CK-410 for ATI
12P
PG 39
3
FAN
PG 12
CPU
Thermal
Sensor
PG 12
Internal Graphics
56 PIN
PG 8
USB 0,1,2,3
AZALIA Primary
AZALIA Secondary
Mobile Processor
(533/667MHz)
PG 9,10,11
North Bridge RC410MD/
RC410ME
South Bridge
USB4
PATA
PATA
Yonah
L2 Cache : 2 MB 478pin
2-Lane A-Link Express
707 FCBGA
SB450
564 BGA
PG 13 ~ 17
PG 20 ~ 23
3.3V LPC, 33MHz
Single channel
USB5
PCI
CPU VRM
IMVP-6
PG 45
2
DDR II 667/533
Wireless LAN
CONN.
Mini PCI
PG 31
33MHz, 3.3V PCI
FirmWare
System
ANT
DMB (F/O)
PG 25
MICOM
Hitachi H8S
2110B
PG 36
DC/DC
Connector
Thermistor
DDR II SODIMM 0
DDR II SODIMM 1
PG 37
DDR II
PG 12
PG 18
PG 18
CARDBUS Module
PG 40
Touch
PAD
KBD
PG 40
Charging
Circuit
PG 41
DDR II
VRM
PG 44
CARDBUS
R5C843
PG 28, 29
10/100 LOM
RTL8100CL
PG 38
1
Switched PWR
PG 46
SD/xD/MS PCMCIA
RJ45 PG 39
D
C
PG 30 PG 29
B
A
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4
3
2
Power Diagram
1
D
AC Adapter
Battery DC
C
B
Rail
+V*Always +V*AUX +V SUSPWR PWRON
State
Full On ON S3 ON ON OFF H L S4 ON ON OFF H L S5 ON OFF OFF L L
ON ON H H
VDC
VRON
H L L L
P5.0V_ALW
MICOM_P3.3V
P1.8V_ALW
KBC3_SUSPWR
KBC3_PWRON
P5.0V_AUX P5.0V
P3.3V_AUX
P2.5V_LAN
MEM1_REF
P1.8VP1.8V_AUX
P1.5V
P0.9V
P3.3V
P1.2V
KBC3_VRONKBC3_LANPWRON
P1.05V
(VCCP)
VCC_NB
P1.2V
YONAH NB
SB
VCCP3_PWRGD
D
VCC_CORE
YONAH
C
B
NB
A A
S5 / S4
4 2
3
S3 S0
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D
POWER
S/W
DC/DC B’d
5
4
3) MICOM_P3V
RHU002N06
(KBC3_RST*)
13
9
C
A
KBC
5) POWER_SW*
KBC Sub B’d
4) P3.3V_AUX
4) P3.3V_AUX
4) P3.3V_AUX
LOM
82573EZ
Sheet 43-44
8
10
6
3-1
4) P2.5V_LAN
4) P2.5V_LAN
4) P2.5V_LAN
Sheet52
13) KBC3_PWRGD
20) PLT3_RST*
9) CHP3_SLPS5*/S3*
8) KBC3_PWRBTN*
7) P3.3V_AUX
10) KBC3_PWRON
6) KBC3_SUSPWRON
KBC3_LANPWRON
4
VDC
SI4435
Sheet47
3
P3.3V_LAN & P5V_AUX
MAX 8734
(1/2)
Sheet48
P5V_AUX & P3V_AUX
MAX 8734
(2/2)
Sheet48
FDS6680A
DC/DC B’d
2
2) VDC
10-1) KBC3_VRON
6) KBC3_SUSPWRON
7) P5V_AUX
7
6) KBC3_SUSPWRON
7) P3.3V_AUX
7
Sheet 46
4
3
1
RTC
Battery
Sheet 20
13) KBC3_PWRGD
POWER SEQUENCE
1) PRTC_BAT
18) VRM3_CPU_PWRGD
13) KBC3_PWRGD
P3.3V_AUX
(MICOM_P3V)
19
19) CPU1_PWRGDCPU
20) PLT3_RST*
20) PCI3_RST*
12) ICH_CORE (P1.05V)
11) P2.5V
11) P3.3V
7
11) P1.2V
12) P1.05V (VCCP)
14) VCCP3_PWRGD
7) P1.8V_AUX
11) 0.9V
11) P5V
FDS4465
Sheet 52
FDS6680A
Sheet 52
Sheet 52
FDS6680A
Sheet 52
10) KBC3_PWRON
10-1) KBC3_VRON
PWROK
VRMPWRGD
9
7) P1.05V_AUX
SB450
P1.5V & VCCP
ISL6227
Sheet 49
DDR2 POWER
MAX8632
Sheet 50
INTVRMEN
20
Sheet 20-23
7) P5V_AUX
10) KBC3_PWRON*
7) P3.3V_LAN
10) KBC3_PWRON*
7) P3.3V_AUX
11) P1.5V
10) KBC3_PWRON
7) P1.8V_AUX
10) KBC3_PWRON
2
Rev. 0.8
Thermal
Monitor
SC338A
Sheet 12
20
11
11) P5V
11) P3.3V
11) P2.5V
11) P1.8V
CLOCK
CHIP
Sheet 8
CPU VRM
14
Sheet 51
19) CPU1_PWRGDCPU
11) P2.5V
11) P1.5V
20) PLT3_RST*
7) P1.8V_AUX
11) P0.9V
12) MCH_CORE
11) P3.3V
7) P1.8V_AUX
11) P0.9V
20) PLT3_RST*
11) P1.8V
11) P2.5V
11) GFX_CORE
11) P1.2V
11) P1.8V
11) P3.3V
20) PCI3_RST*
16) CLK3_PWRGD*
16) VRM3_CPU_PWRGD
15) VCC_CORE
15
11) P1.5V
12) P1.05V
1
16
16) CLK3_PWRGD*11) P3.3V
17
Sheet 9-11
Sheet 18 - 19
Sheet 34-35
17) Clock Running
CPU
19
21
Sheet 13 - 17
GMCH
12
18
DDR2
Memory
MiniPCI
CardBus
SAMSUNG
D
C
22) CPU1_CPURST*
BB
A
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D
4
220V
Adapter Battery
MICOM 3V ( TBD A )
1.8V ( TBD A )
3
2
POWER RAILS ANALYSIS
This sheet should be updated !!!
Rev. 0.8
1
S0 - S5 S0 - S3 OFF IN S3 - S5
D
5V_AUX ( TBD A )
3.3V_AUX ( TBD A ) CPU CORE ( TBD A )
1.05V ( TBD A )
1.5V ( TBD A )
2.5V ( TBD A )
3.3V ( TBD A ) 5V ( TBD A )
1.8V_AUX ( TBD A )
C
0.9V_AUX ( TBD A )
P1.2V_ALW (TBD A)
P2.5V_ALW (TBD A)
P3.3V_ALW ( TBD A )
VGA CORE (TBD A)
PEX IO (TBD A)
VDC INV ( TBD A )
RTC_Battery
B
P1.2V_ALWAYS P2.5V_ALWAYS P3.3V_ALWAYS
TBD A (TBD) TBD A (TBD) TBD A (TBD)
LAN (TBD)
1.05V
CPU CORE
1.05V (VCCP)
1.5V
1.05V (MCH CORE)
1.05V (VCCP)
1.5V
2.5V
3.3V
1.8V_AUX
1.05V (ICH CORE)
1.05V (VCCP)
1.5V
3.3V
3.3V_AUX 5V 5V_AUX RTC_Battery
1V-1.2V (VGA CORE)
1.8V
2.5V
1.2V (PEX IO,PLLVDD)
3.3V
1.8V_AUX
0.9V_AUX
1.8V
3.3V (LCD 3V, 0.23A) 19V (VDC INV, 0.23A)
0.1 A (TBD)
28A
2.5A
0.3 A (TBD)
4.8 A (TBD) 2A
1.3 A (TBD)
0.2 A (TBD)
0.12 A (TBD)
2.7 A (TBD)
1.3 A (TBD)
0.4 A (TBD)
1.3 A (TBD)
0.2 A (TBD)
0.12 A (TBD)
2.7 A (TBD)
2.7 A (TBD)
0.01 A (TBD)
3.1 A (TBD) 1 A (TBD)
0.7A
(TBD)
0.5A
ITP
Yonah-2M
( 31 W )
*1.5V : 13.4 A (TBD)
RC410MD/ME
SB450
( ~ 2.0 W )
(Dual slots)
DDR-2
( ~ 5.0 W )
LCD
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
0.1 A (TBD)
0.3 A (TBD)
0.2 A (TBD)
0.01 A (TBD)
0.02 A (TBD)
0.06 A (TBD)
0.07 A (TBD)
1 A (TBD) 1 A (TBD)
0.3A
1 A (TBD)
2 A (TBD)
0.2 A (TBD)
Thermal Sensor
CLOCK
KeyBoard
KBD LED
FWH
HD Audio
HDD
PATA
ODD
FAN
Audio AMP
USB (x 4)
Touch Pad
MICOM 3V
3.3V
MICOM 3.3V
1.8V
3.3V
3.3V_AUX
3.3V_AUX
3.3V_AUX
5.0V_AUX
3.3V
3.3V_AUX
5.0V
3.3V
3.3V_AUX
5.0V
0.08 A (TBD)
0.08 A (TBD)
0.1 A (TBD)
0.14 A (TBD)
0.1 A (TBD)
0.1 A (TBD)
0.1 A (TBD)
1.2 A (TBD) 1 A (TBD)
0.7 A (TBD)
0.2 A (TBD)
0.4 A (TBD)
0.3 A (TBD)
0.01 A (TBD)
0.3 A (TBD)
KBC
PWR LED
C
R5C841
SD Card
Card Bus
Mini PCI
MDC
B
A
Value by Datasheet/Application notes (Value by measurement)
4
23
1
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3
2
1
D
CLK0_HCLK0 CLK0_HCLK0*
YONAH
D
CLK1_MCLK0
CLK0_HCLK1 CLK0_HCLK1*
RC410MD/
CLK1_PCIEICH CLK1_PCIEICH*
C
CLK3_NB14M
CLK1_PCIERCLK
CLOCK GENERATOR
CLK1_PCIERCLK*
ICS951413CGLFT(Rev.C) CY28RS400ZXCT(Rev.B)
RC410ME
SB450
CLK1_MCLK0* CLK1_MCLK1
CLK1_MCLK1* CLK1_MCLK3
CLK1_MCLK3* CLK1_MCLK4
CLK1_MCLK4*
CLK3_33M_MIN
CLK3_PCLKLAN
CLK3_PCLKFWH
SODIMM1
DDR2
SODIMM2
DDR2
MINIPCI
RTL8100CL
FWH
C
25MHz
CLK3_USB48
CLK3_PCLKMICOM
B
CLK3_ICH14
32.768KHz
MICOM
10MHz
B
CLK3_FM48
A
4
14.318 MHz
3
R5C843
A
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PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
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DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
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SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
D
4
3
2
2
1
1
D
D
PCI Devices
Devices IDSEL# REQ/GNT# Interrupts Cardbus
LAN C MINIPCI A,B USB
Hub to PCI LPC bridge/IDE/AC97/SMBUS Internal MAC AC Link - --
AD25 AD21 AD23 2 AD30(internal)
AD31(internal) AD31(internal)
AD31(internal)
0 E,F,G 1
-
-
-
-
-
Voltage Rails
VDC VCC_CORE
C
C
P0.9V P1.2V 1.2V switched power rail (off in S3-S5) P1.5V
P1.8V P1.8V_AUX
MICOM_P3V P3.3V P3.3V_AUX
P5V P5V_AUX 5.0V power rail (off in S4-S5)
P2.5V_ALWS P1.2V_ALWS 1.2V power rail (Always On)
2
I C / SMB Address
B
B
Devices Address SB450 SODIMM0
SODIMM1
Primary DC system power supply (7 to 21V) Core voltage for DOTHAN (1.308~1.068V) DOTHAN/ALVISO Processor System Bus(PSB) Termination (1.05V)VTT MCH-M Core Voltage
0.9V switched power rail (off in S3-S5)
1.5V switched power rail (off in S3-S5)
1.5V power rail (off in S4-S5)P1.5V_AUX
1.8V switched power rail (off in S3-S5)
1.8V power rail(off in S4-S5)
2.5V switched power rail (off in S3-S5)P2.5V
3.3V always on power rail for MICOM
3.3V switched power rail (off in S3-S5)
3.3V power rail (off in S4-S5)
3.3V power rail (off in S4-S5)P3.3V_DTV
5.0V switched power rail (off in S3-S5)
3.3V power rail (Always On)P3.3V_ALWS
2.5V power rail (Always On)
Master 1010 0000
1010 001X
Hex
­A0h
A2h D2hCK-410 (Clock Generator) 1101 001x
USB PORT Assign
PORT NUMBER ASSIGNED TO 0, 1
2, 3 5
SYSTEM PORT A SYSTEM PORT B BLUETOOTH4 DMB
-
-
-
-
--
-
Bus SMBUS Master
-
­Clock, Unused Clock Output Disable
Crystal / Oscillator
TYPE FREQUENCY DEVICE
Crystal MICOM H8S-2110B
32.768KHzCrystal 10MHz
14.318MHzCrystal CLOCK-Generator CK-410M 25MHzCrystal LAN LOM
SB450
USAGE Real Time Clock
CPU Core Voltage Table
VID(5:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
1
0
0
0
0
1
0
0
0
1
0
-
1
0
0
0 0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
1
0
1
0 0
1
0
1
0
1
0
1
0
1
1
0
0
0
0
1
00
0
0
1
0
0
0
1
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0 0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
0 0
1
1
1
1
1
1
0
1
1
1
0
1
1
1
0
Voltage
0
0
1.708 V
0
1
1.692 V
1
0
1.676 V
1
1
1.660 V
0
0
1.644 V
0
1
1.628 V
1
0
1.612 V
1
1
1
1
1.596 V
0
0
1.580 V
0
1
1.564 V
1
0
1.548 V
1
1
1.532 V
0
0
1.516 V
0
1
1.500 V
110
1.484 V
1
1.468 V
0
0
1.452 V
0
1
1.436 V
0
1
1.420 V
1
1
1.404 V
1.388 V
0
0
1.372 V
1
0
1.356 V
0
1
1
1
1
1.340 V
1
0
0
1.324 V
1
0
1.308 V
0
1
1.292 V
1.276 V
1
1
0
0
1.260 V
1.244 V
1
0
1.228 V
1
0
1.212 V
1
1
HFM Voltage 770:1.26V->1.372V
730,740,750,760:1.26->1.356V
VID(5:0) 1
0
1
0
1
0 0
1 1
0
1
0
1
0 0
1
-
1
0
1
0
1
0
1 1
0
1
0 0
1
0
1
0
1
1
1
1
1
1
1
1
1 1
1
1
1 11 1
1
1
1
1
1 1
1
1
1 1
1
1
1 1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
0
1
0 0
1 1
1
0
0
1
0
1
0
1 1
0 1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
0
1 1
0
1
0
1
0 1
1
1
1
1
1
1
1
1.196 V
1
0
1.180 V
0
1
1.164 V
1
1
1.148 V
0
1.132 V
0
1
1.116 V
0
0
1.100 V
1
1
1
1.084 V
1
0
0
1.068 V
1
0
1.052 V
0
1.036 V
1 1
1
1.020 V
0
0
1.004 V
1
0.988 V
0
0
0.972 V
1
1
0.956 V
1 0
0
0.940 V
1
0.924 V
1
0
0.908 V
1
1
0.892 V
0
0.876 V
0
0
0.860 V
1
0.844 V
1
0
1
1
1
0.828 V
0
0.812 V
0
0
0.796 V
1
1
0.780 V
0
0.764 V
1
1
0
0
0.748 V
0
0.732 V
1
1
0.716 V
0
1
0.700 V
1
Voltage
0
0
Lowest Freq.
C
C
B
B
System Power States
A
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits. CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume. CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power. Memory is retained, and refreshes continue. All clocks stop except RTC clock. Externally appears same as S5, but may have different wake events.
4
4
3
3
A
A
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2
1
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
FSB
FSA
D
CPU
BSEL0
BSEL1
0 0 0 0 1 1 1 1
CPU1_BSEL1
C
CPU1_BSEL2
4 2
FSC
HOST CLK
BSEL2
0
0 0 1 1 0 0 1 1
8-B1 10-C3
266 MHz 333 MHz
1 0
200 MHz
1
400 MHz
0
133 MHz
1
100 MHz 166 MHz
0
RSVD
1
R587
10-C38-B1
R588
R590
FSB 533 MHz
B
Celeron 533MHz Yonah 667MHz
VCCP
1K
0
0
14.31818MHz
R720
C718
0.022nF
2
Y501
3
P3.3V
100nF
100nF
C141
C692
VDDA VSSA
CPUT0 CPUC0 CPUT1 CPUC1 CPUT2 CPUC2
SRCT0 SRCC0
SRCST0 SRCSC0 SRCST1 SRCSC1
SRCT1 SRCC1 SRCT2 SRCC2 SRCT3 SRCC3 SRCT4 SRCC4 SRCT5 SRCC5
CLKREQ0 CLKREQ1
USB_48
FSC REF1_FSB REF0_FSA
REF2
MMZ1608S121AT B512
C716
10000nF
6.3V
39 38
47 46 43 42 41 40
34 33
30 29 27 28
24 25 22 23 18 19 16 17 12 13
10 11
4 50
9 53 54 52
R156
33
R707 R706 R709 R673
R675 R674
R677 R676
C140
100nF
33 33 33 33
33 33
33 33
1% 1% 1% 1%
1% 1%
1% 1%
P3.3V
B24
MMZ1608S121AT
C142
10000nF
6.3V
Route all CLK1 signal as different pair rule
1%
1%
1%
1%
49.9
49.9
49.9
49.9
R672
R671
R679
R678
1%
33
R711
33
R712 R713 R701 R703
R710 R708
1%
4.7K
4.7K
4.7K 1%
33
1%
33
51-B3 14-B3 51-C2
1%
1%
1%
1%
49.9
49.9
49.9
49.9
R670
R705
R704
R702
50-A2
10-C3 8-C4 10-C3 8-C4
50-D1 23-C3
FSA, FSB, FSC of Clock chip are low thershold inputs Vih_fs_min = 0.7V
Vil_fs_max - 0.35V
Pt decoupling CAPS close to Clock Chip power pin
100nF
100nF
100nF
100nF
C704
P3.3V
B513 MMZ1608S121AT
C719
100nF
1M
CLK3_PWRGD*
CHP3_CPUSTP*
1
SMB3_CLK
SMB3_DATA CLK3_USB48
C717
0.022nF
36-C3 45-C4 51-D4
51-B320-B4
18-B216-B4
16-B4
R1608-SHORT
0
R715
23-D4 50-B223-C318-B4
50-B2
R714
0
R1608-SHORT
R669
475 1%
23-C418-B2 18-B4 23-C3
U505 ICS951413CGLFT
45
VDDCPU
35
VDD_SRC
32
VDD_SRC1
21
VDD_SRC2
14
VDD_SRC3
3
VDD_48
51
VDD_PCI
56
VDD_REF
44
VSS_CPU
36
VSS_SRC
31
VSS_SRC1
26
VSS_SRC2
20
VSS_SRC3
15
VSS_SRC4
5
VSS_48
49
VSS_PCI
55
VSS_REF
1
XIN
2
XOUT
6
VTTPWRGD*_PD
48
CPU_STP*
7
SCLK
8
SDATA
37
IREF
Compatible Components
ICS951413CGLFT(Rev.C) CY28RS400ZXCT(Rev.B)
C703
C105
100nF
C705
C706
PCIF0_CK410*
10-D3 10-D3 16-B3 16-B3
14-B3
51-C2 20-D451-B2
29-B? 23-D250-D1
16-B350-D1
1
CLK0_HCLK0 CLK0_HCLK0* CLK0_HCLK1 CLK0_HCLK1*
CLK1_PCIEICH CLK1_PCIEICH*
CLK1_PCIERCLK CLK1_PCIERCLK*
CLK3_FM48 CPU1_BSEL2
CPU1_BSEL1 CPU1_BSEL0
CLK3_ICH14 CLK3_NB14M
D
C
B
Place all te serias termination resistor as close as Clock Chip as possible
A
SAMSUNG
ELECTRONICS
4
3
2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
CPU1_A*(16:3)
CPU1_ADSTB0*
CPU1_REQ*(4:0)
CPU1_A*(31:17)
13-D2
13-D2 13-D2
13-D2
C
CPU1_ADSTB1*
13-C2
CPU1-1 YONAH2M-SOCKET
R1
A16*
P1
A15*
P4
A14*
L1
A13*
P2
A12*
P5
A11*
N3
A10*
J1
A9*
N2
A8*
M1
A7*
K5
A6*
M3
A5*
L4
1 / 4
A4*
J4
A3*
L2
ADSTB0*
L5
REQ4*
J3
REQ3*
K2
REQ2*
H2
REQ1*
K3
REQ0*
Y1
A31*
W2
A30*
Y4
A29*
W5
A28*
W3
A27*
T3
A26*
T5
A25*
R4
A24*
U2
A23*
Y5
A22*
U4
A21*
W6
A20*
R3
A19*
U5
A18*
Y2
A17*
V4
ADSTB1*
3704-001153|bga_479p_sock
ADS* BNR*
BPRI*
BR0*
DBSY*
DEFER*
DRDY*
HIT*
HITM* IERR*
INIT* LOCK* TRDY*
RESET*
RS2*
RS1*
RS0*
A20M*
FERR*
IGNNE*
LINT0 LINT1
SMI*
STPCLK*
34
2
1
VCCP
R586 56
CPU1_D*(15:0)
H1 E2 G5 F1
E1 H5 F21
G6 E4
D20 B3 H4 G2
B1
51-B3 13-B2
G3 F4 F3
A6 A5
20-A3 9-B2
C4
C6 B4 A3
51-D2
D5
13-B2
13-C2 13-C213-C2
13-C2 13-C2 13-C2
13-B2 13-C2
20-A3 13-C2 13-C2
13-B2 13-B2 13-B2
20-A3
20-A3
20-A3 20-A3 20-A3 20-A3
9-B2
CPU1_ADS* CPU1_BNR* CPU1_BPRI* CPU1_BREQ*
CPU1_DBSY* CPU1_DEFER* CPU1_DRDY*
CPU1_HIT* CPU1_HITM*
CPU1_INIT* CPU1_LOCK* CPU1_TRDY*
CPU1_CPURST* CPU1_RS2* CPU1_RS1* CPU1_RS0*
CPU1_A20M* CPU1_FERR* CPU1_IGNNE*
CPU1_INTR CPU1_NMI CPU1_SMI* CPU1_STPCLK*
CPU1_DBI0* CPU1_DSTBN0* CPU1_DSTBP0*
CPU1_D*(31:16)
CPU1_DBI1* CPU1_DSTBN1* CPU1_DSTBP1*
13-D1
13-D1 13-D1 13-D1
13-D1
13-C1 13-C1 13-C1
CPU1-2 YONAH2M-SOCKET
H25
D15*
K22
D14*
F26
D13*
H26
D12*
J23
D11*
J24
D10*
G24 K24 E23 E25 G25 F23 H22 E26 F24 E22
H23 G22
N24 T25
R24 T24 P23 P22 P25 M23
R23 P26 K25 N22 M26 M24 N25
J26
L26
L23 L22 L25
D9* D8* D7* D6* D5* D4* D3* D2* D1* D0* DINV0* DSTBN0* DSTBP0*
D31* D30* D29* D28* D27* D26* D25* D24* D23* D22* D21* D20* D19* D18* D17* D16* DINV1* DSTBN1* DSTBP1*
2 / 4
3704-001153|bga_479p_sock
D47* D46* D45* D44* D43* D42* D41* D40* D39* D38* D37* D36* D35* D34* D33* D32*
DINV2* DSTBN2* DSTBP2*
D63* D62* D61* D60* D59* D58* D57* D56* D55* D54* D53* D52* D51* D50* D49* D48*
DINV3* DSTBN3* DSTBP3*
AA24 AC26 Y22 Y26 AA26 Y23 W22 AB25 U22 U25 U23 W25 V26 V24 AB24 AA23 V23 W24 Y25
AF26 AF22 AF25 AE25 AD21 AE21 AD24 AF23 AE22 AD20 AC25 AB21 AA21 AB22 AC23 AC22 AC20 AD23 AE24
13-D1
13-B1 13-B1 13-B1
13-D1
13-B1 13-A1 13-A1
CPU1_D*(47:32)
CPU1_DBI2* CPU1_DSTBN2* CPU1_DSTBP2*
CPU1_D*(63:48)
CPU1_DBI3* CPU1_DSTBN3* CPU1_DSTBP3*
D
C
B
**NOTE
RHE SUPPORTER
MT504
RMNT-38-70-1P
MT505
RMNT-38-70-1P
A
4
MT508
RMNT-38-70-1P
MT507
RMNT-38-70-1P
3
VCCP
R581
R561
B
56
200
13-B2 9-D3
9-C320-A3
CPU1_FERR*
CPU1_BREQ*
A
SAMSUNG
ELECTRONICS
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3 2
1
D
C
GTLREF : Keep the Voltage divider within 0.5" of the first GTLREF0 pin with Zo=55ohm trace. Minimize coupling of any switching signals to this net.
B
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm) trace shorter than 1/2" to their respective Banias socket pins.
Check CPU Power Page (P46)& SB450(P20)
VCCP
R560
470
3
1
CHP3_DPRSLPVR
A
R558
470
51-C245-C420-A3
2
Q514 MMBT3904
R589
R517
1K
1%
R518
2K
1%
R559
R1608-SHORT
VCCP
75
VCCP
C586
220pF
0
10-D3
CLK0_HCLK0
CLK0_HCLK0*
CPU1_SLP*
CPU1_DPSLP*
CPU1_DPRSTP*
CPU1_DPWR*
CPU1_PWRGDCPU
CPU1_PSI*
CPU1_VID(6:0)
CPU2_THERMDA CPU2_THERMDC
CPU1_THRMTRIP*
CPU1_BSEL2 CPU1_BSEL1
CPU1_BSEL0
R523 R524 R525 R526
CPU1_VCCSENSE
51-C2 45-B4 11-C4
CPU1_VSSSENSE
CPU1_DPRSTP*
R563
1K
1%
8-C1 8-C1
20-D120-A3
20-D120-B4 10-A4 13-C2 20-A3 51-C220-D1 45-B4 45-B4 51-C3 51-D3
12-C2 51-D2 12-C2 51-D2 12-A2 51-B2
8-C48-B1 8-B1 8-C4
1%
54.9
1%
27.4
1%
54.9
1%
27.4
49.9
R562
1%
CPU1-3 YONAH2M-SOCKET
A22
BCLK0
A21
BCLK1
D7
SLP*
B5
DPSLP*
E5
DPRSTP*
D24
DPWR*
D6
PWRGOOD
AE6
PSI*
AE2
VID6
AF2
VID5
AE3
VID4
AF4
VID3
AE5
VID2
AF5
VID1
AD6
VID0
D21
PROCHOT*
A24
THERMDA
A25
THERMDC
C7
THERMTRIP*
C21
BSEL2
B23
BSEL1
B22
BSEL0
AD26
GTLREF
V1
COMP3
U1
COMP2
U26
COMP1
R26
COMP0
AF7
VCCSENSE
AE7
VSSSENSE
11-C445-B451-C2
C26
TEST1
D25
TEST2
D2
RSVD1
F6
RSVD2
D3
RSVD3
C1
RSVD4
AF1
RSVD5
D22
RSVD6
3704-001153|bga_479p_sock
3 / 4
R512
56
VCCA
VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8
VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16
PREQ*
PRDY*
BPM3* BPM2* BPM1* BPM0*
TCK
TDO TMS
TRST*
DBR*
RSVD7
RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
VCCP
TDI
56
R511
B26 K6
J6 M6 N6 T6 R6 K21 J21 M21 N21 T21 R21 V21 W21 V6 G21
AC1 AC2 AC4 AD1 AD3 AD4
AC5 AA6 AB3 AB5 AB6 C20
C23 C24 AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3 T22 B25
56
R513
50-C4 10-C2
R514
56
10-C250-C4 10-C250-C4
10-C2
50-C4 10-A3 50-C4
50-C4 10-A3
R585
R1608-SHORT
CPU1_TDI CPU1_TMS CPU1_TCK CPU1_TRST*
0
C568
10nF 25V
10-A3
10-A3 23-C351-D2
P1.5V
VCCP
C569
10000nF
6.3V
EC508 330uF
2.5V AD
CPU1_TCK CPU1_TDI
CPU1_TMS CPU1_TRST*
ITP3_SYSRST*
CPU Core Voltage Table
Active Mode
VID(6:0)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DPRSLPVR DPRSTP* PSI2*
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0 0
0
1
0
1
0 0
1
0 0
1
0
1
0
0 1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0 0
1
0
0
1
0
0
1
1
0
0
0
0 0
1
0
0
1
0
1
1
0
0
1
0
1
1
0
1
1
0
11
1
1
1
0
0
0 0
1
0 1
0
0 1
1
0 1
0
0 0
1
1
1
1
0
1
1
1
0
0
0 1
0
0
0
1
0
1
1
0 1
0
0 0
1
1
1
1
0 1
1
1
1 1.2125 V
1
0
0
0
0
0
1 0
0
1 1
0
1
0
0
1
1
0
1
1
1
0
1
1
1
0
0
0
01
0 0
1
0
1
1
0
0
0
1 1
0
1
1
0
1
1
1
1
1
1
Active 0 1 0 or 1
Voltage
1.5000 V
1.4875 V
1.4750 V
1.4625 V
1.4500 V
1.4375 V
1.4250 V
1.4125 V
1.4000 V
1.3875 V
1.3750 V
1.3625 V
1.3500 V
1.3375 V
1.3250 V
1.3125 V
1.3000 V
1.2875 V
1.2750 V
1.2625 V
1.2500 V
1.2375 V
1.2250 V
1.2000 V
1.1875 V
1.1750 V
1.1625 V
1.1500 V
1.1375 V
1.1250 V
1.1125 V
1.1000 V
1.0875 V
1.0750 V
1.0625 V
1.0500 V
1.0375 V
1.0250 V
1.0125 V
Active/Deeper Sleep Dual Mode Region
VID(6:0)
0
0
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1 1
0
1
0
1
1
0
1
1
1
0 0
1
1
0
1 1
0
1
0
1
1
1
1
0
0
0
1
0
0
1
0
1
0
0
0
1
0
1
0
0
0
1
0
1
0
0 0
1
0 0
1
0
1
0
0 0
0
1
0
0
1
0
0
1 1
0
0
1
0
0
0
1
1
0
DPRSLPVR DPRSTP* PSI2*
IMVP-6
0
0
1
0 0.9875 V
0
1
1
1
0 0
1
1
1
1
0
1
1
0 1
1
1
1
1
1
11 0
0 0.9000 V
0
0
0
0 0
0
1 1
0
0 1
0
0
1
0
0 10
0
1 0.8250 V
0
1
1
0
0
1 1
0
0 0
1
1 1
01
1
1
0
1
0
1
11
1
1
1
1
1
1
1 0
0
0
0
0
0
0
1
0
1 0.6625 V
0
0
1
0
0
0
1
0
0
110.6250 V
1
0
1
0
0
1
0
0
1
1
0
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1 0
0
0
0
0
Deeper Slp 1 0 0 or 1
Deeper Sleep/Extended Deeper Sleep Dual Mode Region
Voltage
VID(6:0)
1
1
1.0000 V
0 1
0.9750 V
0 1
0.9625 V
0
0.9500 V
1
0.9375 V
0
0.9250 V
0.9125 V
1 0
0.8875 V
1
0.8750 V
0 1
0.8625 V
0.8500 V
0 1
0.8375 V
1
0.8125 V
0
0.8000 V
1
0.7875 V
0
0.7750 V
1
0.7625 V
0.7500 V
0
0.7375 V
1
0.7250 V
0 1
1
0.7125 V
0
0.7000 V
0.6875 V
1 0
0.6750 V
1
0.6500 V
0 1
0.6375 V
0
0.6125 V
1
0.6000 V
0
0.5875 V
1 0
0.5750 V
0.5625 V
1 0
0.5500 V
0.5375 V
1 0
0.5250 V
0.5125 V
1 0 0.5000 V1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
0
1
1
1
0
0
1
0
1 1
0
1
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
1 1
1
1
1
1
1
1
1
1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1 1
1
1
1
1
1 1
1
1 1
1
1
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
0
0
01
0
1
0
0
1
0
1
0
0
0
1
0
0
10
1
1
0
1 0
1
0
0
0
1
0
0
1
1
0
1
11
1
1
0
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
1
0
0
0
1
0 0
0 0.2375 V
1 1
1 0.2250 V
0
1
1
0
0
0
1
01
0
1
0
1
1 1 0.1625 V
1
0 1
1
0
1
0 0.1375 V
1
1
1
1 1
1
1
0
0
01 0
0
0
0
1
0
1
0
0
0
0
1
0
1
0
1
1
0
1
1
0
0
1
0
1
0
1
0 1
0
1
0
1
1
1
0
1
1
0
1
1
1
1 1
1
1
SAMSUNG
0 1 0 1
1 0 1 0
0 1 0 1 0 1 0 1 0 1 0 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Voltage
0.4875 V
0.4750 V
0.4625 V
0.4500 V
0.4375 V
0.4250 V
0.4125 V
0.4000 V
0.3875 V
0.3750 V
0.3625 V
0.3500 V
0.3375 V
0.3250 V
0.3125 V
0.3000 V
0.2875 V
0.2750 V
0.2625 V
0.2500 V
0.2125 V
0.2000 V
0.1875 V
0.1750 V
0.1500 V
0.1250 V
0.1125 V
0.1000 V
0.0875 V
0.0750 V
0.0625 V
0.0500 V
0.0375 V
0.0250 V
0.0125 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
ELECTRONICS
D
C
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4 3
2
1
D
C
B
CPU1_VCCSENSE
CPU1_VSSSENSE
CHECK BULK CAP USING IF IT DOUBLED
R516
10-B3 45-B4 51-C2
R515
VCCP
EC505 330uF
2.5V AD
C529 100nF
VCC_CORE
100 1%
100 1%
51-C245-B410-B3
C545 100nF
C525
C524 C523
C521
C530
10000nF
10000nF
10000nF
10000nF
6.3V
6.3V
6.3V
6.3V
C594 C588 10000nF
10000nF
6.3V
6.3V
C522 C536
100nF100nF
C592 10000nF
6.3V
C587 10000nF
6.3V
C547
10000nF
6.3V
C591 10000nF
6.3V 6.3V
C538 100nF100nF
C526
C527
10000nF
10000nF
6.3V
6.3V 6.3V
C590
C593
10000nF
10000nF
6.3V
C528 10000nF
C589
6.3V 6.3V
C507 10000nF
C546 10000nF
C506 10000nF
6.3V6.3V
C543 10000nF10000nF
6.3V
C509
C512 C513
10000nF
10000nF
6.3V
6.3V
C542
C544
10000nF10000nF
6.3V
C511 10000nF
6.3V
C539 C537
C540 10000nF
10000nF
6.3V
6.3V6.3V
10000nF
6.3V
C510 10000nF
6.3V
C541 10000nF
6.3V
C508 10000nF
6.3V
10000nF
6.3V
AB26 AA25
AD25
AE26 AB23
AC24
AF24 AE23
AA22 AD22 AC21
AF21
AB19
AA19 AD19 AC19
AF19
AE19
AB16
AA16 AD16 AC16
AF16
AE16
AB13
AA14 AD13 AC14
AF13
AE14
AB11
AA11 AD11 AC11
AF11
AE11
AB8 AA8 AD8 AC8 AF8 AE8 AA5 AD5 AC6 AF6 AB4 AC3 AF3 AE4 AB1 AA2 AD2 AE1
D
T26
J25
M25
N26
VSS140
VSS137
VSS138
AB20 AA20 AF20 AE20 AB18 AB17 AA18 AA17 AD18 AD17 AC18 AC17 AF18 AF17 AE18 AE17 AB15 AA15 AD15 AC15 AF15 AE15 AB14 AA13 AD14 AC13 AF14 AE13 AB12 AA12 AD12 AC12 AF12 AE12 AB10
AA10 AD10 AC10 AF10 AE10
AB9 AA9 AD9 AC9 AF9 AE9
AB7 AA7 AD7 AC7
R25
VSS141
VSS142
V25
W26
VSS139
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50
VSS143
VSS144
H24
VSS145
G23
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54
B6
VSS55
C5
VSS56
F5
VSS57
E6
VSS58
H6
VSS59
J5
VSS60
A8
D8
F8
E8
G26
K26
VSS130
VSS131C8VSS132
VSS133
VSS134
VSS135
VSS136
CPU1-4
YONAH2M-SOCKET
4 / 4
VSS150
VSS151
VSS152
VSS147
VSS148
P24
N23
VSS149
T23
U24
Y24
VSS153
W23
VSS146
L24
K23
F11
E11
VSS128B8VSS129
VSS154
J22
H21
D11
C11
VSS126
VSS127
VCC100
VSS155
VSS156
L21
M22
A11
VSS124
VSS125
VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99
VSS157
VSS158
P21
E14
B11
VSS123
VSS159
V22
R22
F13
VSS121
VSS122
B20 A20 F20 E20 B18 B17 A18 A17 D18 D17 C18 C17 F18 F17 E18 E17 B15 A15 D15 C15 F15 E15 B14 A13 D14 C13 F14 E13 B12 A12 D12 C12 F12 E12 B10 B9 A10 A9 D10 D9 C10 C9 F10 F9 E10 E9 B7 A7 F7 E7
VSS160
VSS161
Y21
U21
VCC_COREVCC_CORE
VSS162
VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100
VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61
C14 D13 A14 B13 E16 F16 C16 D16 A16 B16 E19 F19 C19 D19 A19 B19 E21 F22 C22 B21 E24 D23 A23 B24 F25 C25 D26 A26 W1 V2 R2 T1 N1 M2 J2 K1 G1 F2 C2 D1 W4 Y3 U3 T4 N4 P3 L3 K4 G4 H3 E3 D4 A4 Y6 U6 V5 R5 P6 L6 M5
C
B
A
SAMSUNG
ELECTRONICS
4
3
2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
3
CPU Thermal Sensor
2
1
Refer To Thermal Sensor Layout Guidelines.
- Place the Thermal Sensor close to a remote diode.
- Keep traces away from high voltage (+12V bus)
- Keep traces away from fast data buses and CRT signal.
- Use recommended trace widths and spacings (10mil)
D
- Place a ground plane under the traces.
- Use guard traces flanking DXP and DXN and connecting to GND
U7
VDD
DPLUS
U8 ELM7S08WS
4
0
1 2 3 4
P3.3V_AUX
C62
100nF
42-B151-C4
R89
10K
C63
2.2nF
THERM_STP*
51-D2 10-C3
10-C351-D2
51-C3 23-D3 23-C1
CPU2_THERMDA
CPU2_THERMDC
CHP3_OVERT*
KBC3_FANCTRL
FAN Control Logic
P5.0V
Line Width = 20 mil
C26
D6
10000nF
21
6.3V
MBR0540T1
Q6 SI3456DV
4
1
S
D1
2
D2
5
100
R26
51-D236-C3
R25
100K
D3 D463G
L3
10uH
600mA
J5 HDR-2P-SMD
1 2
3711-000541
FAN Connector
C
B
MICOM_P3.3V
R816
R88
2.2K
R87
2.2K
8 7 6 5
SMBCLK SMBDATA ALERT* GND
W83L771W/G
DMINUS
T_CRIT_A*
10K
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
C
THRM_ALERT*
51-A236-B3 36-C3 51-A2 51-D4
P3.3V_AUX
5
1
THRM_ALERT* OTP3_OVERT*
51-D4
12-A3 51-A3
+
2
-
3
R819
B
MICOM_P3.3V
P3.3V_AUX
VCCP
R86
0
V+
VTEMP
3
GND
2
HYST
OS*
15
LM26CIM5X-TPA U6
C61
100nF
4
12-B351-A3
OTP3_OVERT*
CPU1_THRMTRIP*
10-C3 51-B2
R80
56
R79
2K 1%
1
R101
10K
3
2
Q16 MMBT3904
23-D351-B2
CHP3_SBTHRMTRIP*
A A
SAMSUNG
ELECTRONICS
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
DUCT + FAN SUPPORTER
M1 HEAD DIA LENGTH
C
M500 HEAD DIA LENGTH
M3 HEAD DIA LENGTH
B
A
M503 HEAD DIA LENGTH
M4 HEAD DIA LENGTH
M502 HEAD DIA LENGTH
CHP3_SUSSTAT*
POWER FOR PLL
CHP3_NBRST*
P3.3V_AUX
23-D3 36-B3 51-C2
51-A420-C1
VCCP
R636
49.9 1%
R637
C624
100
1000nF
1%
6.3V
PLACE CLOSE TO NB USE 10/10MIL WIDTH/SPACE
R815
4.7K
D14
3
P1.8V_AUX
3
BAT54A
12
C623
220pF
R667
200K
R668
330K
CPU1_A*(31:3)
CPU1_REQ*(4:0)
CPU1_ADSTB0*
CPU1_ADSTB1*
CPU1_ADS* CPU1_BNR*
CPU1_BPRI*
CPU1_DEFER*
CPU1_DRDY* CPU1_DBSY*
CPU1_DPWR*
CPU1_LOCK* CPU1_TRDY*
CPU1_HITM*
CPU1_HIT* CPU1_RS0* CPU1_RS1* CPU1_RS2*
CPU1_BREQ*
CPU1_CPURST*
CHP3_NBPWRGD
VCCP
P1.8V
B506 HH-1M1608-600JT
C626
1000nF
6.3V
9-C4 9-D4
9-C4
9-C4
9-C4
9-D3 9-D3 9-D3 9-D3 9-C3 9-D3 10-C3 9-C3 9-C3 9-C3 9-C3 9-C3 9-C3 9-C3
9-D39-B2
9-C3 51-B3
36-C3 51-B3
R591 R600
R599
0 1 2 3 4
49.9
24.9 1%
2
1
U9-1
R608
4.7K
G28
CPU_A3*
H26
CPU_A4*
G27
CPU_A5*
G30
CPU_A6*
G29
CPU_A7*
G26
CPU_A8*
H28
CPU_A9*
J28
CPU_A10*
H25
CPU_A11*
K28
CPU_A12*
H29
CPU_A13*
J29
CPU_A14*
K24
CPU_A15*
K25
CPU_A16*
F29
CPU_REQ0*
G25
CPU_REQ1*
F26
CPU_REQ2*
F28
CPU_REQ3*
E29
CPU_REQ4*
H27
CPU_ADSTB0*
M28
CPU_A17*
K29
CPU_A18*
K30
CPU_A19*
J26
CPU_A20*
L28
CPU_A21*
L29
CPU_A22*
M30
CPU_A23*
K27
CPU_A24*
M29
CPU_A25*
K26
CPU_A26*
N28
CPU_A27*
L26
CPU_A28*
N25
CPU_A29*
L25
CPU_A30*
N24
CPU_A31*
L27
CPU_ADSTB1*
F25
CPU_ADS*
F24
CPU_BNR*
E23
CPU_BPRI*
E25
CPU_DEFER*
G24
CPU_DRDY*
F23
CPU_DBSY*
G22
CPU_DPWR*
E27
CPU_LOCK*
F22
CPU_TRDY*
E24
CPU_HITM*
D26
CPU_HIT*
E26
CPU_RS0*
G23
CPU_RS1*
D23
CPU_RS2*
D25
RESERVED0
C11
CPU_CPURSET*
E11
RESERVED1
AH14
SUS_STAT*
A3
SYSRESET*
E3
POWERGOOD
B11
CPU_COMP_P
D11
CPU_COMP_N
H21
CPVDD
H20
CPVSS
H22
CPU_VREF
AH13
THERMALDIODE_P
AJ13
THERMALDIODE_N
C4
TESTMODE
RC410MB
1 / 5
CPU_D0* CPU_D1* CPU_D2* CPU_D3* CPU_D4* CPU_D5* CPU_D6* CPU_D7* CPU_D8*
CPU_D9* CPU_D10* CPU_D11* CPU_D12* CPU_D13* CPU_D14* CPU_D15*
CPU_DBI0* CPU_DSTB0N* CPU_DSTB0P*
CPU_D16* CPU_D17* CPU_D18* CPU_D19* CPU_D20* CPU_D21* CPU_D22* CPU_D23* CPU_D24* CPU_D25* CPU_D26* CPU_D27* CPU_D28* CPU_D29* CPU_D30* CPU_D31*
CPU_DBI1* CPU_DSTB1N* CPU_DSTB1P*
CPU_D32* CPU_D33* CPU_D34* CPU_D35* CPU_D36* CPU_D37* CPU_D38* CPU_D39* CPU_D40* CPU_D41* CPU_D42* CPU_D43* CPU_D44* CPU_D45* CPU_D46* CPU_D47*
CPU_DBI2* CPU_DSTB2N* CPU_DSTB2P*
CPU_D48* CPU_D49* CPU_D50* CPU_D51* CPU_D52* CPU_D53* CPU_D54* CPU_D55* CPU_D56* CPU_D57* CPU_D58* CPU_D59* CPU_D60* CPU_D61* CPU_D62* CPU_D63*
CPU_DBI3* CPU_DSTB3N* CPU_DSTB3P*
3 4 5 6 7 8 9 10 11 12 13 14
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0
1%
E28 D28 D29 C29 D30 C30 B29 C28 C26 B25 B27 C25 A27 C24 A24 B26 C27 A28 B28
C19 C23 C20 C22 B22 B23 C21 B24 E21 B21 B20 G19 F21 B19 E20 D21 A21 D22 E22
C18 F19 E19 A18 D19 B18 C17 B17 E17 B16 C15 A15 B15 F16 G18 F18 C16 D18 E18
E16 D16 C14 B14 E15 D15 C13 E14 F13 B13 A12 C12 E12 D13 D12 B12 E13 F15 G15
0 1 2 3 4 5 6 7 8
9 10 11 1215 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
9-C39-D29-D3 9-C2
9-C3 9-C3 9-C3
9-C3 9-C3 9-B3
9-C2 9-C2 9-C2
9-C2 9-C2 9-B2
CPU1_D*(63:0)
CPU1_DBI0* CPU1_DSTBN0* CPU1_DSTBP0*
CPU1_DBI1* CPU1_DSTBN1* CPU1_DSTBP1*
CPU1_DBI2* CPU1_DSTBN2* CPU1_DSTBP2*
CPU1_DBI3* CPU1_DSTBN3* CPU1_DSTBP3*
D
C
B
A
SAMSUNG
ELECTRONICS
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
34
2
1
D
J5
GFX_RX0P
J4
GFX_RX0N
K4
GFX_RX1P
L4
GFX_RX1N
L6
GFX_RX2P
L5
GFX_RX2N
M5
GFX_RX3P
M4
GFX_RX3N
N4
GFX_RX4P
P4
GFX_RX4N
P6
GFX_RX5P
P5
GFX_RX5N
R5
GFX_RX6P
R4
GFX_RX6N
T4
GFX_RX7P
T3
GFX_RX7N
U6
GFX_RX8P
U5
GFX_RX8N
V5
GFX_RX9P
V4
GFX_RX9N
W4
GFX_RX10P
W3
C
PEX1_ARX0P PEX1_ARX0N PEX1_ARX1P
B
PEX1_ARX1N
CLK1_PCIEICH
CLK1_PCIEICH*
CHP3_BMREQ*
20-D4 20-D4 20-D4 20-D4
51-B3
8-C1
51-C2
8-C1
20-A4 51-A4
R111
4.7K
GFX_RX10N
Y6
GFX_RX11P
Y5
GFX_RX11N
AA5
GFX_RX12P
AA4
GFX_RX12N
AB4
GFX_RX13P
AB3
GFX_RX13N
AC6
GFX_RX14P
AC5
GFX_RX14N
AD5
GFX_RX15P
AD4
GFX_RX15N
AF8
GPP_RX0P_SB_RX2P
AG8
GPP_RX0N_SB_RX2N
AG6
GPP_RX1P_SB_RX3P
AG7
GPP_RX1N_SB_RX3N
AK7
GPP_RX2P
AJ7
GPP_RX2N
AG4
GPP_RX3P
AH4
GPP_RX3N
AG9
SB_RX0P
AG10
SB_RX0N
AE9
SB_RX1P
AF10
SB_RX1N
K2
SB_CLKP
L2
SB_CLKN
M2
GFX_CLKP
M1
GFX_CLKN
H2
BMREQ*
U9-2
RC410MB
2 / 5
GFX_TX10N GFX_TX11N GFX_TX12N GFX_TX13N GFX_TX14N GFX_TX15N
GPP_TX0P_SB_TX2P
GPP_TX0N_SB_TX2N
GPP_TX1P_SB_TX3P
GPP_TX1N_SB_TX3N
PCE_TXSET
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GFX_TX10P GFX_TX11P GFX_TX12P GFX_TX13P GFX_TX14P GFX_TX15P
GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N
PCE_ISET PCE_PCAL PCE_NCAL
N1 N2 P2 R2 R1 T1 T2 U2 V2 V1 W1 W2 Y2 AA2 AA1 AB1 AB2 AC2 AD2 AD1 AE1 AE2 AF2 AG2 AG1 AH1 AH2 AJ2 AJ3 AJ4 AK4 AJ5
AJ8 AJ9 AE6 AF6
AJ6 AK6 AE4 AF4
AJ10 AJ11 AK9 AK10
AK13 AJ12 AH12 AG12
R153 R155 R154 R698
100nFC136 100nFC135 100nFC138 100nFC137
10K 10K 150 100
PEX1_ATX0P
20-D4
PEX1_ATX0N
20-D4
PEX1_ATX1P
20-D4
PEX1_ATX1N
20-D4
1% 1%
P1.2V
1% 1%
D
C
B
A
SAMSUNG
ELECTRONICS
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2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
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EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
C
B
A
MEM1_AMA(14:0)
MEM1_ADM(7:0)
MEM1_ARAS* MEM1_ACAS*
MEM1_AWE*
MEM1_ADQS(7:0)
MEM1_ADQS*(7:0)
CLK1_MCLK0*
CLK1_MCLK0
CLK1_MCLK1*
CLK1_MCLK1
CLK1_MCLK3*
CLK1_MCLK3
CLK1_MCLK4*
CLK1_MCLK4
MEM1_CKE0 MEM1_CKE1 MEM1_CKE2 MEM1_CKE3
MEM1_CS0* MEM1_CS1* MEM1_CS2* MEM1_CS3*
MEM1_ODT0 MEM1_ODT1 MEM1_ODT2 MEM1_ODT3
18-D2 18-D4 19-D3
MEM1_ABS0 MEM1_ABS1 MEM1_ABS2
18-B2 18-B4
18-B418-B2
19-C4
18-C2 18-C4 19-C4
19-B418-B418-B2
18-B418-B2
18-A2 18-A4
18-C4 18-C4 18-C4 18-C4
18-C2 18-C2 18-C2 18-C2
18-C4 19-C4
19-C418-C4 19-C418-C2
18-C2 19-C4
18-C4 19-D4
19-D418-C4 19-C418-C2
18-C2 19-C4
19-C418-B4 18-B2 19-C4 18-B4 19-C4
19-C418-B2
3
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
18-C2 18-C4 19-C4
19-C418-C418-C2
18-C2 18-C4 19-C4
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
AK27
AJ27
AH26
AJ26
AH25
AJ25 AH24 AH23
AJ24
AJ23 AH27 AH22
AJ22
AF28
AJ21 AG27
AJ28 AH21
AJ17 AG15 AE20
AF25 AB28
AJ29 AG28 AH30
AJ18 AE14
AF22 AE25
W27
AB29
AH17
AF15 AE22
AF26
W26
AB30
AC26 AC25
AF16 AE16
AC24 AC23 AG17
AF17
W29 W28
AH20
AJ20 AE24 AE21
AH29 AG29 AH28
AF29 AG30
AE28 AC30
Y27 R26
R28
P25 R29
R25 R30
V29 V30
Y30
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15 MEM_A16 MEM_A17
MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7
MEM_RAS* MEM_CAS* MEM_WE*
MEM_DQS0P MEM_DQS1P MEM_DQS2P MEM_DQS3P MEM_DQS4P MEM_DQS5P MEM_DQS6P MEM_DQS7P
MEM_DQS0N MEM_DQS1N MEM_DQS2N MEM_DQS3N MEM_DQS4N MEM_DQS5N MEM_DQS6N MEM_DQS7N
MEM_CK0N MEM_CK0P MEM_CK1N MEM_CK1P MEM_CK2N MEM_CK2P MEM_CK3N MEM_CK3P MEM_CK4N MEM_CK4P MEM_CK5N MEM_CK5P
MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3
MEM_CS0* MEM_CS1* MEM_CS2* MEM_CS3*
MEM_ODT0 MEM_ODT1 MEM_ODT2 MEM_ODT3
U9-3 3 / 5
RC410MB
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63
MEM_COMPN MEM_COMPP
MEM_CAP2 MEM_CAP1 MEM_VREF
MEM_VMODE
MPVDD MPVSS
AJ16 AH16 AJ19 AH19 AH15 AK16 AH18 AK19 AF13 AF14 AE19 AF19 AE13 AG13 AF18 AE17 AF20 AF21 AG23 AF24 AG19 AG20 AG22 AF23 AD25 AG25 AE27 AD27 AE23 AD24 AE26 AD26 AA25 Y26 W24 U25 AA26 Y25 V26 W25 AC28 AC29 AA29 Y29 AD30 AD29 AA30 Y28 U27 T27 N26 M27 U26 T26 P27 P26 U29 T29 P29 N29 U28 T28 P28 N27
AE29 AJ15
N30 AJ14 AB27 AD28 AB26
AA27
2
R662
R697
R663
HH-1M1608-600JT
0 1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
61.9
61.9
P1.8V_AUX
1K
1% 1%
B510
C662
1000nF
6.3V
P1.8V_AUX
P1.8V
18-D218-D4
C663 100nF
C664 100nF
MEM1_ADQ(63:0)
P1.8V_AUX
R664
1K 1%
R665
1K 1%
nostuff
R666
POWER FOR PLL
1
D
C
B
MEM1_REF
0
A
SAMSUNG
ELECTRONICS
4
3
2
1
4
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
Put the AVDD,AVDDI,AVDDQ,PLVDD
D
D
decoupling CAPS on the botom side close to BALLS
4
P3.3V
R609
R614
4.7K
4.7K
VGA3_VSYNC VGA3_HSYNC
Celeron : Pull Down Standard : Pull Up
C
C
27-B3 51-B4
51-B4
27-A3
R613
4.7K
Very important BOM option according to CPU/NB
RESET resistor need 10mil trace with at lest
10mils spacing at AVSSQ HF cap
CRT3_RED
CRT3_GREEN
CRT3_BLUE
B1B
AA
27-D4 50-C4
50-C127-D4
27-C4 50-D2
R601
R604
150 1%
SMB3_CLK
SMB3_DATA
B501
AVDD_NB
AVSSN
C595
10000nF 10V
P3.3V
HH-1M1608-600JT
DAC I/O POWER POWER FOR PLL
AVDDQ
AVDD_NB
C600
1000nF
6.3V
3
3
C605 100nF
C606
HH-1M1608-600JT
1000nF
6.3V
B502
P3.3V
2
2
1
1
D
D
U9-4
C601 100nF
AVSSN
P1.8V
AVSSQ
C602 100nF
PLLVDD
C645 100nF
PLLVSS
VGA3_VSYNC VGA3_HSYNC
CHECK CRT LEVEL
R603
150 1%
CLK3_NB14M
CLK0_HCLK1
150
CLK0_HCLK1*
1%
For Debugging
P1.8V P1.8V
B500
HH-1M1608-600JT
BAND GAP REFERENCE VOLTAGE FOR DAC
AVSSDI
CLOSE TO CRT CONN
51-B427-B3
27-A3 51-B4
8-B1 50-D1
8-C1 8-C1
R90
50-B223-D48-B3 18-B2 18-B4 23-C3
R91
23-C318-B418-B28-B3 23-C4 50-B2
AVDDQ
C603
10000nF 10V
AVSSQ
nostuff nostuff
PLLVSS
0 0
R602
715 1%
R612
10K
HH-1M1608-600JT
B507
C10
H10
B10 F10
E10 D10
G4 G5
C9
D8 C8
B8 B9
H9
J2
H3 B3
C3
G1
J1
K1
G2 F1
D2 C1
RC410MB
VDDR3_1 VDDR3_2
AVDD AVSSN
AVDDDI AVSSDI
AVDDQ AVSSQ
PLLVDD PLLVSS
TMDS_HPD DDC_DATA
DACVSYNC DACHSYNC
RSET RED
GREEN BLUE
OSCIN CPU_CLKP
CPU_CLKN
TVCLKIN OSCOUT
I2C_CLK I2C_DATA
PLLVDD
C643
10000nF 10V
PLLVSS
4 / 5
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P TXOUT_L0N
TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P
LPVDD
LPVSS
LVDDR18A_1 LVDDR18A_2
LVSSR_1 LVSSR_2 LVSSR_3
LVDDR18D
LVDS_DIGON
LVDS_BLON LVDS_BLEN
TXCLK_UP TXCLK_UN
TXCLK_LP TXCLK_LN
COMP
DACSCL
DACSDA
STRP_DATA
R593
R1608-SHORT
R592
R1608-SHORT
R607
R1608-SHORT
B4 A4 B5 C6 B6 A6 B7 A7
E5 F5 D5 C5 E6 D6 E7 E8
J8 J7 H7
H8 G7
G8 G9
C7 E2
G3 F2
F8 F7 F6 G6
D9
C
F9
Y
E9 B2
C2 D1
0
0
0
AVSSN
AVSSQ
AVSSDI
R1608-SHORT
R594
0
R638
R1608-SHORT
R640
R1608-SHORT
R639
R1608-SHORT
0
0
0
26-B4 26-B4 26-B4 26-B4 26-B4 26-B4
26-C250-B1 26-C451-C2
26-C4 26-C4
27-A251-C3
27-B251-D2
PLLVSS
LVSSR
LPVSS
LCD1_ADATA0* LCD1_ADATA0 LCD1_ADATA1* LCD1_ADATA1 LCD1_ADATA2* LCD1_ADATA2
LCD3_VDDEN LCD3_BKLTCTRL LCD3_BKLTEN
LCD1_ACLK LCD1_ACLK*
CRT3_DDCCLK CRT3_DDCDATA
P3.3V
R616
4.7K
R615
4.7K
nostuff
R606
150 1%
R605
150 1%
C647 100nF
C648 100nF
C651 100nF
50-D4 27-C2
27-C250-D4
C649
1000nF
6.3V
C653
1000nF
6.3V
LPVSS
LVSSR
TVO3_C TVO3_Y
Q519
MMBT3904
3
1
2
C650
10000nF 10V
C657
10000nF 10V
P1.8V
B508
HH-1M1608-600JT
P1.8V
B509
HH-1M1608-600JT
C604
1000nF
6.3V
LVSSR
P3.3V
R595
100K
D
3
RHU002N06
Q520
G
1
S
2
23-D350-B1 36-C4 28-A3
KBC3_PWRGD
SAMSUNG
ELECTRONICS
CC
B
B
A
A
3
4
4
3
2
2
1
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