The frequency configuration is shown in Figure 1 and
Table 1.
ANT
ANTSW
FINAL
RX/TX:66~88MHz
RF
AMP
MIX
MCF
38.850MHz
DRIVE
PRE
DRIVE
Fig. 1 Frequency configuration
Double super heterodyne
Reception method
1st IF Frequency 38.85MHz (Upper)
2nd IF Frequency 450kHz (Lower)
Transmission method VCO direct oscillation amplification
Modulation Variable reactance phase modulation
Table 1 Basic configuration
2. Receiver
2-1. Front-end RF Amplifier
The received signal from the antenna passes through a
low pass filter and then through a transmit/receive switching
circuit (antenna switch) and enters the band-pass filter
(L520, L521).
The signal passing through the band-pass filter (L520,
L521) is amplified by with an RF amplifier (Q506), passes
through a band-pass filter (L524, L522) and enters the first
mixer (Q507).
These band-pass filters are tuned to a desired frequency
by varicaps (D507, D508, D509, D510). A tuning voltage
corresponding to the desired signal is applied to each
varicap through the P76 terminal (pin 32) of the MPU (U201)
to tune to the receive frequency. (See Fig. 2)
2-2. First Mixer
The received signal passing through the band-pass filter
(L524, L522) is mixed with the first local signal generated by
the VCO by the first mixer (Q507) to produce a first IF signal
(38.85 MHz) (Upper heterodyne). The first IF signal passes
through a MCF (Monolithic crystal filter: XF3000 and
XF3001) to remove unwanted components.
The first IF signal passing through the MCF (XF3000 and
CF
450KHz
IFSYSTEM
MULTI PLY
PLL
VCO
38.40MHz
AMP
TCXO
AF
MIC
AMP
SP
19.200MHz
MIC
XF3001) is amplified by an IF amplifier (Q511) and the
resulting signal enters the FM IC (U503).
ANT
D501,D 502
D506
ANTSW
CF30 00
CF500
IF,MIX,DE T
U503
Q512
X2
MULTIPLY
2nd LocalOS C
BPF
X500
TCXO
RFAMP
Q506
VFO
Tunin gvoltage
U201
MPU
19.200M Hz
BPF
U204A
AFAMP
MIXER
Q507
VCO
XF3000 ,XF30 01
1st Local OSC
(PLL)
LV
MCF
PLL
AFPA AMP
U205
IFAMP
Q511
.
SP
Fig.2
2-3. IF Amplifier Circuit
The first IF signal (38.85 MHz) amplified by the IF
amplifier (Q511) and the second IF signal (38.40 MHz)
generated by tripling the 19.200 MHz reference oscillator
frequency of the TCXO (X500) by Q512, are mixed in the
FM IC to produce a second IF signal (450 kHz) (Lower
heterodyne). The second IF signal passes through a
ceramic filter (CF3000) to remove unwanted components.
The second IF signal passing through the ceramic filter
(CF3000) passes through the IF amplifier in the FM IC
again and is detected to produced an audio signal. (See
Fig.2)
2-4.Wide/Narrow Switching Circuit
Narrow and Wide settings can be made for each channel
by switching the demodulation level. The WIDE (high level)
and NARROW (low level) data is output from U201, pin 11.
When a WIDE (high level) data is received, Q503 and
Q509 turn on.
When a NARROW (low level) data is received, Q503 and
Q509 turn off.
Q503 and Q509 turns on/off with the Wide/Narrow data and
the U503 detector output level is switched to maintain a
constant output level during wide or narrow signals. (See
Fig.3)
P63(U201)
H:Wide
L:Narrow
Q503
Q509
AFOUT
U503
FMSYSTEM
R509
R596
QUAD
Q511
IFOUT
C654
T3000
5R
Fig.3
1
DV3066
1
7
CIRCUIT DESCRIPTION
2-5.Squelch
A noise component is obtained by passing FM
detection output (FM IC pin 9) through an operational
amplifier in the FM IC and band-pass filter consisting of
R593, R594, R595, C580, C581. The noise component is
rectified in the FM IC to produce a DC voltage, which is
output from the N-REC terminal (pin 14) of the FM IC as
squelch voltage.
The squelch voltage enters the SQ terminal (pin 40) of
the MPU (U201) and is compared with the reference
voltage preset in the MPU to control audio signal
ON/OFF.
U201
MPU
1stIFinput
(38.85MHz)
U503
FMIC
2ndlocalOSC
(38.40MHz)
Fig.4
3. AF signal system
3-1. Audio amplifier circuit
The demodulated signal from U503 goes to Audio
processor through U201 (AF filtered, high-pass filtered,
de-emphasized , De-Scrambler, Expander, and Mux).
The signal then goes through an AF amplifier U204A
(1/2), an AF volume control, and is routed to an audio
power amplifier (U205), where it is amplified and output
to the internal speaker. (See Fig.5)
The output signal from FM IC (U503) enters the
microprocessor (U201). U201 determines whether the
CTCSS or DCS matches the preset value, and controls
the SP MUTE (PA1) and the speaker output sounds
according to the squelch results
SPMUTE
PA1
RSSI
P71
SQ
P70
MIX
Noise
comp
Rectifier
Buffer
Local
OSC
CF3000
450kHz
. (See Fig.5)
RSSI
T3000
IFAMP
111213141516
654321
5R
10
Quad ratu re
detector
Inve rter
AMP
R593
C581
R595
Nois e
AMP
AFOUT
9
87
To output sounds from the speaker, U201 sends a high
signal to the PA1 line and turns U205 on through Q201,
Q205, Q206 and Q207. (See Fig.4)
2-6.S Meter Circuit
The S meter voltage is output from the RSSI terminal
(pin 12) of the FM IC (U503) and input to the SM terminal
(pin 39) of the MPU. Then the voltage is converted from
analog to digital in the MPU to control the S meter display
on the LCD. (See Fig.4)
U201
AQUA
LPF
C580
R5594
U204AQ206,Q207
AMP
VOL
Q201,Q205,
U205
AFPA
SW
LS200
SP
J201
3-2-2 High-speed data (DTMF)
The DTMF input signal from the FM IC goes to pin 18
of U202. The signal is demodulated by DTMF
demodulator in U202. The demodulated data goes to the
MPU for processing. (See Fig.5)
AbandFMIFICU503
IF AMP
DET
SQL
40
P70
U201
MPU
LNOUT
AFsignal
98
PA1
DEMOD
U202
DTMFdecoder
P20,P21,P22,P23, P64,P65
27 Audio
92
SPMUTE
Fig.5
AFAMP
U204A(1/2)
VOL
U205
AFPA
Q201,Q205,Q206,Q20
SW
LS200
SP
J20
2
DV3066
P
CIRCUIT DESCRIPTION
4. PLL frequency synthesizer
The PLL circuit generates the first local oscillator signal
for reception and the RF signal for transmission.
4-1.PLL circuit
A reference frequency of 5 kHz or 6.25 kHz is produced
by dividing the 19.20 MHz reference frequency of the
TCXO (X500) with PLL IC (U504). Comparison frequency
is produced by amplifying VCO output with an RF amplifier
(Q520) and dividing it with the PLL IC.
The PLL synthesizer with 5 kHz and 6.25 kHz step is
configured by comparing phases of the reference
frequency and comparison frequency.
The phase difference between reference frequency and
comparison frequency passes through a charge pump i n
the PLL IC, then ripples are removed with a loop filter with
low-range passing characteristics to produce VCO control
voltage (lock voltage). (See Fig. 6)
4-2.VCO circuit
The VCO produces a desired frequency directly with a
Colpits oscillation circuit containing an oscillation transistor
(Q518) used for both transmission and reception.
The VCO control voltage is applied to varicap (D516,
D517) to produce a desired frequency.
The PA0 terminal (pin 91) of the MPU (U201) goes "L"
during transmission, and the R/T control switch (Q519) is
turned OFF to change oscillation frequency. (See Fig. 6)
CHARGE
PUMP
Q520
RFAMP
Q516
RFAM
LPF
PA0
(U201 Pin91)
PLLDATA
19.200MHz
5C
D516, D517
REFOSC
Ripple
Fil te r
Q504
T/RSW
Q519
Q518
VCO
PLLICU504
I/N
I/M
Q517
BUFFAMP
MOD
5KHz/6.25KHz
PHASE
COMPARATOR
5KHz/6.25KHz
MOD
Fig.6
5. Transmission signal system
5-1.Microphone Amplifier Circuit
The audio signal from the microphone passes through a
microphone amplifier (U207) and enters Audio processor
(U201).U201 is composed of Compressor, high-pass
filtered, pre-emphasis, Mux, Scrambler, limiter, low-pass
filtered, and MOD circuit. The signal then passes through a
low-pass filter (splatter fiIter) Q208 and cuts 3kHz and
higher frequencies. The resulting signal goes to the VCO
through the VCO modulation terminal for direct FM
modulation. (See Fig. 7)
U207
MICAM P
C
MI
U201
MUP
Fig.7
5-2. Encode Signalling
CTCSS/DCS/DTMF
A necessary signal for CTCSS/DCS/DTMF encoding is
generated by U201 and FM-modulated to the PLL
reference signal. Since the reference OSC does not
modulate the loop characteristic frequency or higher,
modulation is performed at the VCO side by adjusting the
balance. (See Fig. 7)
5-3. Drive and Final Amplifier Circuit
The signal from the T/R switch (D503 is on) is amplified
by the pre-drive (Q515) and drive amplifier (Q513) to
50mW. The output of the drive amplifier is amplified by the
RF power amplifier (Q505) to 5W (1W when the power is
low).
The RF power amplifier consists of two MOS FET stages.
The output of the RF power amplifier is then passed
through the harmonic filter (LPF) and antenna switch
(D506) and applied to the antenna terminal.
(See Fig. 8)
Fro m
T/R SW
D503)(
Q515Q513Q505D506
DRIVE
AMP
VDDVGVG
+BA TT
AMP
RF
R589
R590
R591
RF
FI NALAMP
APC
(U201)
U502A
(1/2 )
Fig.8
Q208
LPF
(SPLATTERFILTER)
ANTSW
U502B
(2/2 )
VCO
TCXO
ANT
LPF
3
DV3066
5-4. APC Circuit
The APC circuit always monitors the current flowing
through the RF power amplifier (Q505) and keeps a
constant current. The voltage drop at R589, R590 and
R591 is caused by the current flowing through the RF
power amplifier and this voltage is applied to the differential
amplifier U502(1/2). U502 (2/2) compares the output
voltage of U502 (1/2) with the reference voltage from U201.
The output of U502 (2/2) controls the VG of the RF power
amplifier, Drive amplifier and Pre-Drive amplifier to make
both voltages the same.
The change of power high/low is carried out by the
change of the reference voltage. (See Fig. 8)
6 Control Circuit
The microprocessor (U201) operates at a clock of
32.768KHz.The control circuit consists of a microprocessor
(U201) and its peripheral circuits. It controls the TX-RX unit.
U201 mainly performs the following:
(1) Switching between transmission and reception by the
PTT signal input.
(2) Reading system, group, frequency, and program data
from the memory circuit.
(3) Sending frequency program data to the PLL.
(4) Controlling squelch on/off by the DC voltage from the
squelch circuit.
(5) Controlling the audio mute circuit by the decode data
input.
(6) Transmitting tone and encode data.
6-1.
Memory Circuit
Memory circuit consists of the MPU (U201 and an
EEPROM (U203). An EEPROM has a capacity of 64k bits
that contains the transceiver control program for the MPU
and data such as transceiver channels and operating
features. (See Fig. 9)
Fig.9
6-2. Low battery warning
The battery voltage is monitored by the microprocessor
(U201). When the battery voltage falls below the voltage
set by the Low Battery Warning adjustment, the red LED
U201
CPU
U203
EEP R OM
flashes to notify the operator that it is time to replace the
battery. If the battery voltage falls even more (approx.
6.0V), a beep sounds and transmission is stopped.
Low battery warning Battery condition
The red LED flashes
during transmission
The red LED flashes
and a continuous beep
sounds while PTT
pressed.
BATT1
R2 04
The battery voltage is low but
the transceiver is still usable.
The battery voltage is low and
the transceiver is not usable to
make calls.
U201
38
P72
C200
R2 03
MPU
Fig.10
7. Power Supply
There are four 5V power supplies for the microprocessor:
5M,5C,5R, and 5T. 5M for microprocessor is always output
while the power is on. 5M is always output, but turns off
when the power is turned off to prevent malfunction of the
microprocessor.
5C is a common 5V and is output when SAVE is not set to
OFF.
5R is 5V for reception and output during reception.
5T is 5V for transmission and output during transmission.
4
SPARTS LIST
MAIN UNIT
Ref. No Parts No. Description of item Size (LxW)(mm)Qty Specification