ROHM BU9889GUL-W Technical data

High Reliability Series Serial EEPROM Series
WL-CSP EEPROM family I2C BUS
BU9889GUL-W
Description
BU9889GUL-W is a serial EEPROM of I
Features
1) Completely conforming to the world standard I All controls available by 2 ports of serial clock (SCL) and serial data (SDA)
2) 1k words×8 bits architecture 8kbit serial EEPROM.
3) Other devices than EEPROM can be connected to the same port, saving microcontroller port.
4) 1.75.5V single power source action most suitable for battery use.
5) FAST MODE 400kHz at 1.7~5.5V
6) Page write mode useful for initial value write at factory shipment.
7) Auto erase and auto end function at data rewrite.
8) Low current consumption At write operation (5V) : 0.5mA (Typ.) At read operation (5V) : 0.2mA (Typ.) At standby operation (5V) : 0.1µA (Typ.)
9) Write mistake prevention function Write (write protect) function added Write mistake prevention function at low voltage
10) WLCSP6pin compact package
11) Data rewrite up to 100,000 times
12) Data kept for 40 years
13) Noise filter built in SCL / SDA terminal
14) Shipment data all address FFh
Absolute maximum ratings (Ta=25℃)
Parameter symbol Limits Unit
Impressed voltage VCC -0.3+6.5 V
Permissible dissipation Pd 220*1 mW Storage temperature range Tstg -65+125 Action temperature range Topr -40+85 Terminal voltage - -0.3Vcc+1.0 V
*1 When using at Ta=25 or higher, 2.2mW to be reduced per 1
Memory cell characteristics (Ta=25, Vcc=1.75.5V)
Parameter
Number of data rewrite times *1 100,000 - - Times
Data hold years *1 40 - - Years
*1 Not 100% TESTED
Recommended operating conditions
Parameter Symbol Limits Unit
Power source voltage Vcc 1.75.5
Input voltage VIN 0~Vcc
2
C BUS interface method.
2
C BUS.
Limits
Min. Typ. Max.
Unit
V
No.10001EAT07
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© 2010 ROHM Co., Ltd. All rights reserved.
1/17
2010.01 - Rev.A
BU9889GUL-W
Technical Note
Electrical characteristics
Parameter Symbol
Min Typ. Max.
Limits
Unit Condition
"H" Input Voltage1 VIH1 0.7Vcc - Vcc+1.0 V
"L" Input Voltage1 VIL1 -0.3 - 0.3Vcc V
"L" Output Voltage1 VOL1 - - 0.4 V IOL=3.0mA , 2.5V≦Vcc≦5.5V (SDA)
"L" Output Voltage2 VOL2 - - 0.2 V IOL=0.7mA , 1.7V≦Vcc≦2.5V (SDA)
Input Leakage Current ILI -1 - 1 μAVIN=0Vcc
Output Leakage Current ILO -1 - 1 μAVOUT=0Vcc (SDA)
CC1
I
- - 2.0 mA
Current consumption at action
ICC2 - - 0.5 mA
Standby Current ISB - - 2.0 μA
Radiation resistance design is not made.
Vcc=5.5V , f Byte Write, Page Write Vcc=5.5V , f Random read, Current read, Sequential read Vcc=5.5V , SDA・SCL=Vcc A2=GND, WP=GND
SCL =400kHz, tWR=5ms
SCL =400kHz
Action timing characteristics
Parameter Symbol
Min. Typ. Max.
Limits
Unit
SCL Frequency fSCL - - 400 kHz
Data clock "High" time tHIGH 0.6 - - μs
Data clock "Low" time tLOW 1.2 - - μs
SDA, SCL rise time *1 tR - - 0.3 μs
SDA, SCL fall time *1 tF - - 0.3 μs
Start condition hold time tHD:STA 0.6 - - μs
Start condition setup time tSU:STA 0.6 - - μs
Input data hold time tHD:DAT 0 - - ns
Input data setup time tSU:DAT 100 - - ns
Output data delay time tPD 0.1 - 0.9 μs
Output data hold time tDH 0.1 - - μs
Stop condition data setup time tSU:STO 0.6 - - μs
Bus release time before transfer start tBUF 1.2 - - μs
Internal write cycle time tWR - - 5 ms
Noise removal valid period (SDA,SCL terminal) tI - - 0.1 μs
WP hold time tHD:WP 0 - - ns
WP setup time tSU:WP 0.1 - - μs
WP valid time tHIGH:WP 1.0 - - μs
*1 : Not 100% TESTED
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2/17
2010.01 - Rev.A
BU9889GUL-W
A
A
Sync data input/output timing
SCL
Input read at the rise edge of SCL Data output in sync with the fall of SCL
tHD:STA tHD:DAT
SD
(入)
(Input)
SDA
(出力)
(Output)
tBUF
Fig.1-(a) Sync data input / output timing
tSU:DAT
tLOW
tPD tDH
SCL
tSU:STA tSU:STOtHD:STA
SDA
Fig.1-(b) Start - stop bit timing
START BIT
SCL
SDA
WRITE DATA(n)
D0
ACK
CONDITION
STOP
t
WR
Fig.1-(c) Write cycle timing
tHIGHtR tF
START
CONDITION
STOP BIT
Technical Note
SCL
DATA(1)
D1 D0ACK
SDA
WP
tSU:WP
Fig.1-(d) WP timing at write execution
SCL
DATA(1)
D1 D0 ACK ACK
SDA
WP
At write execution, in the area from the D0 taken clock rise of the first DATA(1),
to tWR, set WP= 'LOW'.
By setting WP "HIGH" in the area, write can be cancelled.
When it is set WP = 'HIGH' during tWR, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again.
Fig.1-(e) WP timing at write cancel
DATA(n)
DATA(n)
tHIGH:WP
CK
ストップション
Stop condition
WR
tWR
tWR
tHD:
WP
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© 2010 ROHM Co., Ltd. All rights reserved.
3/17
2010.01 - Rev.A
BU9889GUL-W
V
G
A
Block diagram
8Kbit EEPROM ARRAY
10bit
ADDRESS DECODER
SLAVE、WORD
10bit
ADDRESS REGISTER
A2
CONTROL LOGIC
START STOP
HIGH VOLTAGE GEN.
Vcc LEVEL DETECT
Fig.2 Block diagram
Pin assignment and description
Terminal
name
A2 Input Slave address setting
GND - Reference voltage of all input / output, 0V.
SDA
SCL Input Serial clock input
WP Input Write protect terminal
Vcc - Connect the power source.
B
B1
SDA
A1
SCL
B2
GND A2
A2
WP
1
BU9889GUL-W (BOTTOM VIEW)
2
B3
A3
VCC
3
Characteristic data (The following values are Typ. ones.)
6
Ta=-40℃
5
Ta=25℃
(V)
IH
Ta=85℃
4
3
2
H INPUT VOLTAGE : V
1
0
0123456
1
(V)
0.8
OL
Ta=-40℃
0.6
Ta=25℃ Ta=85℃
0.4
0.2
L OUTPUT VOLTA GE : V
0
0123456
Fig.6 'L' output voltage VOL-IOL(Vcc=2.5V)
Fig.6 'L' output voltage VOL-IOL(Vcc=2.5V)
SPEC
SUPPLY VOLTAGE : Vcc(V)
Fig.3 'H' input voltage V
Fig.3 'H' input voltage V
(A2,SCL,SDA,WP)
(A2,SCL,SDA,WP)
L OUTPUT CURRENT : I
SPEC
IH
IH
(mA)
OL
6
5
Ta=-40℃
(V)
Ta=25℃
IL
Ta=85℃
4
3
2
L INPUT VOLTAGE : V
1
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.4 'L' input voltage V
Fig.4 'L' input voltage V
(A2,SCL,SDA,WP)
1.2
1
(uA)
LI
0.8
0.6
0.4
0.2
INPUT LEAK CUR RENT : I
0
SPEC
Ta=-40℃ Ta=25℃ Ta=85℃
0123456
SUPPLYVOLTAGE : V cc(V)
Fig.7 Input leak current I
Fig.7 Input leak current I
(A2,SCL,WP)
(A2,SCL,WP)
Input/
Output
Input /
Output
SPEC
(A2,SCL,SDA,WP)
cc Vcc
ND
8bit
DATA REGISTER
WP
SCL
ACK
SDA
Function
Slave and word address, Serial data input serial data output
1
Ta=-40℃
(V)
0.8
Ta=25℃
OL
Ta=85℃
0.6
0.4
SPEC
0.2
L OUTPUT VOLTAGE : V
0
012345678
IL
IL
(uA)
OUTPUT LEAK CURRENT : I
LI
LI
L OUTPUT CURRENT : I
Fig.5 'L' output voltage V
Fig.5 'L' output voltage VOL-
1.2
1
LO
0.8
0.6
0.4
0.2
0
0123456
(Vcc=1.7V)
Ta=-40℃ Ta=25℃ Ta=85℃
SUPPLY VOLTAGE : Vcc(V)
Fig.8 Output leak current
Fig.8 Output leak current
Technical Note
(mA)
OL
-
I
OL
OL
SPEC
I
(SDA)
LO
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© 2010 ROHM Co., Ltd. All rights reserved.
4/17
2010.01 - Rev.A
BU9889GUL-W
Characteristic data (The following values are Typ. ones.)
2.5
2
SPEC
1.5
SCL FREQUENCY : fscl(kHZ)
Ta=-40℃ Ta=25℃
1
Ta=85℃
AT WRITING : Icc1(mA)
0.5
CURRENT CONS UMPTION
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.9 Current consumption at WRITE operation ICC1
10000
1000
100
10
1
0.1 0123456
(fscl=400kHz)
SPEC
Ta=-40℃ Ta=25℃ Ta=85℃
SUPPLY VOLTAGE : Vcc(V)
Fig.12 SCL frequency f
5
(us)
HD : STA
4
3
2
1
Ta=-40℃ Ta=25℃ Ta=85℃
SPEC
0
START CONDITION HOLD TIME : t
0123456
(ns)
HD :DAT
-50
SUPPLY VOLTAGE : Vcc(V)
Fig.15 Start Condition Hold Time t
50
0
STA
SPEC
SCL
HD :
0.6
0.5
0.4
0.3
0.2
AT READING : Icc2(mA)
0.1
CURRENT CONSUMPTION
(uA)
DATA CLK H TIME : t
START CONDITION
SET UP TIME : tSU:STA(uA)
-0.1
300
(ns)
200
SU: DAT
100
Ta=-40℃ Ta=25℃ Ta=85℃
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.10 Current consumption at READ operation I
5
4
HIGH
3
Ta=-40℃ Ta=25℃
2
Ta=85℃
1
0
0123456
5.9
4.9
3.9
2.9
Ta=-40℃ Ta=25℃
1.9
Ta=85℃
0.9
0123456
Fig.16 Start Condition Setup Time t
SPEC
SUPPLY VOLTAGE : Vcc(V)
Fig.13 Data clock High Period
SUPPLY VOLTAGE : Vcc(V)
SPEC
-100
-150
INPUT DATA HOLD TIME : t
-200
Ta=-40℃ Ta=25℃ Ta=85℃
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.18 Input Data Hold Time
(LOW)
HD : DAT
4
(us)
Ta=-40℃
PD
Ta=25℃
3
Ta=85℃
2
1
OUTPUT DATA DELAY TIME : t
0
0123456
Fig.21 'L' Data output delay time tPD0
SPEC
SUPPLY VOLTAGE : Vcc(V)
0
Ta=-40℃ Ta=25℃
-100
Ta=85℃
INPUT DATA SET UP TIME : t
-200 0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.19 Input Data Setup Time
SU: DAT
4
(us)
Ta=-40℃
PD
Ta=25℃
3
Ta=85℃
2
1
OUTPUT DATA DELAY TIME : t
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.22 'H' Data output delay time
SPEC
(fscl=400kHz)
SPEC
STA
(HIGH)
SPEC
Technical Note
2.5
2
(uA)
SB
1.5
Ta=-40℃
1
Ta=25℃ Ta=85℃
0.5
STANBY CURR ENT : I
0
0123456
SUPPLY VOLTAGE : Vcc(V)
2
CC
t
HIGH
(ns)
HD: STA
-100
-150
INPUT DATA HOLD TIME : t
-200
SU :
1
PD
Fig.11 Stanby operation I
5
(us)
4
LOW
3
Ta=-40℃ Ta=25℃
2
Ta=85℃
1
DATA CLK L TIME : t
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.14 Data clock Low Period t
50
0
-50
Ta=-40℃ Ta=25℃ Ta=85℃
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.17 Input Data Hold Time
300
(ns)
200
SU : DAT
100
0
Ta=-40℃ Ta=25℃
-100
Ta=85℃
-200
INPUT DATA SET UP TIME : t
0123456
Fig.20 Input Data setup time
5
(us)
Ta=-40℃
4
BUF
Ta=25℃ Ta=85℃
3
2
BUS OPEN TIME
1
BEFORE TRANSMISSION : t
0
0123456
Fig.23 BUS open time before transmission
SPEC
SB
SPEC
SPEC
t
(HIGH)
HD : DAT
SPEC
SUPPLY VOLTAGE : Vcc(V)
t
(LOW)
SU : DAT
SPEC
SUPPLY VOLTAGE : Vcc(V)
LOW
 t
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5/17
2010.01 - Rev.A
BU9889GUL-W
Characteristic data (The following values are Typ. ones.)
6
5
(ms)
WR
4
3
2
INTERNAL WRITING
CYCLE TIME : t
Ta=-40℃ Ta=25℃
1
Ta=85℃
0
0123456
SUPPLY VOLTAGE : Vcc(V )
Fig.24 Internal writing cycle time
SPEC
 t
WR
1
0.8
Ta=-40℃
(SCL H) (us)
0.6
l
Ta=25℃ Ta=85℃
0.4
NOISE REDUCTION
0.2
EFECTIVE TIME : t
0
0123456
Fig.25 Noise reduction efection time
SPEC
SUPPLY VOLTAGE : Vcc(V)
0.6
0.5
0.4
(SDA H)(us)
l
0.3
0.2
NOISE REDUCTION
0.1
EFECTIVE TIME : t
0
0246
SUPPLY VOLATGE : Vcc(V)
Fig.27 Noise resuction efecctive time
SPEC
Ta=-40℃ Ta=25℃ Ta=85℃
 t
(SDA
0.6
0.5
0.4
(SAD L)(us)
l
0.3
Ta=-40℃ Ta=25℃
0.2
NOISE REDUCTION
EFFECTIVE TIME : t
Ta=85℃
0.1
0
0123456
SUPPLY VOLTAGE : Vcc(V)
Fig.28 Noise reduction efective time t
1.2
(us)
1
HIGH : WP
0.8
0.6
0.4
Ta=-40℃ Ta=25℃
0.2
Ta=85℃
WP EFFECTIVE TIME : t
0
0123456
SUPPLYVOLTAGE : Vcc(V)
Fig.30 WP efective time
SPEC
t
HIGH : WP
SPEC
t
(SCL
l
SDA L
l
Technical Note
0.6
Ta=-40℃
0.5
Ta=25℃ Ta=85℃
0.4
(SCL L)(us)
l
0.3
0.2
NOISE REDUCTION
0.1
EFECTIVE TIME : t
0
0123456
Fig.26 Noise reduction e fective time
0.2
0.1
(us)
0
SU : WP
-0.1
-0.2
-0.3
-0.4
WP SET UP TIME : t
-0.5
-0.6 0123456
SPEC
SUPPLY VOLTAGE : V cc(V)
SPEC
Ta=-40℃ Ta=25℃ Ta=85℃
SUPPLY VOLTAGE : Vcc( V)
Fig.29 WP setup time
t
SU : WP
 t
(SCL
l
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6/17
2010.01 - Rev.A
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