ROHM BU2394KN, BU2396 Technical data

TECHNICAL NOTE
High-performance Clock Generator Series
3ch Clock Generators for Digital Cameras
BU2394KN, BU2396KN
Description These PLL, single chip ICs generate three types of clocks - CCD, USB, and VIDEO clocks, utilized in digital still and digital video camera systems. These IC incorporate compact packaging, a simplification of the clock s ystem, and a reduction in the number of components used for mobile camera equipment.
Features
1) Connecting a crystal oscillator generates multiple clock signals with a built-in PLL.
2) The CCD clock provides switching selection outputs.
3) Providing the output of low period-jitter clock.
4) Incorporating compact package VQFN-20 most suited for mobile devices.
5) Single power supply of 3.3 V
Applications Digital still camera and digital video camera systems
Product lineup
Parameter BU2394KN BU2396KN Supply voltage 3.0V3.6V 3.0V~3.6V Operating temperature range -5~+70℃ -5~+70℃
14.318182MHz 12.000000MHz Reference input clock
28.636363MHz
Output CCD clock
Output USB clock 48.008022MHz 12.000000MHz
Absolute maximum ratings(Ta=25℃)
Parameter Symbol Limit Unit Supply voltage VDD -0.5~7.0 Input voltage VIN -0.5~VDD+0.5
Storage Temperature range Tstg -30~125
Power dissipation PD 530 mW
*1 Operation is not guaranteed. *2 Reduce by 5.3mW/°C over 25°C *3 This IC is not designed to be radiation-resistant. *4 Power dissipation is measured when the IC is mounted to the printed circuit board.
135.000000MHz 36.000000MHz
110.000000MHz 30.000000MHz
108.000000MHz 24.000000MHz
98.181818MHz
14.318182MHz Output VIDEO clock
17.734450MHz 27.000000MHz
Ver.B Oct.2005
Recommended operating range
Parameter Symbol Limit Unit Supply voltage VDD 3.0~3.6 Input H voltage VINH 0.8VDD~VDD Input L voltage VINL 0.0~0.2VDD Operating temperature Topr -5~+70 Output load CL 15(max.) pF
Electrical characteristics
BU2394KN(VDD=3.3V, Ta=25, unless otherwise specified.) XTAL_SEL=H with crystal oscillator at a frequency of 28.636363 MHz, while XTAL_SEL=L at 14.318182 MHz
Parameter Symbol
【Action circuit current】 【Output H voltage】
CLK1 CLK2 REF_CLK Output L voltage CLK1 CLK2 REF_CLK Pull-Up resistance value FS1, FS2, FS3,
CLK2ON, XTAL_SEL
Output frequency CLK1 FS2:H FS3:H CLK1 FS2:H FS3:L CLK1 FS2:L FS3:L CLK1 FS2:L FS3:H CLK2 REF_CLK FS1:H REF_CLK FS1:L Output waveform Duty1 100MHz or
less Duty2 100MHz or more Rise time
Fall time
Jitter Period-Jitter 1σ Period-Jitter MIN-MAX P-J
Output Lock-Time
Note: The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
*1 If the input frequency is set to values shown below, the output frequency will be as listed above.
*2 When XTAL_SEL is set to H, the input frequency on XTALIN will be 28.636363 MHz. *3 When XTAL_SEL is set to L, the input frequency on XTALIN will be 14.318182 MHz.
IDD 45 60 mA
VOH1 VDD-0.5 VDD-0.2 V VOH2 VDD-0.5 VDD-0.2 V
VOHR VDD-0.5 VDD-0.2 V
VOL1 0.2 0.5 V VOL2 0.2 0.5 V
VOLR 0.2 0.5 V
Pull-Up
R
Fclk1-1 135.000000 MHz Fclk1-2 108.000000 MHz Fclk1-3 98.181818 MHz Fclk1-4 110.000000 MHz Fclk2-2 48.008022 MHz Fref1-1 14.318182 MHz Fref1-2 17.734450 MHz
Duty1 45 50 55
Duty2 50
Tr 2.5 nsec
Tf 2.5 nsec
P-J1σ 30 psec
MIN-MAX
Tlock 1 msec
Min. Typ. Max.
125 250 375 Ω
180 psec
Limit
2/16
Unit Condition
At no load
When current load = - 9.0mA When current load = - 7.0mA When current load = - 4.5mA
When current load =11mA When current load =9.0mA When current load =5.5mA
Specified by a current value running when a voltage of 0V is applied to a measuring pin. (R=VDDI)
XTAL×(1188/63)/2 XTAL×(1056/70)/2 XTAL×(864/63)/2 XTAL×(968/63)/2 XTAL×(228/17)/4 XTAL Output XTAL×(706/57)/10
Measured at a voltage of 1/2 of VDD Measured at a voltage of 1/2 of VDD Period of transition time required for the output to reach 80% from 20% of VDD. Period of transition time required for the output to reach 20% from 80% of VDD.
*1 *2
*3
BU2396N(VDD=3.3V, Ta=25, Crystal =12.000000MHz, unless otherwise specified.)
Parameter Symbol
Limit
Unit Condition
Min. Typ. Max.
Action circuit current
IDD 23 35 mA
At no load Output H voltage TGCLK VCLK UCLK
VOHT VDD-0.5 V VOHV VDD-0.5 V VOHU VDD-0.5 V
When current load =-5.0mA
When current load =-5.0mA
When current load =-5.0mA Output L voltage TGCLK VCLK UCLK
VOLT 0.5 V VOLV 0.5 V VOLU 0.5 V
When current load =5.0mA When current load =5.0mA
When current load =5.0mA Pull-Up resistance value TGCLK_SEL1
TGCLK_SEL2 Pull-up
R
125 250 375 KΩ
Specified by a current value
running when a voltage of 0V is
applied to a measuring pin.
(R=VDDI) Pull-Down resistance value
TGCLK_ENTGCLK_PD VCLK_ENVCLK_PD Pull-down
R
25 50 75 KΩ
Specified by a current value
running when a VDD is applied to
a measuring pin.
(R=VDDI) Output frequency
TGCLK SEL1:L SEL2:L TGCLK SEL1:L SEL2:H TGCLK SEL1:H VCLK UCLK
TGCLK1 24.000000 MHz TGCLK2 30.000000 MHz TGCLK3 36.000000 MHz
VCLK 27.000000 MHz UCLK 12.000000 MHz
XTAL×(48/4)/6
XTAL×(60/4)/6
XTAL×(54/3)/6
XTAL×(54/3)/8
XTAL output Output waveform Duty Rise time
Duty 45 50 55
Tr 2.0 nsec
Measured at a voltage of 1/2 of VDD
Period of transition time required
for the output to reach 80% from
20% of VDD. Fall time
Tf 2.0 nsec
Period of transition time required
for the output to reach 20% from
80% of VDD. Jitter
Period-Jitter 1σ
P-J1σ 50 psec
Period-Jitter MIN-MAX P-J
MIN-MAX
Output Lock-Time
Tlock 1 msec
300 psec
1
2
3
Note: The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN.
If the input frequency is set to 12.000000MHz, the output frequency will be as listed above.
Common to BU2394KN, BU2396KN 1 Period-Jitter 1σ This parameter represents standard deviation (=1σ) on cycle distribution data when the output clock c ycles are sampled 1000 times consecutively, with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
2 Period-Jitter MIN-MAX This parameter represents a maximum distribution width on cycle distribution data when the output clock cycles are sampled 1000 times consecutively, with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
3 Output Lock-Time This parameter represents the elapsed time to reach a voltage of 3.0 V after power supply turns ON and after the system is switched from power-down to normal operation state, or after the output frequency is switched and is stabilized.
3/16
Reference data (BU2394KN basic data)
1.0Vdiv
1.0nsecdiv
Fig.1 135MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.2 135MHz Period-Jitter
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10dBdiv
Fig.3 135MHz Spectrum
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10KHzdiv
1.0Vdiv
2.0nsecdiv
Fig.4 110MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
2.0nsecdiv
Fig.7 108MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.5 110MHz Period-Jitter
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.8 108MHz Period-Jitter
At VDD=3.3V and CL=15pF
10dBdiv
10KHzdiv
Fig.6 110MHz Spectrum
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10dBdiv
Fig.9 108MHz Spectrum
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10KHzdiv
1.0Vdiv
2.0nsecdiv
Fig.10 98MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.11 98MHz Period-Jitter
At VDD=3.3V and CL=15pF
4/16
10dBdiv
10KHzdiv
Fig.12 98MHz Spectrum
At VDD=3.3V and CL=15pF
Reference data (BU2394KN basic data)
1.0Vdiv
5.0nsecdiv
Fig.13 48MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
10.0nsecdiv
Fig.16 17.7MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
10.0nsecdiv
Fig.19 14.3MHz output wave
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.14 48MHz Period-Jitter
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.17 17.7MHz Period-Jitter
At VDD=3.3V and CL=15pF
1.0Vdiv
500psecdiv
Fig.20 14.3MHz Period-Jitter
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10dBdiv
Fig.15 48MHz Spectrum
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10dBdiv
Fig.18 17.7MHz Spectrum
At VDD=3.3V and CL=15pF
RBW=1KHz
VBW=100Hz
10dBdiv
Fig.21 14.3MHz Spectrum
At VDD=3.3V and CL=15pF
10KHzdiv
10KHzdiv
10KHzdiv
5/16
Reference data (BU2394KN Temperature and Supply voltage variations data)
55 54 53 52 51 50
Duty[%]
49
Duty
48 47 46 45
-25 0 25 50 75 100 Temperature:T[℃]
Fig.22 135MHz
TemperatureDuty
VDD=2.9V VDD=3.3V
VDD=3.7V
100
90 80
[psec]
70
σ
60
PJ-1
50
σ
40 30 20
Period-jitter1
10
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.23 135MHz
TemperaturePeriod-Jitter 1σ
55 54 53 52 51 50
Duty[%]
49
Duty
48 47 46 45
-25 0 25 50 75 100 Temperature:T[℃]
Fig.25 110MHz
TemperatureDuty
VDD=2.9V VDD=3.3V
VDD=3.7V
100
90 80
[psec]
70
σ
60
PJ-1
50
σ
40 30 20
Period-jitter1
10
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.26 110MHz
TemperaturePeriod-Jitter 1σ
55 54 53 52 51 50
Duty[%]
49
Duty
48 47 46 45
-25 0 25 50 75 100 Temperature:T[℃]
Fig.28 108MHz
TemperatureDuty
VDD=2.9V VDD=3.3V
VDD=3.7V
100
90 80
[psec]
70
σ
60
PJ-1
50
σ
40 30 20
Period-jitter1
10
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.29 108MHz
TemperaturePeriod-Jitter 1σ
55 54 53 52 51 50
Duty[%]
49
Duty
48 47 46 45
-25 0 25 50 75 100 Temperature:T[℃]
Fig.31 98MHz
TemperatureDuty
VDD=2.9V VDD=3.3V
VDD=3.7V
100
90 80
[psec]
70
σ
60
PJ-1
50
σ
40 30 20
Period-jitter1
10
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.32 98MHz
TemperaturePeriod-Jitter 1σ
6/16
600
500
400
300
200
PJ-MIN-MAX[psec]
Period-jitterMIN-MAX
100
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.24 135MHz
TemperaturePeriod-Jitter MIN-MAX
600
500
400
300
200
PJ-MIN-MAX[psec]
Period-jitterMIN-MAX
100
0
-25 0 25 50 75 100 Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.27 110MHz
TemperaturePeriod-Jitter MIN-MAX
600
500
400
300
200
PJ-MIN-MAX[psec]
Period-jitterMIN-MAX
100
0
-25 0 25 50 75 100
Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.30 108MHz
TemperaturePeriod-Jitter MIN-MAX
600
500
400
300
200
PJ-MIN-MAX[psec]
Period-jitterMIN-MAX
100
0
-25 0 25 50 75 100
Temperature:T[℃]
VDD=2.9V VDD=3.3V
VDD=3.7V
Fig.33 98MHz
TemperaturePeriod-Jitter MIN-MAX
Loading...
+ 11 hidden pages