ROHM BU1852GUW Technical data
A
GPIO ICs
Keyencoder IC
BU1852GUW
No.11098EAT04
●Description
Keyencoder IC BU1852GUW can monitor up to 8x12 matrix (96 keys), which means to be adaptable to Qwerty keyboard.
We adopt the architecture that the information of the only key which status is changed, like push or release, is encoded into
the 8 bits data. This can greatly reduce the CPU load which tends to become heavier as the number of keys increase.
(Previously, all key's status is stored in the registers.) When the number of keys is small, the extra ports can be used as
GPIO. Furthermore, auto sleep function contributes to low power consumption, when no keys are pressed. It is also
equipped with the various functions such as ghost key rejection, N-key Rollover, Built-in power on reset and oscillator.
●Features
1) Monitor up to 96 matrix keys.
2) Under 3µA Stand-by Current
3) Built-in Power on Reset.
4) Ghost key rejection.
5) Keyscan / GPIO selectable
6) 3 volt tolerant Input
●Absolute maximum ratings (Ta=25℃)
Parameter Symbol Ratings Unit Conditions
VDD -0.3 ~ +2.5 V VDD≦VDDIO
Supply Voltage
VDDIO -0.3 ~ +4.5 V
1
※
VI1 -0.3 ~ VDD +0.3
V XRST, XI, TW, PORENB
1
Input voltage
VI2 -0.3 ~ VDDIO +0.3
※
V ADR
VIT -0.3 ~ +4.5 V
Storage temperature range Tstg -55 ~ +125 ℃
2
Package power PD 272
※ This IC is not designed to be X-ray proof.
※1 It is prohibited to exceed the absolute maximum ratings even including +0.3 V.
※2 Package dissipation will be reduced each 2.72mW/℃ when the ambient temperature increases beyond 25℃.
※
mW
●Operating conditions
Ratings
Parameter Symbol
Min. Typ. Max.
Supply voltage range
(VDD)
Supply voltage range
(VDDIO)
VDD 1.65 1.80 1.95 V
VDDIO 1.65 1.80 3.60 V
VI1 -0.2 - VDD+0.2 V XRST, XI, TW, PORENB
Input voltage range
VI2 -0.2 - VDDIO+0.2 V ADR
VIT -0.2 - 3.60 V
XINT, SCL, SDA,
COL[11:0], ROW[7:0]
Unit Conditions
XINT, SCL, SDA,
COL[11:0], ROW[7:0]
Operating temperature range Topr -30 25 +85 ℃
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
●Electrical characteristics
1. DC characteristics (VDD=1.8V, VDDIO=1.8V, Ta=25℃)
Parameter Symbol
Min. Typ. Max.
Input H Voltage1 V
Input H Voltage2 V
0.8xVDD - 3.6 V
IH1
0.8xVDD - VDD+0.2 V
IH2
Limits
Technical Note
Unit Conditions
1
※
2
※
Input H Voltage3 V
Input H Voltage4 V
Input L Voltage1 V
Input L Voltage2 V
Input H Current1 I
Input H Current2 I
0.8xVDDIO - 3.6 V COL[11:0]
IH3
0.8xVDDIO - VDDIO+0.2 V ADR
IH4
-0.2 - 0.2xVDD V
IL1
-0.2 - 0.2xVDDIO V ADR, COL[11:0]
IL2
-1.0 - 1.0 µA
IH1
-1.0 - 1.0 µA VIN=1.80V
IH2
Input L Current IIL -1.0 - 1.0 µA
Output H Voltage1 V
Output H Voltage2 V
Output L Voltage1 V
Output L Voltage2 V
※1 XINT,SCL,SDA,ROW[7:0]
※2 XRST,XI,TW,PORENB
※3 XINT,SCL,SDA,ROW[7:0],XRST,XI,TW,PORENB
※4 XINT,SCL,SDA,ROW[7:0],COL[11:0]
※5 XRST,XI,TW,PORENB,ADR
※6 XINT,SDA,ROW[7:0]
0.75xVDD - - V IOH=-2mA, ROW[7:0]
OH1
0.75xVDDIO - - V IOH=-2mA, COL[11:0]
OH2
- - 0.25xVDD V IOL=2mA,
OL1
- - 0.25xVDDIO V IOL=2mA, COL[11:0]
OL2
2. Circuit Current (VDD=1.8V, VDDIO=1.8V, Ta=25℃)
Limits
Parameter Symbol
Min. Typ. Max.
3
※
4
※
V
IN
=3.60V
Pull-down/up OFF
5
※
=0V
V
IN
Pull-down/up OFF
6
※
Unit Conditions
Power Down Current
(VDD)
- - 1.0 µA
I
PD
XRST=VSS
Power Down Current
(VDDIO)
Standby Current1
(VDD)
- - 1.0 µA
I
PDIO
I
- - 3.0 µA
STBY1
XRST=VDD,
PORENB=VSS,
Standby Current1
(VDDIO)
Standby Current2
(VDD)
- - 1.0 µA
I
STBYIO1
I
- - 1.0 µA
STBY2
SCL=VDD, SDA=VDD
XRST=VDD,
PORENB=VDD,
Standby Current2
(VDDIO)
Operating Current
(VDD)
I
- - 1.0 µA
STBYIO2
I
- 50 110 µA
OP
SCL=VDD, SDA=VDD
Internal oscillator is used.
one key is pressed.
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
Technical Note
2
C AC Characteristics
3. I
Condition
(Repeated)
START
tSU;STA
SCL
SDA
tHD;STA
tBUF
VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS
Parameter Symbol
SCL Clock Frequency f
SCL
t
LOW
BIT7
tHIGH
BIT6
1/fSCLK
tSU;DAT
Fig.1 I
tHD;DAT
2
C AC timing
Ack
STOP
tSU;STO
Limits
Unit Conditions
Min. Typ. Max.
- - 400 kHz
Bus free time t
(Repeated) START Condition
Setup Time
(Repeated) START Condition
Hold Time
SCL Low Time t
SCL High Time t
Data Setup Time t
Data Hold Time t
STOP Condition Setup Time t
1.3 - - µs
BUF
t
0.6 - - µs
SU;STA
0.6 - - µs
t
HD;STA
1.3 - - µs
LOW
0.6 - - µs
HIGH
100 - - ns
SU;DAT
0 - - ns
HD;DAT
0.6 - - µs
SU;STO
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
4. GPIO AC Characteristics
GPIO[7:0](Output)
GPIO[7:0](Input)
VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS
Output Data Valid Time tDV - - 0.8 µs
State
SCL
tIV
XINT
Fig.2 GPIO AC timing
Limits
Parameter Symbol
Min. Typ. Max.
BIT 0BIT 1
tDV
Unit Conditions
Technical Note
A
NA
t
IR
Interrupt Valid Time tIV - - 5 µs
Interrupt Reset Time tIR - - 5 µs
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
5. Startup sequence
VDD
VDDIO
tVDD
XRST
tVDD
SCL
SDA
VDD=1.8V, VDDIO=1.8V, Topr=25℃, TW=VSS
Parameter Symbol
VDD Stable Time t
Reset Wait Time t
VDD
RWAIT
tVDD
tRWAIT
tI2CWAIT
tRV
tI2CWAIT
Fig.3 Start Sequence timing
Limits
Unit Conditions
Min. Typ. Max.
- - 5 ms
VDD and VDDIO are ON
at the same time.
0 - - µs XRST controlling
Technical Note
tVDD
tRWAIT
1
※
Reset Valid Time tRV 10 - - µs
I2C Wait Time t
※1 Even if XRST port is not used, it operates because Power On Reset is built in.
In this case, connect XRST port with VDD on the set PCB.
10 - - µs
I2CWAIT
Note) At VDD=0V, when SCL port is changed from 0V to 0.5V or more, SCL port pulls the current. It is same in SDA, XINT,
and ROW[7:0] ports of 3V tolerant I/O. (VDDIO=0V in case of COL[11:0] ports)
VDD
Port
Port
0V
3V
0V
0.1～1mA
(~2kΩ Pull-up)
Pull Current
2～3ms
Fig.4 Port operating at VDD=0V
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
●Package Specification
Technical Note
U1852
Lot No.
Fig.5 Package Specification (VBGA035W040)
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
A
●Pin Assignment
Technical Note
●Block diagram
VDD
TESTM[1:0]
ADR
TW
SCL
SDA
XINT
XRST
PORENB
VSS
A
B
C
D
E
F
Input
Filter
Interrupt
Filter
1 2 3 4 5
TESTM 0 XI ROW0 ROW2 ROW4
XRST ROW1 ROW3 ROW6
XINT VDD PORENB VSS ROW 7
SDA VDD VDDIO VSS COL2
SCL COL10 COL8 COL6 COL4
TESTM 1 COL11 COL9 COL7 COL5
Fig.6 Pin Diagram (Top View)
XI
Oscillator
Key
I2C / 3 wire
Control
Interrupt
Logic
Reset
Gen
Power
on
Reset
Fig.7 Functional Block Diagram
Encoder
+
FIFO
6
TW
ROW5
COL0
COL1
COL3
DR
VDDIO
COL[11:0]/
GPIO[19:8]
Key Scan
/
GPIO
Control
ROW[7:0]/
GPIO[7:0]
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
BU1852GUW
A
●Pin Functional Descriptions
PIN name I/O Function Init Cell Type
VDD - Power supply (Core, I/O except for COL[11:0], ADR) - -
VDDIO - Power supply (I/O for COL[11:0], ADR) - -
VSS - GND - -
XRST I Reset(Low Active) I A
XI I External clock input (32kHz) I I
Select protocol
TW I
H: original 3 wire
L: I
(TW=L) Select Device Address for I
ADR I
(TW=H) H : Key scan rate 1/2
2
C
2
C
I B
I B
L : Key scan rate original
XINT O Key/GPIO Interrupt
H(TW=H)
Hi-z(TW=L)
SCL I Clock for serial interface I D
SDA I/O Serial data inout for serial interface I F
ROW0 I/O ROW0 / GPIO0
Technical Note
E
ROW1 I/O ROW1 / GPIO1
ROW2 I/O ROW2 / GPIO2
ROW3 I/O ROW3 / GPIO3
ROW4 I/O ROW4 / GPIO4
ROW5 I/O ROW5 / GPIO5
ROW6 I/O ROW6 / GPIO6
ROW7 I/O ROW7 / GPIO7
COL0 I/O COL0 / GPIO8
COL1 I/O COL1 / GPIO9
COL2 I/O COL2 / GPIO10
COL3 I/O COL3 / GPIO11
COL4 I/O COL4 / GPIO12
COL5 I/O COL5 / GPIO13
COL6 I/O COL6 / GPIO14
COL7 I/O COL7 / GPIO15
COL8 I/O COL8 / GPIO16
COL9 I/O COL9 / GPIO17
I
[100kΩ Pull-up]
L(TW=H)
I
[150kΩ Pull-down]
(TW=L)
G
H
COL10 I/O COL10 / GPIO18
COL11 I/O COL11 / GPIO19
PORENB I Power on reset enable (Low Active) I B
TESTM0 I
Tes t P in s
1
※
I C
TESTM1 I
※1 Note: All these pins must be tied down to GND in normal operation.
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© 2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.
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