1.5MHz, 800mA, High Efficiency PWM
Step-Down DC/DC Converter
RT8010B
General Description
The RT8010B is a high-efficiency Pulse-Width-Modulated
(PWM) step-down DC/DC converter. Capable of delivering
800mA output current over a wide input voltage range from
2.5V to 4V, the RT8010B is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs and hand-held devices.
Two operating modes are available including PWM/Low-
Dropout autoswitch and shut-down modes. The internal
synchronous rectifier with low R
conduction loss at PWM mode. No external Schottky
diode is required in practical application.
The RT8010B enters Low-Dropout mode when normal
PWM can not provide regulated output voltage by
continuously turning on the upper PMOS. The RT8010B
enters shut-down mode and consumes less than 0.1μA
when EN pin is pulled low.
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operating
frequency of 1.5MHz. This along with small WDFN-8L 2x2
package provides small PCB area application. Other
features include soft start, lower internal reference voltage
with 2% accuracy, over temperature protection, and over
current protection.
dramatically reduces
DS(ON)
Features
2.5V to 4V Input Range
Output Voltage (Adjustable Output From 0.6V to V
800mA Output Current
95% Efficiency
No Schottky Diode Required
1.5MHz Fixed Frequency PWM Operation
Small 8-Lead WDFN Package
RoHS Compliant and Halogen Free
Applications
Mobile Phones
Personal Information Appliances
Wireless and DSL Modems
MP3 Players
Portable Instruments
Pin Configurations
(TOP VIEW)
1
EN
2
FB
3
VIN
4
LX
WDFN-8L 2x2
8
PGND
7
PGND
6
PGND
9
5
AGND
Marking Information
)
IN
For marking information, contact our sales representative
Ordering Information
RT8010B
directly or through a Richtek distributor located in your
area.
Package Type
QW : WDFN-8L 2x2 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
DS8010B-04 March 2011 www.richtek.com
1
RT8010B
Typical Application Circuit
C
IN
4.7µF
6, 7, 8
3
VIN
RT8010B
1
EN
PGND
-6
and 6x10
4
LX
2
FB
5
AGND
-6
for component selection.
V
2.5V to 4V
R1
⎛
⎜
REFOUT
⎝
⎞
1 x VV
+=
⎟
R2
⎠
IN
with R2 = 75kΩ to 200kΩ,
and (R1 x C1) should be in the range between 3x10
Functional Pin Description
Pin No. Pin Name Pin Function
1 EN Ch ip Ena ble (Active H igh ).
2 FB Feedback Pin.
3 VIN Power Input.
4 LX Pin for Switching.
5 AGND Analog Ground.
6, 7, 8 PGND Power Ground.
9 (Exposed Pad) NC No Internal Connection.
L
2.2µH
V
OUT
C1
R1
C
OUT
I
R2
R2
10µF
Function Block Diagram
Slope
Compensation
FB
Error
Amplifier
RC
COMP
EN VIN
OSC &
Shutdown
Control
Current
Sense
PWM
Comparator
UVLO &
Power Good
Detector
V
REF
Current
Limit
Detector
Control
Logic
Driver
RS1
LX
RS2
PGND
AGND
DS8010B-04 March 2011www.richtek.com
2
RT8010B
Absolute Maximum Ratings (Note 1)
Supply Input Voltage------------------------------------------------------------------------------------------------------ 6.5V
EN, FB Pin Voltage ------------------------------------------------------------------------------------------------------- −0.3V to V
Power Dissipation, P
@ TA = 25°C
D
WDFN-8L 2x2 -------------------------------------------------------------------------------------------------------------- 0.606W
Package Thermal Resistance (Note 2)
WDFN-8L 2x2, θJA--------------------------------------------------------------------------------------------------------- 165°C/W
WDFN-8L 2x2, θJC-------------------------------------------------------------------------------------------------------- 20°C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 4)
Supply Input Voltage------------------------------------------------------------------------------------------------------ 2.5V to 4V
Junction Temperature Range--------------------------------------------------------------------------------------------
Ambient Temperature Range--------------------------------------------------------------------------------------------
−40°C to 125°C
−40°C to 85°C
IN
Electrical Characteristics
(V
= 3.6V, V
IN
Input Voltage Range
Quiescent Current IQ I
Shutdown Current
Reference Voltage
Adjustable Output Range
Output Voltage
Accuracy
FB Input Current
P-MOSFET RON R
N-MOSFET RON R
P-Channel Current Limit I
EN High-Level Input Voltage
EN Low-Level Input Voltage
Under Voltage Lockout
Threshold
Hysteresis -- 0.1 -- V
OUT
= 2.5V, V
= 0.6V, L = 2.2μH, C
REF
= 4.7μF, C
IN
OUT
= 10μF, I
= 0.8A, T
MAX
= 25°C, unless otherwise specified)
A
Parameter Symbol Test Conditions Min Typ Max Unit
2.5 -- 4 V
= 0mA, VFB = V
OUT
EN = GND -- 0.1 1
+ 5% -- 50 70 μA
REF
μA
For Adjustable Output Voltage 0.588 0.6 0.612 V
(Note 6)
= V
V
IN
0A < I
= VIN
FB
I
OU T
I
OU T
= 2.5V to 4V 1.2 1.5 -- A
IN
+ ΔV to 4V (Note 5)
OUT
< 0.8A
OUT
= 200mA
= 200mA
VIN = 2.5V to 4V
VIN = 2.5V to 4V
V
REF
−3
−50 -- 50 nA
V
= 3.6V
IN
V
= 2.5V -- 0.38 --
IN
V
= 3.6V
IN
= 2.5V
V
IN
-- 0.28 --
-- 0.25 --
-- 0.35 --
1.5 -- -- V
-- -- 0.4 V
--
V
− 0.2V
IN
-- +3 %
V
Ω
Ω
Adjustable
V
IN
I
SH DN
V
REF
V
OUT
ΔV
OUT
V
I
FB
DS(ON)_P
DS(ON)_N
V
LIM_P
V
EN_H
V
EN_L
UVLO -- 1.8 -- V
To be continued
DS8010B-04 March 2011 www.richtek.com
3
RT8010B
Parameter Symbol Test Condit ions Min Typ Max Unit
Oscillator Frequency
Thermal Shutdown Temperature
V
f
OSC
T
SD
= 3.6V, I
IN
OU T
= 100mA
-- 160 --
1.2 1.5 1.8 MHz
°C
Max. Duty Cycle 100 -- -- %
LX Leakage Current
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ
Note 3 Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. ΔV = I
Note 6. Guarantee by design.
is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of
JA
JEDEC 51-7 thermal measurement standard. The case point of θ
x P
OUT
RDS(ON)
V
IN
= 3.6V, V
= 0V or V
LX
= 3.6V −1
LX
is on the expose pad of the package.
JC
-- 1
μA
DS8010B-04 March 2011www.richtek.com
4
Typical Operating Characteristics
RT8010B
Efficiency vs. Output Current
100
90
80
70
60
50
40
Efficiency (%)
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
V
OUT
= 1.2V, C
= 4.7μF, L = 4.7μH
OUT
Output Current (A)
EN Pin Threshold vs. Input Voltage
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
EN Pin Threshold (V)
0.70
0.65
0.60
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5
Rising
Falling
V
OUT
Input Voltage (V)
= 1.2V, I
VIN = 3.3V
VIN = 2.5V
= 0A
OUT
Efficiency vs. Output Current
100
90
80
70
60
50
40
Efficiency (%)
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
V
OUT
= 1.2V, C
OUT
VIN = 3.3V
VIN = 2.5V
= 10μF, L = 2.2μH
Output Current (A)
EN Pin Threshold vs. Temperature
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
EN Pin Threshold (V)
0.6
0.5
0.4
-40 -25 -10 5 20 35 50 65 80 95 110 125
Rising
Falling
VIN = 3.6V, V
Temperature
= 1.2V, I
OUT
(°C)
OUT
= 0A
V
UVLO Threshold vs. Temperature
2.0
1.9
1.8
1.7
1.6
1.5
1.4
UVLO Threshold (V)
1.3
1.2
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature
Rising
Falling
V
OUT
= 1.2V, I
(°C)
OUT
= 0A
0.612
0.610
0.608
0.606
0.604
0.602
(V)
0.600
REF
0.598
V
0.596
0.594
0.592
0.590
0.588
-40 -25 -10 5 20 35 50 65 80 95 110 125
vs. Temperature
REF
Temperature
(°C)
DS8010B-04 March 2011 www.richtek.com
5
RT8010B
Output Voltage (V)
Output Voltage vs. Loading Current
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Loading Current (A)
Frequency vs. Input Voltage
1.60
1.55
1.50
1.45
VIN = 3.6V
Output Voltage vs. Temperature
1.25
1.24
1.23
1.22
1.21
1.20
1.19
1.18
Output Voltage (V)
1.17
1.16
1.15
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature
VIN = 3.6V, I
(°C)
Frequency vs. Temperature
1.60
1.55
1.50
1.45
OUT
= 0A
1.40
1.35
Frequency (MHz)
1.30
1.25
1.20
2.5 2.8 3.1 3.4 3.7 4
VIN = 3.6V, V
= 1.2V, I
OUT
Input Voltage (V)
Output Current Limit vs. Input Voltage
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
Output Current limit (A)
1.5
1.4
2.5 2.75 3 3.25 3.5 3.75 4
Input Voltage (V)
V
= 1.2V @ T
OUT
= 300mA
OUT
= 25°C
A
1.40
1.35
Frequency (MHz)
1.30
1.25
1.20
-40 -25 -10 5 20 35 50 65 80 95 110 125
VIN = 3.6V, V
Temperature
OUT
= 1.2V, I
(°C)
OUT
Output Current Limit vs. Temperature
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
Output Current limit (A)
1.6
1.5
-40 -25 -10 5 20 35 50 65 80 95 110 125
VIN = 3.6V
VIN = 3.3V
Temperature
(°C)
V
OUT
= 300mA
= 1.2V
DS8010B-04 March 2011www.richtek.com
6
RT8010B
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
IN
(500mA/Div)
V
OUT
(50mV/Div)
Power On from EN
VIN = 3.6V, V
= 1.2V, I
OUT
OUT
Time (100μs/Div)
Load Transient Response
VIN = 3.6V, V
= 50mA to 1A
I
OUT
OUT
= 1.2V
= 10mA
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
IN
(500mA/Div)
V
OUT
(50mV/Div)
Power On from EN
VIN = 3.6V, V
= 1.2V, I
OUT
OUT
Time (100μs/Div)
Load Transient Response
VIN = 3.6V, V
= 50mA to 0.5A
I
OUT
OUT
= 1.2V
= 1A
I
OUT
(500mA/Div)
V
OUT
(10mV/Div)
V
LX
(2V/Div)
Output Ripple Voltage
VIN = 3.6V, V
I
= 0A
OUT
Time (50μs/Div)
= 1.2V
OUT
Time (500ns/Div)
I
OUT
(500mA/Div)
V
OUT
(10mV/Div)
V
LX
(2V/Div)
Output Ripple Voltage
VIN = 3.6V, V
= 1A
I
OUT
Time (50μs/Div)
= 1.2V
OUT
Time (500ns/Div)
DS8010B-04 March 2011 www.richtek.com
7
RT8010B
Applications Information
The basic RT8010B application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and C
OUT
.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
ΔI
V
⎡
=
L
⎢
⎣
⎤
⎥
Lf
×
⎦
V
⎡
1
−×
⎢
⎣
⎤
OUTOUT
⎥
V
IN
⎦
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(I
). The largest ripple current occurs at the
MAX
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
⎡
V
⎡
=
L
OUT
⎢
Δ×
If
⎣
L(MAX)
⎤
⎥
⎦
V
−×
1
⎢
V
IN(MAX)
⎣
OUT
⎤
⎥
⎦
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally can not
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
design current is exceeded. This results in an abrupt
increase in inductor ripple current and consequent output
voltage ripple. Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy materials
are small and do not radiate energy but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and
any radiated field/EMI requirements.
CIN and C
Selection
OUT
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
II
OUT(MAX)RMS
OUT
V
This formula has a maximum at VIN = 2V
I
RMS
= I
/2. This simple worst-case condition is
OUT
V
IN
1
−=
V
OUT
IN
, where
OUT
commonly used for design because even significant
deviations do not offer much relief or choose a capacitor
rated at a higher temperature than required. Several
capacitors may also be paralleled to meet size or height
requirements in the design.
The selection of C
is determined by the effective series
OUT
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔV
⎡
ESR ΔIΔV
LOUT
⎢
⎣
, is determined by :
OUT
⎤
1
+≤
8fC
OUT
⎥
⎦
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss reduction and saturation
prevention. Ferrite core material saturates “hard”, which
means that inductance collapses abruptly when the peak
8
DS8010B-04 March 2011www.richtek.com
RT8010B
The output ripple is the highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
R1
)
+=
R2
where V
(1VV
REFOUT
is the internal reference voltage (0.6V typ.)
REF
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I2R
losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VIN quiescent current appears due to two factors
including : the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate charge
current results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of charge
ΔQ moves from VIN to ground.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 4.
V
OUT
The resulting ΔQ/Δt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
I
GATECHG
= f(QT+QB)
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
RT8010B
GND
R1
FB
R2
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL.
Figure 4. Setting the Output Voltage
DS8010B-04 March 2011 www.richtek.com
9
RT8010B
In continuous mode, the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET R
RSW = R
The R
DS(ON)TOP
DS(ON)
and the duty cycle (DC) as follows :
DS(ON)
x DC + R
DS(ON)BOT
x (1−DC)
for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses, simply add RSW to R
and multiply the result by the square of the average output
current.
Other losses including CIN and C
ESR dissipative
OUT
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
Where T
temperature 125°C, T
θ
= ( T
D(MAX)
J(MAX)
is the junction to ambient thermal resistance.
JA
− TA ) / θ
J(MAX)
JA
is the maximum operation junction
is the ambient temperature and the
A
For recommended operating conditions specification of
RT8010B, where T
is the maximum junction
J(MAX)
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance θJA is layout dependent. For WDFN-8L 2x2
packages, the thermal resistance θJA is 165°C/W on the
standard JEDEC 51-7 four layers thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by following formula :
P
= ( 125°C − 25°C ) / (165°C/W) = 0.606W for
D(MAX)
WDFN-8L 2x2 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
and thermal
J(MAX)
resistance θJA.
10
For RT8010B packages, the Figure 5 of derating curves
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
0.8
0.7
0.6
0.5
L
0.4
0.3
0.2
0.1
Maximum Power Dissipation (W)
0
0 25 50 75 100 125
WDFN-8L 2x2
Ambient Temperature (°C)
Four Layers PCB
(°C)
Figure 5. Derating Curves for RT8010B Package
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
discharge C
(ESR), where ESR is the effective series
LOAD
OUT
generating a feedback error signal used
OUT
by the regulator to return V
During this recovery time, V
immediately shifts by an amount
OUT
. ΔI
also begins to charge or
LOAD
to its steady-state value.
OUT
can be monitored for
OUT
overshoot or ringing that would indicate a stability problem.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8010B.
` Put the input capacitor as close as possible to the device
pins (VIN and GND).
` LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8010B.
` Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
DS8010B-04 March 2011www.richtek.com
C
Put CIN between
and GND and it
V
IN
should be closed to
the IC.
The LX pin should be connected to
Inductor by wide and short trace,
keep sensitive components away
from this trace
RT8010B
The feedback resistor divider
must be placed as close to the
FB pin as possible.
GND
V
OUT
R2
IN
V
OUT
R1
C
Figure 6
EN
F
18
FB
2
VIN
3
45
LX
L1
C
OUT
Output capacitor must be
closed to the IC.
7
6
PGND
PGND
PGND
AGND
Table 1. Recommended Inductors
Supplier
Inductance
(uH)
Current Rating (mA)
DCR
(mΩ)
Dimensions
(mm)
Series
TAIYO YUDEN 2.2 1480 60 3.00 x 3.00 x 1.50 NR 3015
GOTREND 2.2 1500 58 3.85 x 3.85 x 1.80 GTSD32
Sumida 2.2 1500 75 4.50 x 3.20 x 1.55 CDRH2D14
Sumida 4.7 1000 135 4.50 x 3.20 x 1.55 CDRH2D14
TAIYO YUDEN 4.7 1020 120 3.00 x 3.00 x 1.50 NR 3015
GOTREND 4.7 1100 146 3.85 x 3.85 x 1.80 GTSD32
Table 2. Recommended Capacitors for CIN and C
Supplier
Capacitance
(uF)
OUT
Package Part Number
TDK 4.7 603 C1608JB0J475M
MURATA 4.7 603 GRM188R60J475KE19
TAIYO YUDEN 4.7 603 JMK107BJ475RA
TAIYO YUDEN 10 603 JMK107BJ106MA
TDK 10 805 C2012JB0J106M
MURATA 10 805 GRM219R60J106ME19
MURATA 10 805 GRM219R60J106KE19
TAIYO YUDEN 10 805 JMK212BJ106RD
DS8010B-04 March 2011 www.richtek.com
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RT8010B
Outline Dimension
D
E
A
A3
A1
D2
L
E2
SEE DETAIL A
1
e
b
2
1
1
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.200 0.300 0.008 0.012
D 1.950 2.050 0.077 0.081
D2 1.000 1.250 0.039 0.049
E 1.950 2.050 0.077 0.081
E2 0.400 0.650 0.016 0.026
e 0.500 0.020
L 0.300 0.400
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
0.012 0.016
W-Type 8L DFN 2x2 Package
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8010B-04 March 2011www.richtek.com
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