REALISTIC
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40 - CHANNEL |
00 |
MOBILE TRANSCEIVER
Catalog Number: 21-1561
CUSTOM MANUFACTURED FOR RADIO SHACK A DIVISION OF TANDY CORPORATION
CONTENTS |
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SPECIFICATIONS |
3, 4 |
BLOCK DIAGRAM |
5 |
PRINCIPLES OF OPERATION |
6 - 8 |
DISASSEMBLY |
9 |
ALIGNMENT PREPARATION |
9 |
ALIGNMENT POSITIONS AND POINTS |
10 |
PLL SECTION ALIGNMENT CHART |
11 |
VCO OUTPUT FREQUENCY, IC-2 INPUT FREQUENCY AND CODE TABLE ....... |
12 |
TRANSMITTER SECTION ALIGNMENT CHART |
13 |
RECEIVER SECTION ALIGNMENT CHART |
14 |
ALIGNMENT CONNECTIONS |
15, 16 |
NOISE BLANKER ALIGNMENT CHART |
17 |
PLL P.C. BOARD TOP VIEW |
18 |
PLL P.C. BOARD BOTTOM VIEW |
19 |
MAIN P.C. BOARD TOP VIEW |
20 |
MAIN P.C. BOARD BOTTOM VIEW |
21 |
WIRING DIAGRAM (1) |
22 |
WIRING DIAGRAM (2) |
23 |
LED P.C.BOARD (TOP VIEW) |
24 |
LED P.C.BOARD (BOTTOM VIEW) |
24 |
LED P.C.BOARD/ CHANNEL SWITCH P.C.BOARD WIRING DIAGRAM |
24 |
TROUBLESHOOTING .. . . |
25 27 |
SEMICONDUCTOR VOLTAGE READINGS |
28 33 |
PLL P.C.BOARD ASSEMBLY PARTS LIST |
34 ti 39 |
MAIN P.C.BOARD ASSEMBLY PARTS LIST |
40 49 |
LED P.C.BOARD ASSEMBLY PARTS LIST |
49 |
CHASSIS ASSEMBLY PARTS LIST |
50 |
EXPLODED VIEW |
51 |
SCHEMATIC DIAGRAM |
52, 53 |
SEMICONDUCTOR LEAD IDENTIFICATION |
54 |
IC PIN CONFIGURATION |
54, 55 |
SPECIFICATIONS
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DESCRIPTION |
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CONDITION |
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NOMINAL |
LIMIT |
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TRANSMITTER |
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Frequency Tolerance |
AM |
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±0.0003% |
±0.005% |
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SSB |
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±0.0003% |
±0.005% |
RF Output |
AM |
13.8 V DC |
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3.8 W |
3.5 - 4.0 W |
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(4 watts max.) |
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SSB |
13.8 V DC |
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12 W PEP |
10 - 12 W |
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Modulation Distortion |
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80% MOD 1 kHz |
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3% |
10°/© |
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Spurious Harmonic Emission AM |
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-65 dB |
-60 dB |
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SSB |
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-65 dB |
-60 dB |
Carrier |
Suppression |
SSB |
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-50 dB |
-40 dB |
Unwanted Sideband Suppression |
2.5 kHz (SSB) |
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-50 dB |
-40 dB |
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Current Drain |
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No Modulation (AM) |
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1500 mA |
2000 mA |
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(SSB) |
1000 mA |
1500 mA |
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80% MOD (AM) |
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2000 mA |
2600 mA |
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10 W PEP Two-Tone (SSB) |
2500 mA |
3000 mA |
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Modulation Frequency Response |
1 kHz |
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0 dB |
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Lower |
450 Hz |
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AM SSB -6 dB |
AM -10 dB SSB -14 dB |
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Upper |
2.5 kHz |
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AM SSB -6 dB |
AM SSB -10 dB |
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Carrier Power Uniformity |
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Ch-to-Ch with No MOD |
AM 0.3 W |
0.5 W |
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MIC Input Level Uniformity |
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Ch-to-Ch for 4 W Output, |
SSB 2 dB |
3 dB |
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1000Hz Single-Tone |
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Intermodulation Distortion |
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500 and 2500 Hz Two-Tone |
30 dB |
25 dB |
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MIC Input Level Uniformity |
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LSB/USB 4 W Output |
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1.5 kHz Single Tone |
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1 dB |
3 dB |
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Microphone Sensitivity |
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AM 50% MOD |
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0.7 mV |
1.5 mV |
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SSB 4 W PEP |
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0.7 mV |
1.5 mV |
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AMC Range |
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AM |
50 - 100% MOD |
50 dB |
30 dB |
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SSB |
10 - 12 W PEP |
20 dB |
10 dB |
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RECEIVER |
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Max. Sensitivity |
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AM |
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0.5 µV |
1 AV |
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SSB |
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0.25 µV |
0.50 |
Sensitivity |
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10 dB S/N |
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AM |
0.5 AV |
1 AV |
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SSB |
0.25 AV |
0.5 µV |
AGC Figure of Merit |
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50 mV 10 dB |
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AM |
90 dB |
80 dB |
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SSB |
90 dB |
80 dB |
Overload AGC Characteristics |
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10 mV to 100 mV |
AM |
±2 dB |
±5 dB |
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SSB |
±2 dB |
±5- dB |
Overall Audio Fidelity |
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at 6 dB Down |
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Upper Frequency |
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AM |
2100 Hz |
1750 - 2500 Hz |
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SSB |
3500 Hz |
1750' 2500 Hz |
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Lower Frequency |
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AM |
300 Hz |
150 - 500 Hz |
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SSB |
300 Hz |
150 - 500 Hz |
Cross Modulation RS Standard |
AM |
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60 dB |
50 dB |
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Adjacent Channel Selectivity |
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10 kHz |
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AM |
80 dB |
60 dB |
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SSB |
90 dB |
60 dB |
Maximum Audio Output Power |
AM |
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5 W |
4 W |
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SSB |
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5W |
4W |
Audio Output Power |
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10% THD |
SSB |
3.5 W |
3 W |
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AM |
3.5W |
3W |
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THD |
AM |
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500 mW Output 1 mV |
3% |
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Input 30% (MOD) |
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6% |
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80% (MOD) |
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5% |
12% |
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THD |
SSB |
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1 mV Input 1 kHz |
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3% |
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Single Tone |
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6% |
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DESCRIPTION
RF Gain Control Range at Max.
Sensitivity Level
S/N Ratio
Squelch Sensitivity at Threshold
Squelch Sensitivity at Tight
Skirt Rejection (±20 kHz)
5 Meter Sensitivity at "S-9"
(No Modulation AM)
Image Rejection Ratio
fo + (2 x 7.8 MHz) 1/2 IF Rejection Ratio
fo + 7.8 MHz/2
IF Rejection Ratio 7.8 MHz
Oscillator Drop-out Voltage
Current Drain at No Signal
Current Drain at Maximum
Clarifier Range
Spurious Rejection Ratio
Within Band
Outside of Band
CONDITION |
NOMINAL |
LIMIT |
AM |
40 dB |
30 — 50 dB |
SSB |
40 dB |
30 — 50 dB |
AM Input 1 mV |
40 dB |
35 dB |
SSB |
40 dB |
35 dB |
AM |
0.5 µV |
1 /./V |
SSB |
0.5µV |
1µV |
AM |
1000 ptV |
500 — 2000 µV |
SSB |
1000 /../V |
500 — 2000 µV |
AM |
80 dB |
70 dB |
AM |
100µV |
50 — 200 µV |
SSB |
100 ptV |
50 — 200 µV |
AM |
80 dB |
65 dB |
SSB |
80 dB |
65 dB |
AM |
90 dB |
80 dB |
SSB |
90 dB |
80 dB |
AM |
90 dB |
75 dB |
SSB |
90 dB |
75 dB |
AM |
7 V |
10 V |
SSB |
7V |
1 0 V |
AM |
550 mA |
1000 mA |
SSB |
550 mA |
1000 mA |
AM |
1000 mA |
1500 mA |
SSB |
1000 mA |
1500 mA |
AM |
±1 kHz |
±0.6 — ±2.5 kHz |
SSB |
±1 kHz |
±0.6 — ±2.5 kHz |
AM |
65 dB |
56 dB |
SSB |
65 dB |
56 dB |
AM |
60 dB |
50 dB |
SSB |
60 dB |
50 dB |
PUBLIC ADDRESS.
Microphone Sensitivity
Output Power
Current Drain
Frequency Range
Channel
Frequency Control
Operating Temperature
Humidity
Microphone
Operating Voltage
Power Consumption
Meter
Size
3 W Output 1 kHz |
1 mV |
2 mV |
10% Distortion |
3.5 W |
3 W |
No Signal |
500 mA |
1000 mA |
Max. Output Power |
1000 mA |
1500 mA |
GENERAL
29.965 to 27.405 MHz
40 Channels
Crystal Control (PLL System) —10 °C to 50°C
10 to 95%
Dynamic Type with PTT Switch
13.8 V DC Nominal (12.0 — 15.0 Volt DC) Pos./Neg. Ground 40 Watts
TX Power and Signal Strength
205(W) x 60(H) x 260(D) mm (8-1/4" x 2-1/2" x 10-1/2")
NOTE: Nominal Specs represent &kr design specs: all units should be able to approximate these — some will exceed and some may drop slightly below these specs. Limit Specs represent the absolute worst condition which still might be considered acceptable; in no case should a unit perform to less than within any Limit Spec.
PRINCIPLES OF OPERATION
This section of the Service Manual will give you a brief technical description of unique or special circuits which you might otherwise not understand, notice or be able to troubleshoot,.
PLL CIRCUIT
The TRC-448 uses a Digital Phase Lock Loop circuit to synthesize each of the channel frequencies. The PLL Circuit consists of a reference crystal oscillator (10.24 MHz), reference divider, programable divider, crystal oscillator, Phase Detector, Low Pass Filter (LPF) and a Voltage Controlled Oscillator (VCO, which uses a varicap diode as the frequency control source).
Refer to the AM and USB Block Diagram as you go through the following description. A 10.24 MHz Crystal is used as a reference frequency. The crystal is connected between Pin 4 and 5 of the PLL IC IC-2.
Crystal oscillator Q10 produces a 33.4875/3 MHz frequency signal. This signal is processed through Q11 tripler and mixed by IC-1 mixer with the Q5 VCO frequency (34.7675 to 35.2075 MHz). The resulting down-mix produces signals of 1.28 through 1.72 MHz, which pass through LPF, and Q12 amplifier and then applied to Pin 3 of PLL IC IC-2. These frequencies are divided by "N" ,(128 through 172) as determined by the Channel Selector switch. Thus the output is 10 kHz (divided internally by IC-2).
Also, the reference oscillator frequency, 10.24 MHz, is divided by 1024 (again, internally by IC-2) resulting in another 10 kHz frequency.
These two 10 kHz signals are fed to the Phase Detector and AFC. An error voltage is generated by the Phase Detector which is in proportion to the phase difference between these two 10 kHz signals. This error voltage appears at Pin 7. The AFC circuit brings the VCO to within the lock range of the Phase Detector. The AFC output is a tri-state output that is open when the circuit is in phase lock, provides positive going pulses when the VCO frequency is lower than the reference frequency and provides negative going pulses when the VCO frequency is higher than the reference frequency. This error voltage appears at Pin 1. The error voltage which appears at Pin 7 and 1 are the result of the phase difference, plus effects of harmonics and extraneous noise. These error voltages pass through the LPF, where the error voltage is integrated and harmonics and noises are filtered out. The resulting DC voltage is applied to the VCO (a varicap diode) whose capacity varies with applied DC voltage. With proper circuit design and precise adjustments, the VCO frequency is accurate and precise. When the Phase Detector senses no frequency or phase difference between the two 10 kHz signals, the system is `locked" and the VCO generates a frequency which is as accurate and stable as the reference crystal oscillator.
The Channel Selector switch provides a Binary Code output which is connected to Pins 9 through 16. The resulting code determines "NV', the divisor which produces the required output frequency for each channel (precisely spaced 10 kHz apart).
For AM Receive Mode, crystal oscillator Q9 generates a frequency of 33.485/3 MHz. This signal is also processed through Oil tripler and mixed in IC-1 mixer with the Q5 VCO frequency (34.765 to 35.205 MHz). The resulting down-mix produces 1.28 through 1.72 MHz frequencies which are supplied to Pin 3 of IC-2. Thus, the circuit functions in the same way, except for the method of deriving the required 1.28 through 1.72 MHz stepped frequencies.
For LSB, crystal oscillator Q10 generates a frequency of 33.4875/3 MHz. This signal is processed through Q11 tripler. Carrier oscillator Q1 produces a 7.8025 MHz signal. This signal is processed through Ti and T2 Band Pass Filter, tuned to the 2nd harmonic (15.605 MHz) and mixed in Q3 mixer with the Q4 VCO frequency (19.1625 to 19.6025 MHz). The resulting up-mix produces 34.7675 through 35.2075 MHz which pass through BPF and mixed in IC-1 mixer with the 33.4875 MHz. The resulting down-mix produces the 1.28 through 1.72 MHz frequencies which are supplied to Pin 3 of IC-2. Thus, the circuit functions in the same way, except for the method of deriving the required 1.28 through 1.72 MHz stepped frequencies.
--6-
At Pin 8 of IC-2 a Transmit Inhibit signal is available. It provides a high output (supply voltage to IC-2) when the synthesizer attains a lock condition, or a low (0 volt) when not in lock. When the output is either high or low, no phase error pulses are outputted that require detection. This circuit is used to inhibit
transmitter operation if the programmed frequency cannot be properly acquired. The lock detector output will go low if a frequency error exists for more than 0.5 milliseconds. This signal is applied to the base of Q8, turning it on or off. Thus the Transmitter can not operate in an unlocked condition of the PLL.
The channel selector switch also has an inhibit function, when the selector switch is set in between two channel positions, Q13 is turned on to kill Q6.
33.4875/3 MHz |
34.765 -35.2075 MHz |
TX: AM USB |
OSC |
011 |
BPF |
IC-1 |
Q5 |
C16, 07 |
OUTPUT |
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RX : USB |
Q10 |
TRIPLER |
MIXER |
VCO |
BUFFER |
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11.1.1.1.71= |
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128- |
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1.72 MHz |
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2V |
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RX : AM |
OSC Q9 |
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LPF |
LPF |
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33.485/3 MHz |
0.5V E |
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4 |
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408A |
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Q12 |
INH BIT |
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AMP |
Q8 |
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5V |
4 |
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-L |
1, 7 |
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IC-2 |
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CI |
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10.24 MHz -r |
PLL IC |
8 |
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5 |
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k 9-1 |
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CHANNEL |
INHIBIT |
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SWITCH |
Q13 |
AM and USB
(Receive and Transmit)
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7.8025 MHz |
15.605 MHz |
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19.1625 -19.6025 MHz |
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OSC Q1 |
BPF |
Q3 Fr Q4 |
Q6, Q7 |
OUTPUT |
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MIXER |
VCO |
BUFFER |
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4-1 |
eT |
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CARRIER |
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-57775 |
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35.2075 MHz |
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1.5V |
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BPF |
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2V |
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33.4875/3 MHz |
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TX : LSB |
OSC |
Q11 |
BPF |
IC-1 |
LPF |
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RX : LSB |
Q10 |
TR IPLER |
MIXER |
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1.28 |
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1.72 MHz |
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LPF |
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INH BIT |
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Q8 |
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Q12 |
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5V1 |
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AMP |
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1, 7 |
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10.24 MHz = |
IC-2 |
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PLL IC |
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-r |
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8 |
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9--1 |
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CHANNEL |
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INHIBIT |
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SWITCH |
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Q13 |
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LSB
(Receive and Transmit)
—7—
AUTOMATIC MODULATION CONTROL CIRCUIT
The Automatic Modulation Control (AMC) circuit consists of Q14, D26, D27 and D24. The Mic input signal is fed to pin 4 of the microphone jack and then through R62, C84 to the input terminal (pin 5) of 1C-3 where it is amplified and delivered through C90 and VR4 for further amplification by Q15, Q232, Q233, Q234 and Q235. The Audio amplifier/Modulation amplifier drives T216, whose secondary incorporates C104, through D228 and R280, which couples a portion of the signal to AMC detector diodes D27 and D28. D26 (an 8-volt zener) is connected to the output of D27/28; when the detected DC voltage from D27/28 exceeds 8 volts, D26 conducts. This applies a DC voltage to the base of Q14, thus decreasing its collector impedance. Notice that the combination of Q14 and VR4 automatically sets the desired audio signal level processed by the audio amplifier circuitry. VR5 is adjusted to seta modulation level of less than 100%.
VR4 is adjusted to set a modulation level in the SSB mode. IC-3 is a silicon integrated circuit which functions as a audio amplifier with built-in automatic voice-operated gain adjustment. It is designed to provide an essentially constant output signal for a 60 dB range of input.
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MIC JACK |
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VR4 |
Q15 |
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4 |
C90 |
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R62 7 |
IC3 |
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K K |
T216 |
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4 |
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D26 |
D27 |
D228 |
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Q14 |
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C104 R280 |
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VR5 |
D28 |
AUTOMATIC LIMITER CONTROL (TRANSMITTER)/AUTOMATIC GAIN CONTROL (RECEIVER)
The Automatic Limiter Control (ALC) circuit consists of D209, D210 and Q214. The RF output signal is detected by 0209 and D210. This applies a negative DC voltage to the gate of Q214, thus decreasing its source voltage. This source voltage controls Q207's (7.8 MHz amplifier) base bias voltage, thus decreasing its base voltage. This automatically sets the desired RF output level processed by the RF amplifier circuitry. V R207 is adjusted to set a RF power level of less than 12 watts PEP.
Q214 is also used as an automatic gain control (AGC). AGC circuit consists of Q214, D221 and D222. The amplified IF signal is detected by D221, D222, D224, and D225. This voltage is used for fast-attack AGC. D221, D222 and C279 are used for slow-release AGC. Thus, the circuit functions in the same way, except for the delivering of source voltage. VR206 is adjusted to set a "0- reading on the S-meter.
-11Q207 |
VR206 |
T209 |
L208 |
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f |
Q214 |
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D209 |
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VR207 |
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D210 |
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D224 |
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C279 |
D225 |
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777 |
—8—
NOISE BLANKER
Noise pulses are amplified by IC-201 and detected by D236 and D237. The detected pulses are then amplified by Q226 and Q227. This applies a positive pulse to the base of Q228, thus decreasing its collector impedance to shunt the Q225 gate impedance during the duration of the noise pulses. The most objectionable noise pulse frequencies are distributed around 40 MHz, thus T213 and T214 are tuned to this frequency.
RF AMP |
MIX |
Q223, Q224 |
Q225 |
VV V
BLANKER
Q228
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NOISE |
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T213 |
AMP |
T214 |
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IC-201 |
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DISASSEMBLY
Refer to Figure 1.
Step 1: Remove two bracket screwsAO and the Bracket. Step 2: Remove 4 cabinet mounting screws ®
(two from each side).
Step 3: Remove Cabinet Top and Bottom.
IF
nn N |
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NOISE |
AMP |
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DET |
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Q226, Q227 |
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D236, D237 |
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FIGURE 1 |
ALIGNMENT PREPARATION |
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TEST EQUIPMENT REQUIRED |
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1. Oscilloscope |
7. |
Power meter (50 2) |
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2. |
AC VTVM |
8. |
50 2, 10 W dummy load |
3. |
DC VTVM |
9. |
2-tone generator (500 Hz — 2.5 kHz) |
4. |
Frequency Counter with level meter |
10. |
RF Signal Generator (0 30 MHz) |
5. AUDIO Signal Generator |
11. |
Pulse Generator |
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6. Sweep Generator (0 50 MHz) |
12. |
Monitor Receiver (54 MHz) |
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(or Spectrum Analyier) |
ALIGNMENT POSITIONS AND POINTS
PLL SECTION ALIGNMENT CHART
Step
1
2
3
4
5
6
7
8
9
10
11
12
Control Setting
MODE — RX
CH-19
CLARIFIER — Center
MODE — RX
CH-19
MODE — RX (AM)
MODE — RX (LSB or USB)
MODE — RX (LSB)
MODE — RX (LSB)
MODE — RX (USB)
CH-1
MODE — RX (LSB)
CH-19
MODE — RX (LSB)
CH-1
MODE — RX (AM)
CH-19
MODE — RX (LSB)
CH-19
MODE — TX (AM or USB)
Test Equipment
DC VTVM
Freq. Counter with with level meter See NOTE 1 below
Freq. Counter with level meter
Freq. Counter with level meter
Freq. Counter with level metre
Freq. Counter with level meter
DC VTVM
See NOTE 2 below
Freq. Counter with Level Meter
DC VTVM
See NOTE 2 below
Freq. Counter with level meter
Freq. Counter with level meter
Freq. Counter
Test Point or Connection
Both ends of VR-304 CLARIFIER Control
TP-8
TP-5
TP-5
TP-1
TP-2
TP-7
TP-3
TP-7
TP-4
TP-4
TP-5
Adjust
VR -2 for 4V DC
TC-6 for 10.24 MHz +10Hz
TC-4 for 33.485 MHz T7, 8 for max. output
TC-5 for 33.4875 MHz
Check the frequency : 7.8025 MHz
TC-1 for 7.8025 MHz +10 Hz
T1, T2 for max. output
TC-3 for 2.5 V DC ±0.1 V
T3, T4 34.9875 MHz for max. output
TC-2 for 2.5 V DC
T6 for max. output at 34.985 MHz
T5 for max. output at 19.3825 MHz
VR-1 for 33.4875 MHz
NOTE 1 : Steps 2 through 12, connect Frequency Counter through a 10 pF Capacitor to the test point noted.
|
TEST POINT |
|
|
UNIT UNDER TEST |
I 1 |
FREQUENCY COUNTER |
|
10pF |
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|
NOTE 2 : Steps 7 and 9, DC output should change from 2.5 ± 0.1 volts on CH-1 to approx. 3.5 volts on CH-40.
NOTE 3 : You can check the input frequency to IC-2 at TP-6, use TP-7 for ground. —11 —
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