Pioneer CX-951 Service manual

Model No. Order No. CD Mechanism Module FX-MG9127ZT/UC CRT2903 CXK7110 FX-MG9327ZT/ES CRT2904 CXK7110 FX-MG9427ZT/ES CRT2904 CXK7110 FX-MG9527ZT/Q1 CRT2904 CXK7110 FX-MG9327ZT/EW CRT2905 CXK7110 FX-MG9427ZT/EW CRT2905 CXK7110 FX-MG9727ZT/UC CRT2905 CXK7110

PIONEER CORPORATION 4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153-8654, Japan

PIONEER ELECTRONICS (USA) INC. P.O.Box 1760, Long Beach, CA 90801-1760 U.S.A. PIONEER EUROPE NV Haven 1087 Keetberglaan 1, 9120 Melsele, Belgium PIONEER ELECTRONICS ASIACENTRE PTE.LTD. 253 Alexandra Road, #04-01, Singapore 159936

C PIONEER CORPORATION 2002

K-ZZS. JULY 2002 Printed in Japan

ORDER NO.

CRT2872

CD MECHANISM MODULE

CX-951

- This service manual describes the operation of the CD mechanism incorporated in models listed in the

table below.

- When performing repairs use this manual together with the specific manual for model under repair.

CONTENTS

1. CIRCUIT DESCRIPTIONS ...........................................2

2. MECHANISM DESCRIPTIONS.................................25

3. DISASSEMBLY .........................................................32

234

CX-951

1. CIRCUIT DESCRIPTIONS

The LSI (UPD63711GC) used on this unit comprises six main blocks ; the pre-amp section, servo, signal processor,

DAC, CD text decoder and LPF. It also equips with nine automatic adjustment functions.

1.1 PRE-AMP SECTION

This section processes the pickup output signals to

create the signals for the servo, demodulator and

control.

The pickup output signals are I-V converted by the pre-

amp with the built-in photo-detector in the pickup, then

added by the RF amp to obtain RF, FE, TE, TE zero cross

and other signals.

This pre-amp section is built in the servo LSI

UPD63711GC (IC201). The following describes function

of each section.

Since this system has a single power supply (+5V), the

reference voltage for this LSI and pickup are set to

REFO (2.5V). The REFO is obtained by passing the

REFOUT from the LSI through the buffer amplifier. The

REFO is output from Pin 89 of this LSI. All

measurements are done using this REFO as reference.

Note : During the measurement, do not try to short the

REFO and GND.

1) APC Circuit (Automatic Power Control)

When the laser diode is driven with constant current,

the optical output has large negative temperature

characteristics. Thus, the current must be controlled

from the monitor diode so that the output may be

constant. APC circuit is for it. The LD current is obtained

by measuring the voltage between LD1 and V+5. The

value of this current is about 35mA.

AGCI

RFO

C-3T

FEO

FE-

TEO

TE-

RF-

EQ1

EQ2

AGCO

RFI

ASY

EFM

PEAK DET.

LPF

BOTTOM DET.

S/H

D/A

A/D

D/A

A/D

TE2

VREG

GND APN

LDON

EFM

DEFECT

FOK

A3T

MIRR

To the following stage of the LSI

Vref

·····Vref(+2.5V)

VREG

GND

AMP_PN (H:Nch L:Pch)

LDON (H:LD MOVE L:STOP)

Vref

·····Vref(+2.5V)

R102 10 R101 12

Q101

2SB1132

C102

0.1µF

C103 100µF/6.3V

MECHANISM UNIT

R103

2.2k

C105

0.33µF

+5V

110k

150k

100k

16k

D101

Fig.1 : BLOCK DIAGRAM OF BUILT-IN RF AMPLIFIER

Fig.2 : APC CIRCUIT

CX-951

2) RF Amplifier and RFAGC Amplifier

The photo-detector outputs (A +C) and (B +D) are

added, amplified and equalized on this LSI and then

output to the RFI terminal as the RF signal. (The eye

pattern can be checked by this signal.)

The RFI voltage low frequency component is :

RFI = (A +B +C +D) ×3.2

RFI is used on the FOK generator circuit and RF offset

adjusting circuit.

R207 is an offset resistor for maintaining the bottom

reference voltage of the RFI signal at 1.5 VDC. The D/A

output used for the RF offset adjustment (to be

described later) is entered via this resistor.

After the RFI signal from Pin 77 is externally AC

coupled, entered to Pin 76 again, then amplified on the

RFAGC amplifier to obtain the RFO signal.

The RFAGC adjustment function (to be described later)

built-in the LSI is used for switching feedback gain of

the RFAGC amplifier so that the RFO output may go to

1.5 ±0.3Vpp.

The RFO signal is used for the EFM, DFCT, MIRR and

RFAGC adjustment circuits.

3) RFOK Circuit

This circuit generates the signal that is used for

indicating the timing of closing the focus or state of the

focus close currently being played. This signal is output

from Pin 4 as the FOK signal. It goes high when the

focus close and in-play.

The RFOK signal is generated by holding DC level of the

RFI at its peak with the succeeding digital section, then

comparing it at a specific threshold level. Thus, the

RFOK signal goes high even if the pit is absent. It

indicates that the focus close can take place on the disc

mirror surface, too.

This signal is also supplied to the micro computer via

the low pass filter as the FOK signal and used for the

protection and the RF amplifier gain switching.

CN101

10k

FOK

CIRCUIT

A/D

A+C

16k

B+D

10k

16k

10k

R214

12k

C209 2pF

R212

5.6k

R207

C208 18pF

R213 15k

80 79 74757677

D/A

12k

10k

RFOAGCIRFI

C215

0.22µF

C213

1500pF

FOK

TO EFM CIRCUIT

Fig.3 : RFAMP, RFAGC AND FOK CIRCUIT

234

CX-951

Fig.5 TRACKING ERROR AMPLIFIER AND TRACKING ZERO CROSSING AMPLIFIER

4) Focus Error Amplifier

The photo-detector outputs (A+C) and (B+D) are passed

through a differential amplifier and an error amplifier, and

then (A+C−B−D) is output from Pin 91 as the FE signal.

The FE voltage low frequency component is :

FE = (A + C − B − D) ××

= (A + C − B − D) × 5

Using REFO as the reference, an S-curve of approximately 1.5

Vpp is obtained for the FE output. The final-stage amplifier

cutoff frequency is 11.4 kHz.

5) Tracking Error Amplifier

The photo-detector outputs E and F are passed through

a differential amplifier and an error amplifier, and then

(E −F) is output from Pin 93 as the TE signal. The TE

voltage low frequency component is :

TE =(E −F)

××

(E −F) ×6.6 (Effective LSI output is 5.0).

Using REFO as the reference, the TE waveform of

approximately 1.3 Vpp is obtained for the TE output.

The final-stage amplifier cutoff frequency is 20 kHz.

6) Tracking Zero Crossing Amplifier

TEC signal (the tracking zero crossing signal) is

obtained by multiplying the TE signal four times. It is

used for locating the zero crossing points of the

tracking error. The zero cross point detection is done for

the following two reasons :

To count tracks for carriage moves and track jumps.

To detect the direction in which the lens is moving

when the tracking is closed (it is used on the

tracking brake circuit to be described later).

The TEC signal frequency range is 300 Hz to 20 kHz.

TEC voltage =TE level ×4

Theoretical TEC level is 5.2V. The signal exceeds D-

range of the operational amplifier and thus is clipped.

It, however, can be ignored since this signal is used by

the servo LSI only at the zero crossing point.

20k5k

CN101

10k

20k

A+C

16k

B+D

48k

16k

10k

9190

D/A

80k

110k

C219 180pF

A/D

FE OFFSET

TO DIG. EQ

48k

48.7k

CN101

112k

48.7k

224k

48k

224k

112k

9392

D/A

80k

110k

C220 51pF

80k

110k

A/D

TE OFFSET

TO DIG. EQ

48k

60k

20k

TE2

TEC

C221

6800pF

16k 10k

80k

(20k + 5k)

Fig.4 : FOCUS ERROR AMPLIFIER

224k 112k

160k

48.7k

CX-951

7) DFCT (Defect) Circuit

The DFCT signal is used for detecting defects on the

mirrored disc surface. It allows monitoring from the

HOLD pin (Pin 2). It goes high when defects are found

on the mirrored surface.

The DFCT signal is generated by comparing the RF

amplified signal (which is obtained by bottom holding

the RFO signal) at a specific threshold level by the

succeeding digital section.

Stains or scratches on the disc can constitute the

defects on the mirrored disc surface. Thus, as long as

the DFCT signal remains high in the LSI, the focus and

tracking servo drives are held in the current state so

that a better defect prevention may be ensured.

8) 3TOUT Circuit

The 3TOUT signal is generated by entering disturbance

to the focus servo loop, comparing phase of

fluctuations of the RF signal 3T component against that

of the FE signal at that time, then converting the signal

to DC level. This signal is used for adjusting bias of the

FE signal (to be described later). This signal is not

output from the LSI, thus its monitoring is not available.

9) MIRR (Mirror) Circuit

The MIRR signal shows the on track and off track data,

and is output from Pin 3.

When the laser beam is

On track : MIRR ="L"

Off track : MIRR ="H"

This signal is used on the brake circuit (to be described

later) and also as the trigger to turn on track counting

when jumping take place.

The MIRR signal is supplied to the micro computer, too,

for the protection purpose.

A/D

MIRR

CIRCUIT

DFCT

CIRCUIT

BOTTOM DETECT

PEAK DETECT

LPFS/H

A/D

40k

20k

40k

200k

C212

0.1µF

C3T

AGCI

RFO

12k

10k

20k

30k

MIRR

HOLD

Fig.6 : DFCT, MIRR AND 3T DETECTION CIRCUIT

Fig.7 : HOLD OUTPUT WAVEFORM

(When surface defects are present)

Fig.8 : MIRR OUTPUT WAVEFORM

(When an access is made)

Surface defects

RFI

HOLD

RFI

MIRR

OFF Track ON Track

234

CX-951

10) EFM Circuit

This circuit is used for converting the RF signal to

digital signal consisting of “0” and “1”. The RFO signal

from Pin 75 is externally AC coupled, entered to Pin 74,

then applied to the EFM circuit.

Loss of the RF signal due to scratches or stains on the

disc, or vertical asymmetry of the RF due to variations

in the discs manufactured can’t be eliminated by AC

coupling alone. This circuit, therefore, controls the

reference voltage ASY on the EFM comparator by use

of the fact that “0” and “1” appear fifty fifty in the EFM

signal. By this arrangement, the comparate level is

constantly maintained at almost center of the RFO

signal level. The reference voltage ASY is generated

when the EFM comparator output is passed through

the low pass filter. The EFM signal is output from Pin

71. It is a 2.5 Vp-p amplitude signal centering on REFO.

RFI

40k

C206

1500pF

ASY

EFM

40k

15k75k

R205

10k

R206

39k

C203

0.047µF

C204

1800pF

EFM. SIG

Fig.9 : EFM CIRCUIT

CX-951

The servo section controls the operations such as error

signal equalizing, in focus, track jump and carriage

move. The DSP is the signal processing section used

for data decoding, error correction and interpolation

processing, among others.

This circuit implements analog to digital conversion of

the FE and TE signals generated on the pre-amplifier,

then outputs them through the servo block as the drive

signal used on the focus, tracking and carriage system.

The EFM signal is decoded on the signal processing

section and finally output via the D/A converter as the

audio signal. The decoding process also generates the

spindle servo error signals which is fed to the spindle

servo block to generate the spindle drive signal.

The focus, tracking, carriage and spindle drive signals

are then amplified on the driver IC BD7962FM (IC301)

and fed to respective actuators and motors.

1) Focus Servo System

The focus servo main equalizer is consisted of the

digital equalizer. Fig.10 shows the focus servo block

diagram.

When implementing the focus close on the focus servo

system, the lens must be brought within the in-focus

range. Therefore, the lens is moved up and down

according to the triangular focus search voltage to find

the focus point. During this time, the spindle motor is

kicked and kept rotating as a set speed.

The servo LSI monitors the FE and RFOK signals and

automatically carries out the focus close at an

appropriate point.

The focus closing is carried out when the following

three conditions are met :

The lens approaches the disc from its current

position.

RFOK ="H"

The FZC signal is latched at high after it has once

crossed the threshold set on the FZD register (Edge

of the FZD).

As the result, the FE ( =REFO) is forced to low.

AMP

DIG.

A+C

B+D

FOP

FOM

IC301

BD7962FM

LENS

IC201 UPD63711GC

FOCUS SEARCH

TRIANGULAR

WAVE GENERATOR

DAC

CONTROL

A/D

R301

10K

R302

15K

Fig.10 : FOCUS SERVO BLOCK DIAGRAM

1.2 SERVO SECTION (UPD63711GC : IC201)

234

CX-951

When the above conditions are all met and the focus is

closed, the XSI pin goes to low from the current high,

then 40 ms later, the microcomputer begins to monitor

the RFOK signal after it that has been passed through

the low pass filter.

When the RFOK signal is recognized as low, the micro

computer carries out various actions including

protection.

Fig.11 a series of operations carried out relevant to the

focus close (the figure shows the case where focus

close is not available).

You can check the S-curve, search voltage and actual

lens behavior by selecting the Display 01 for the focus

mode select in the test mode, and then pressing the

focus close button.

REFO

LENS POSITION RELATIVE TO DISC

NEAR

FAR

"JUST FOCUSED"

REFO

Expanding around "Just Focused Point"

REFO

RFI

FOK

FZD THRESHOLD LEVEL

FZD (INTERNAL SIGNAL)

Focus closing would normally take place at these points

XSI (IN THE EVENT FOCUS IS CLOSED)

LEVEL

Fig.11 : FOCUS CLOSE SEQUENCE

CX-951

2) Tracking Servo System

The digital equalizer is employed for the main equalizer

on the tracking servo. Fig.12 shows the tracking servo

block diagram.

a) Track jump

When the LSI receives the track jump command from

the microcomputer, the operation is carried out

automatically by the auto sequence function of the LSI.

This system has five types of track jumps used for the

search : 1, 4, 10, 32 and 32 ×3. In the test mode, in

addition to three jumps (1, 32 and 32 ×3), move of the

carriage can be check by mode selection. For track

jumps, the microcomputer sets almost half of tracks (5

tracks for 10 tracks, for instance) and counts the set

number of tracks using the TEC signals. When the

microcomputer has counted the set number of tracks, it

outputs the brake pulse for a fixed period of time

(duration can be specified with the command) to stop

the lens. In this way, the tracking is closed and normal

play is continued.

To improve the servo loop retracting performance just

after the track jump, the brake circuit is turned on for 50

ms after the brake pulse has been terminated to

increase gain of the tracking servo.

Fast forward and reverse operations are realized by

through consecutive signal track jumps. The speed is

about 10(or 20) times as fast as that in the normal

mode.

AMP

DIG.

TOM

TOP

IC301

BD7962FM

LENS

IC201 UPD63711GC

JUMP

PARAMETERS

DAC

CONTROL

A/D

R304

10k

R303

10k

GAIN NORMAL

KICK

BRAKE

TEC

T. BRAKE

EQUALIZER

T. SERVO

CLOSED

OPEN

NORMAL

GAIN UP

OFF

TEC

(10 TRACK)

EQUALIZER

T. BRAKE

SERVO

2.9mS (4.10 TRACK JUMP)

5.8mS (32 TRACK JUMP)

GAIN UP

NORMAL ON

OFF OPEN

CLOSED

50mS

Fig.12 : TRACKING SERVO BLOCK DIAGRAM

Fig.13 : SINGLE TRACK JUMP

Fig.14 : MULTI-TRACK JUMP

234

CX-951

b) Brake Circuit

The servo retracting performance can be deteriorate

during the setup or track jump operation. In this

connection, the brake circuit is used to ensure steady

retract of the tracking servo. The brake circuit detects in

which direction the lens is moving, then slows down its

move by outputting the drive signal that moves the

lens into the opposite direction alone. Track slippage

direction is determined by referencing the TEC and

MIRR signals and their phase.

TEC

TZC

(TEC "SQUARED UP" )

(INTERNAL SIGNAL )

MIRR

MIRR LATCHED AT

TZC EDGES

SWITCHING PULSE

EQUALIZER OUTPUT

(SWITCHED)

DRIVE DIRECTION

Note : Equalizer output assumed to hava same phase as TEC.

FORWARD

LENS MOVING FORWARDS

(INNER TRACK TO OUTER)

LENS MOVING BACKWARDS

Time

REVERSE

Fig.15 : TRACKING BRAKE CIRCUIT

CX-951

3) Carriage Servo System

The carriage servo supplies the tracking equalizer’s

low-frequency component (lens position data) output to

the carriage equalizer, then, after providing a fixed

amount of gain to it, outputs the drive signal from the

LSI. This signal is then applied to the carriage motor via

the driver IC.

When the lens offset reaches a certain level during play,

the entire pickup must be moved into the forward

direction. Therefore, the equalizer gain is set to the

level that allows to generate a voltage higher than the

carriage motor starting voltage. In actual operations, a

certain threshold level is set for the equalizer output by

the servo LSI so that the drive voltage may be output

from the servo LSI only when the equalizer output

exceeds the threshold level. This arrangement helps

reducing power consumption. Also, due to disc

eccentricity or other factors, the equalizer output may

cross the threshold level a number of times. In this

case, the drive voltage output from the LSI will have

pulse-like waveform.

DIG.

COP

COM

IC301

BD7962FM

CARRIAGE

MOTOR

IC201 UPD63711GC

64 32

KICK, BRAKE

REGISTERS

DAC

CONTROL

FROM TRACK. EQ

R318

10K

R316

15K

DRIVE ON/OFF THRESHOLD

CARRIAGE MOVED AT THESE POINTS

TRACKING DRIVE (LOW FREQUENCY)

LENS POSITION

CRG DRIVE (INSIDE UPD63711GC)

CRG MOTOR VOLTAGE

Fig.16 : CARRIAGE SERVO BLOCK DIAGRAM

Fig.17 : CARRIAGE SIGNAL WAVEFORM

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