PIONEER CX-938 Service Manual

ORDER NO.

CRT2357

CD MECHANISM MODULE

CX-938

-This service manual describes the operation of the CD mechanism incorporated in models listed in the table below.

-When performing repairs use this manual together with the specific manual for model under repair.

Model	Service Manual	CD Mechanism Module	Mechanism Unit
CDX-P1250/X1N/UC,ES	CRT2318	CXK4900	CXB3008
CDX-P1250/X1N/EW		CXK4905	CXB3008
CDX-FM1259/X1N/UC	CRT2320	CXK4916	CXB3008
CDX-FM1257/X1N/UC,ES		CXK4915	CXB3008

CONTENTS
1.	CIRCUIT DESCRIPTIONS ...........................................		2
2.	DISASSEMBLY	.........................................................	18
3.	MECHANISM DESCRIPTIONS.................................		23
PIONEER ELECTRONIC CORPORATION		4 - 1, Meguro 1 - Chome, Meguro - ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS SERVICE INC.	P.O.Box 1760, Long Beach, CA 90801-1760 U.S.A.
PIONEER ELECTRONIC [EUROPE] N.V. Haven 1087 Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE.LTD. 253 Alexandra Road, #04-01, Singapore 159936

C PIONEER ELECTRONIC CORPORATION 1999

K-ZZU. FEB. 1999 Printed in Japan

CX-938

1. CIRCUIT DESCRIPTIONS

The LSI (UPD63710GC) used on this unit comprises five main blocks ; the pre-amp section, servo, signal processor, DAC and CD text decoder (not used on this model). It also equips with nine automatic adjustment functions.

1.1 PRE-AMP SECTION
This section processes the pickup output signals to	EFM 71
create the signals for the servo, demodulator and	ASY 72
control.
The pickup output signals are I-V converted by the pre-
amp with the built-in photo-detector in the pickup, then	RFI 74		Vref			EFM
added by the RF amp to obtain RF, FE, TE, TE zero cross
and other signals.	AGCO	75
			PEAK DET.			MIRR
This pre-amp section is built in the servo LSI	AGCI	76					To the
		Vref	BOTTOM DET.				following stage
	RFO					DEFECT	of the LSI
UPD63710GC (IC201). The following describes function		77
of each section.	EQ2	78	S/H	LPF		A3T
Since this system has a single power supply (+5V), the	EQ1	79		Vref	73 C-3T
		Vref				FOK
	RF80		Vref
reference voltage for this LSI and pickup are set to
				Vref	91	FEO
REFO (2.5V). The REFO is obtained by passing the
		Vref
REFOUT from the LSI through the buffer amplifier. The	A	82	Vref		90 FE-
					A/D
	C 83
REFO is output from Pin 89 of this LSI. All		Vref		D/A
measurements are done using this REFO as reference.	B 84
	D 85			Vref	93	TEO
Note : During the measurement, do not try to short the		Vref
	F 86		Vref		92 TE-
REFO and GND.					A/D
		Vref		D/A	94 TE2
	E 87			Vref
			Vref		98 LD
	PD 97
		VREG
		GND
		APN
		LDON
1) APC Circuit (Automatic Power Control)	PN 99
When the laser diode is driven with constant current,						·····Vref(+2.5V)
the optical output has large negative temperature
characteristics. Thus, the current must be controlled		Fig.1 : BLOCK DIAGRAM OF BUILT-IN RF AMPLIFIER
from the monitor diode so that the output may be
constant. APC circuit is for it. The LD current is obtained
by measuring the voltage between LD1 and V+5. The
value of this current is about 35mA.						PU UNIT
					+5V

PD				C103	R102
97
		·····Vref(+2.5V)		100μF/6.3V	10
					R101
				Q101
					12
				2SB1132
		Vref	1k	LD	5
		100k		98
16k			110k
VREG	150k	100k		14
1k			3pF
GND	3pF
AMP_PN
(H:Nch L:Pch)				C102	R103	C105
LDON				0.1μF	2.2k	0.33μF
(H:LD MOVE L:STOP)

99

PN

Fig.2 : APC CIRCUIT

2

CX-938

2) RF Amplifier and RFAGC Amplifier

3) FOK Circuit

The photo-detector outputs (A + C) and (B + D) are added, amplified and equalized on this LSI and then output to the RFI terminal as the RF signal. (The eye pattern can be checked by this signal.)

The RFI voltage low frequency component is : RFI = (A + B + C + D) × 3.2

RFI is used on the FOK generator circuit and RF offset adjusting circuit.

R215 is an offset resistor for maintaining the bottom reference voltage of the RFI signal at 1.5 VDC. The D/A output used for the RF offset adjustment (to be described later) is entered via this resistor.

After the RFI signal from Pin 77 is externally AC coupled, entered to Pin 76 again, then amplified on the RFAGC amplifier to obtain the RFO signal.

The RFAGC adjustment function (to be described later) built-in the LSI is used for switching feedback gain of the RFAGC amplifier so that the RFO output may go to 1.5 ± 0.3Vpp.

The RFO signal is used for the EFM, DFCT, MIRR and RFAGC adjustment circuits.

This circuit generates the signal that is used for indicating the timing of closing the focus or state of the focus close currently being played. This signal is output from Pin 4 as the FOK signal. It goes high when the focus close and in-play.

The RFOK signal is generated by holding DC level of the RFI at its peak with the succeeding digital section, then comparing it at a specific threshold level. Thus, the RFOK signal goes high even if the pit is absent. It indicates that the focus close can take place on the disc mirror surface, too.

This signal is also supplied to the micro computer via the low pass filter as the FOK signal and used for the protection and the RF amplifier gain switching.

					C209 3pF
					R214	R213
					10k	10k
					C208
					27pF	C207		C206
			R215		R207	0.22μF		3900pF
			12k		1.8k
						77 RFI	76 AGCI	75 RFO
			66	80	79				74
			D/A						TO EFM
							12k		CIRCUIT
CN101		10k
18 A+C	82
			10k				10k
	83		16k
							A/D	FOK	4	FOK
	84		10k					CIRCUIT
25 B+D	85	10k	16k

Fig.3 : RFAMP, RFAGC AND FOK CIRCUIT

3

CX-938

4) Focus Error Amplifier
The photo-detector outputs (A + C) and (B + D) are passed
through a differential amplifier and an error amplifier, and
then (A + C − B − D) is output from Pin 91 as the FE signal.
The FE voltage low frequency component is :
	16k	(80k//300k)
FE = (A + C − B − D) ×	10k ×	20k
= (A + C − B − D) × 5
Using REFO as the reference, an S-curve of approximately 1.5			C210 220pF
Vpp is obtained for the FE output. The final-stage amplifier				R208 300k
cutoff frequency is 11.4 kHz.					FE
			90	91
		D/A		80k
		110k
		FE OFFSET
CN101	10k
18 A+C					A/D
	82	20k
	83	48k			TO DIG. EQ
		16k

84		48k
25 B+D 85		20k
	10k	16k

Fig.4 : FOCUS ERROR AMPLIFIER

5) Tracking Error Amplifier

The photo-detector outputs E and F are passed through a differential amplifier and an error amplifier, and then (E − F) is output from Pin 93 as the TE signal. The TE voltage low frequency component is :

TE = (E − F) ×	224k	×	80k
	(56k+27k)		38k

= (E − F) × 5.7 (Effective LSI output is 5.0). Using REFO as the reference, the TE waveform of approximately 1.3 Vpp is obtained for the TE output. The final-stage amplifier cutoff frequency is 20 kHz.

6) Tracking Zero Crossing Amplifier

TEC signal (the tracking zero crossing signal) is obtained by multiplying the TE signal four times. It is used for locating the zero crossing points of the tracking error. The zero cross point detection is done for the following two reasons :

1 To count tracks for carriage moves and track jumps.

2 To detect the direction in which the lens is moving when the tracking is closed (it is used on the tracking brake circuit to be described later).

The TEC signal frequency range is 300 Hz to 20 kHz. TEC voltage = TE level × 4

Theoretical TEC level is 5.2V. The signal exceeds D- range of the operational amplifier and thus is clipped. It, however, can be ignored since this signal is used by the servo LSI only at the zero crossing point.

				C211 100pF
				92	93 TE
				D/A	80k
				110k
				TE OFFSET
CN101	R215
F		F	86	38k	A/D
21	27k
				56k	TO DIG. EQ
				224k

					48k		TE2	R212
							94	0
						20k
	E	R216	E
23				87	48k			C212
		27k
				56k	38k	60k	95
					224k		TEC 6800pF

4	Fig.5 TRACKING ERROR AMPLIFIER AND TRACKING ZERO CROSSING AMPLIFIER

CX-938

7) DFCT (Defect) Circuit

The DFCT signal is used for detecting defects on the mirrored disc surface. It allows monitoring from the HOLD pin (Pin 2). It goes high when defects are found on the mirrored surface.

The DFCT signal is generated by comparing the RF amplified signal (which is obtained by bottom holding the RFO signal) at a specific threshold level by the succeeding digital section.

Stains or scratches on the disc can constitute the defects on the mirrored disc surface. Thus, as long as the DFCT signal remains high in the LSI, the focus and tracking servo drives are held in the current state so that a better defect prevention may be ensured.

8) 3TOUT Circuit

The 3TOUT signal is generated by entering disturbance to the focus servo loop, comparing phase of fluctuations of the RF signal 3T component against that of the FE signal at that time, then converting the signal to DC level. This signal is used for adjusting bias of the FE signal (to be described later). This signal is not output from the LSI, thus its monitoring is not available.

9) MIRR (Mirror) Circuit

The MIRR signal shows the on track and off track data, and is output from Pin 3.

When the laser beam is

On track : MIRR = "L"

Off track : MIRR = "H"

This signal is used on the brake circuit (to be described later) and also as the trigger to turn on track counting when jumping take place.

The MIRR signal is supplied to the micro computer, too, for the protection purpose.

	RFO
	75
	20k	40k
	30k
	12k
	10k	40k
	AGCI 76			MIRR
	PEAK DETECT		A/D		3
				CIRCUIT
		40k	40k		MIRR
	BOTTOM DETECT
	BOTTOM DETECT		A/D	DFCT	2
				CIRCUIT
			200k		HOLD
		20k		3T
	S/H	LPF	A/D
				CIRCUIT
		20k
		200k
		C3T	73
			C205
			0.1μF

Fig.6 : DFCT, MIRR AND 3T DETECTION CIRCUIT

			OFF Track				ON Track
RFI	Surface defects	RFI

HOLD

MIRR

Fig.7 : HOLD OUTPUT WAVEFORM	Fig.8 : MIRR OUTPUT WAVEFORM	5
(When surface defects are present)	(When an access is made)

CX-938

10) EFM Circuit

This circuit is used for converting the RF signal to digital signal consisting of “0” and “1”. The RFO signal from Pin 75 is externally AC coupled, entered to Pin 74, then applied to the EFM circuit.

Loss of the RF signal due to scratches or stains on the disc, or vertical asymmetry of the RF due to variations in the discs manufactured can’t be eliminated by AC coupling alone. This circuit, therefore, controls the reference voltage ASY on the EFM comparator by use of the fact that “0” and “1” appear fifty fifty in the EFM signal. By this arrangement, the comparate level is constantly maintained at almost center of the RFO signal level. The reference voltage ASY is generated when the EFM comparator output is passed through the low pass filter. The EFM signal is output from Pin 71. It is a 2.5 Vp-p amplitude signal centering on REFO.

			EFM. SIG
C206	40k			R205
	RFI 74		2k
				10k
3900pF	40k		71
			EFM	C204
				3300pF
			72	R206
			ASY
			40k	39k
			C203
	75k	15k	0.1μF
			40k

Fig.9 : EFM CIRCUIT

6

CX-938

1.2 SERVO SECTION (UPD63710GC :

IC201)

The servo section controls the operations such as error signal equalizing, in focus, track jump and carriage move. The DSP is the signal processing section used for data decoding, error correction and interpolation processing, among others.

This circuit implements analog to digital conversion of the FE and TE signals generated on the pre-amplifier, then outputs them through the servo block as the drive signal used on the focus, tracking and carriage system. The EFM signal is decoded on the signal processing section and finally output via the D/A converter as the audio signal. The decoding process also generates the spindle servo error signals which is fed to the spindle servo block to generate the spindle drive signal.

The focus, tracking, carriage and spindle drive signals are then amplified on the driver IC BA5986FM (IC301) and fed to respective actuators and motors.

1) Focus Servo System

The focus servo main equalizer is consisted of the digital equalizer. Fig.10 shows the focus servo block diagram.

When implementing the focus close on the focus servo system, the lens must be brought within the in-focus range. Therefore, the lens is moved up and down according to the triangular focus search voltage to find the focus point. During this time, the spindle motor is kicked and kept rotating as a set speed.

The servo LSI monitors the FE and RFOK signals and automatically carries out the focus close at an appropriate point.

The focus closing is carried out when the following three conditions are met :

1 The lens approaches the disc from its current position.

2 RFOK = "H"

3 The FZC signal is latched at high after it has once crossed the threshold set on the FZD register (Edge of the FZD).

As the result, the FE ( = REFO) is forced to low.

		IC201 UPD63710GC							IC301
									BA5986FM
A+C 82		FE	A/D	DIG.					LENS
B+D							R301
	85	AMP		EQ					14 FOP
					CONTROL	DAC	FD	10k
		FOCUS SEARCH					62		3
								R302
		TRIANGULAR							13 FOM
								15k
		WAVE GENERATOR							4

Fig.10 : FOCUS SERVO BLOCK DIAGRAM

7

CX-938

When the above conditions are all met and the focus is closed, the XSI pin goes to low from the current high, then 40 ms later, the microcomputer begins to monitor the RFOK signal after it that has been passed through the low pass filter.

When the RFOK signal is recognized as low, the micro computer carries out various actions including protection.

Fig.11 a series of operations carried out relevant to the focus close (the figure shows the case where focus close is not available).

You can check the S-curve, search voltage and actual lens behavior by selecting the Display 01 for the focus mode select in the test mode, and then pressing the focus close button.

FD

REFO

LENS POSITION

RELATIVE TO DISC

NEAR

"JUST FOCUSED" LEVEL

FAR

MD

REFO

Expanding around "Just Focused Point"

RFI

REFO

FOK
	FZD
FE	THRESHOLD
	LEVEL

FZD

(INTERNAL SIGNAL)

Focus closing would normally take place at these points

XSI

(IN THE EVENT FOCUS IS CLOSED)

Fig.11 : FOCUS CLOSE SEQUENCE

8

CX-938

2) Tracking Servo System

The digital equalizer is employed for the main equalizer on the tracking servo. Fig.12 shows the tracking servo block diagram.

		IC201 UPD63710GC						IC301
								BA5986FM
F	86	TE		DIG.
			A/D
E							R303	TOP
	87	AMP		EQ		TD			LENS
				CONTROL	DAC		10k	11
			JUMP			63		6
							R304	12 TOM
		PARAMETERS
							15k
								7

a) Track jump

When the LSI receives the track jump command from the microcomputer, the operation is carried out automatically by the auto sequence function of the LSI. This system has five types of track jumps used for the search : 1, 4, 10, 32 and 32 × 3. In the test mode, in addition to three jumps (1, 32 and 32 × 3), move of the carriage can be check by mode selection. For track jumps, the microcomputer sets almost half of tracks (5 tracks for 10 tracks, for instance) and counts the set number of tracks using the TEC signals. When the microcomputer has counted the set number of tracks, it outputs the brake pulse for a fixed period of time (duration can be specified with the command) to stop the lens. In this way, the tracking is closed and normal play is continued.

To improve the servo loop retracting performance just after the track jump, the brake circuit is turned on for 50 ms after the brake pulse has been terminated to increase gain of the tracking servo.

Fast forward and reverse operations are realized by through consecutive signal track jumps. The speed is about 10 times as fast as that in the normal mode.

Fig.12 : TRACKING SERVO BLOCK DIAGRAM

BRAKE

t2

TD

t1

KICK

TEC

ON

T. BRAKE

OFF

GAIN UP

EQUALIZER

GAIN NORMAL

NORMAL

OPEN

T. SERVO

CLOSED

Fig.13 : SINGLE TRACK JUMP

TD

t1

t2

TEC

(10 TRACK)

GAIN UP

EQUALIZER 50mS

NORMAL

ON

T. BRAKE

OFF

OPEN

SERVO

CLOSED

SD

t

2.9mS (4.10 TRACK JUMP)

5.8mS (32 TRACK JUMP)

Fig.14 : MULTI-TRACK JUMP

9