Frequency Shift Keying
(FSK)/Amplitude Shift Keying
(ASK) receiver
Product specification
Supersedes data of 1998 April 10
File under Integrated Circuits, IC01
1999 Jan 22
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
FEATURES
• Low cost single-chip ASK or FSK receiver
• Superheterodyne architecture with high integration level
• Few external low cost components and crystal required
• Wide supply voltage range
• Low power consumption
• Wide frequency range, 250 to 920 MHz
• High sensitivity
• IF bandwidth determined by application
• High selectivity
• Automotive temperature range
• SSOP24 package.
Applications
• Keyless entry systems
• Car alarm systems
• Remote control systems
• Security systems
• Telemetry systems
• Wireless data transmission
• Domestic appliance.
UAA3220TS
GENERAL DESCRIPTION
The UAA3220TS is a fully integrated single-chip receiver,
primarily intended for use in VHF and UHF systems.
It supports both Amplitude Shift Keying (ASK) and
Frequency Shift Keying (FSK) demodulation.
By connecting DEMO1 (pin 10) to ground during
realisation of the receiver module the UAA3220TS works
as an ASK receiver (see Fig.10). By connecting pin 10 as
shown in Fig.9 the UAA3220TS works as an FSK receiver.
The UAA3220TS incorporates a crystal stabilized local
oscillator, frequency multiplier, balanced mixer, post mixer
amplifier, limiter, Received Signal Strength Indicator
(RSSI), FSK demodulator, data filter, data slicer and
power down circuit.
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
CC
I
CC
supply voltage2.7−5.5V
supply currentf
= 433.92 MHz; FSK mode
i(RF)
operating mode on;
=0V
V
PWD
operating mode off;
V
PWD=VCC
2.84.35.8mA
−330µA
ASK mode
P
i(max)(ASK)
Φ
i(ASK)
maximum input powerBER ≤ 3%−22−16−10dBm
sensitivity into pin MIXINf
= 433.92 MHz; BER ≤ 3%−−119−113dBm
i(RF)
FSK mode
P
i(max)(FSK)
Φ
i(FSK)
maximum input powerBER ≤ 3%−60+1dBm
sensitivity into pin MIXINf
= 433.92 MHz; BER ≤ 3%−−103−100dBm
i(RF)
1999 Jan 222
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
ORDERING INFORMATION
TYPE
NUMBER
UAA3220TSSSOP24
BLOCK DIAGRAM
MIXIN
MGND
handbook, full pagewidth
23
24
MIXER
NAMEDESCRIPTIONVERSION
plastic shrink small outline package; 24 leads; body width 5.3 mm
V
PMA
FA
CCI
22
2120
LIMITER
AMPLIFIER
LFB
19
PACKAGE
CPCCPA
RSSILIN
17
CPB
161518
DEMODULATOR
UAA3220TS
SOT340-1
DATA14CGND
13
AM/FM
SWITCH
OGND
1
OSCILLATOR
2
OSE
OSB
UAA3220TS
×2/×3
3
4
V
OSC
CC
+
DATA SLICER
−
MULTIPLIER
×3
7TN8
TEM
6
TP
5
BIAS
PWD
9
10
DEMO1
11
DEMO2
12
MGM742
GND
Fig.1 Block diagram.
1999 Jan 223
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
PINNING
SYMBOLPINDESCRIPTION
OGND1oscillator ground
OSE2oscillator emitter
OSB3oscillator base
V
CC
OSC5oscillator collector
TEM6frequency multiplier emitter resistor
TN7frequency multiplier negative output
TP8frequency multiplier positive output
PWD9power down control input
DEMO110FM demodulator 1, ASK/FSK switch
DEMO211FM demodulator 2
GND12 general ground
CGND13 comparator ground
DATA14 data output
CPA15 comparator input A
CPB16 comparator input B
CPC17comparator input C
RSSI18 RSSI output
LFB19 limiter feedback
LIN20 limiter input
V
CCI
FA22 IF amplifier output
MIXIN23 mixer input
MGND24mixer ground
4positive supply voltage
21 IF amplifier positive supply voltage
handbook, halfpage
OGND
1
OSE
2
OSB
3
V
4
CC
OSC
5
TEM
6
UAA3220TS
TN
7
8
TP
PWD
9
DEMO1
DEMO2
GND
10
11
12
MGM743
Fig.2 Pin configuration.
UAA3220TS
MGND
24
MIXIN
23
FA
22
V
21
CCI
LIN
20
19
LFB
RSSI
18
17
CPC
CPB
16
CPA
15
DATA
14
CGND
13
1999 Jan 224
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
FUNCTIONAL DESCRIPTION
Mixer
The mixer is a single-balanced emitter-coupled mixer with
internal biasing. Matching of the RF source impedance to
the mixer input requires an external matching network.
Oscillator
The oscillator is based on a transistor connected in
common collector configuration followed by a cascode
stage driving a tuned circuit. The voltage at this tuned
circuit drives the frequency multiplier. The bias current of
the oscillator is set by an off-chip resistor (R40 in the
application diagram of Fig.9) to a typical value of 260 µA at
433.92 MHz (R40 = 1.8 kΩ). The oscillator frequency is
controlled by an off-chip overtone crystal (X40). Off-chip
capacitors between base and emitter (C42) and ground
(C41) make the oscillator transistor appear as having
negative resistance at small signal levels. This causes the
oscillator to start. A parallel resonance circuit (L40 and
C41) connected to the emitter of the oscillator transistor
prevents oscillation at the fundamental frequency of the
crystal. The LC tank circuit at the output of the oscillator is
used to select either the fundamental, the second or the
third harmonic of the oscillator frequency.
Frequency multiplier
UAA3220TS
Limiter
The limiter is a single-ended input multiple stage amplifier
with high total gain. Amplifier stability is achieved by
means of an external DC feedback capacitor (C21), which
is also used to determine the lower limiter cut-off
frequency. An RSSI signal proportional to the limiter input
signal is provided. Figure 3 shows the DC voltage at pin 18
(RSSI) as a function of the input voltage (RMS value) at
pin 20 (LIN). It also gives the typical IF of 10.7 MHz.
The lower knee of the level curve (see Fig.3) is determined
by the effective noise bandwidth and is, consequently,
slightly higher.
IF filter
IF filtering with high selectivity is realized by means of an
external ceramic filter (X20), which feeds the IF from the
PMA to the limiter.
FM demodulator
Coming from the limiter the FSK signal is fed differential to
the input of the FM demodulator. After buffering the signal
is fed to a phase detector. The phase shift is generated by
an external LC combination connected to DEMO1 (pin 10)
and DEMO2 (pin 11). The baseband signal is coupled out
single ended via an output buffer and is fed to the FSK
input of the ASK/FSK switch.
The frequency multiplier is an emitter-coupled transistor
pair driving an off-chip balanced tuned circuit. The bias
current of this emitter coupled pair is set by an off-chip
resistor (R50) to a typical value of 350 µA at 433.92 MHz
(R50 = 1.2 kΩ). The oscillator output signal is AC-coupled
to one of the inputs of the emitter-coupled pair. The other
input is connected to ground via an on-chip capacitor.
The output voltage of the frequency multiplier drives the
switching stage of the mixer. The bias voltage at this point
is set by an off-chip resistor (R51) to allow sufficient
voltage swing at the mixer outputs.
Post mixer amplifier
The Post Mixer Amplifier (PMA) is a differential input,
single-ended output amplifier. Amplifier gain is provided in
order to reduce the influence of the limiter noise figure on
the total noise figure.
ASK/FSK switch
The selection of either ASK or FSK reception will be done
by the DEMO1 (pin 10). Grounding this pin to 0 V will
switch the IC to ASK mode. Additional the FM demodulator
and parts of the data slicer will be switched off. In FSK
mode DEMO1 (pin 10) is connected to DEMO2 (pin 11)
via a LC combination (see Fig.9).
Data filters
After demodulation a two-stage data filtering circuit is
provided in order to suppress unwanted frequency
components. Two RC low-pass filters with on-chip
resistors are provided which are separated by a buffer
stage.
1999 Jan 225
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
Data slicer
Data detection is provided by means of a level comparator
with adaptive slice reference. After the first data filter stage
the pre-filtered data is split into two paths. One passes the
second data filter stage and is fed to the positive
comparator input. The other path is fed to an integration
circuit with a large time constant in order to derive the
average value (DC component) as an adaptive slice
reference which is presented to the negative comparator
input. The internal buffer provides 13 dB AC voltage gain.
The adaptive reference allows to detect the received data
over a large range of noise floor levels. The integration
circuit consists of a simple RC low-pass filter with on-chip
resistors. The data slicer output is designed with internal
pull-up.
1.55
handbook, full pagewidth
V
RSSI
(V)
UAA3220TS
RSSI buffer
The RSSI buffer is an amplifier with a voltage gain of 0 dB.
At FSK receive mode the RSSI output provides a field
strength indication. It has an output impedance of 10 kΩ.
Figure 3 shows the level curve (RSSI curve) as a function
of the limiter input voltage (RMS value).
MGM744
1.45
1.35
1.25
1.15
(1) T
(2) T
(3) T
10
amb
amb
amb
-7
=85°C.
=27°C.
= −40°C.
(1)
(2)
(3)
-6
10
Fig.3 Level curve V
-5
10
-4
10
as a function of V
RSSI
-3
10
LIN(rms)
-2
10
V
LIN(rms)
(V)
-1
10
.
1999 Jan 226
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
UAA3220TS
Shift Keying (ASK) receiver
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
CC
P
i(max)
T
amb
T
stg
V
es
Note
1. Machine model: C = 200 pF, R = 0 Ω and L = 0.75 µH; pins are connected to GND and V
DC voltage at pin 2independent of oscillator0.330.380.43V
DC voltage at pin 3independent of oscillator1.051.151.25V
DC voltage at pin 6independent of oscillator0.330.390.45V
DC voltage at pins 7 and 8independent of oscillator2.012.212.41V
DC voltage at pin 23independent of oscillator0.680.780.88V
DC voltage at pin 22independent of oscillator1.101.251.40V
DC voltage at pin 20independent of oscillator1.851.952.05V
DC voltage at pin 19independent of oscillator1.851.952.05V
DC voltage at pin 18independent of oscillator1.001.161.32V
V
1999 Jan 228
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
UAA3220TS
Shift Keying (ASK) receiver
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Demodulator
V
DEMO1,2
DC voltage at pins 10 and 11independent of oscillator;
note 5
V
DEMO1(ASK)
DC voltage at pin 10 to switch in
ASK mode
Data filter and slicer
V
CPA,CPB,CPC
DC voltage at pins 15, 16 and 17ASK mode1.271.421.57V
FSK mode; note 61.812.012.21V
V
OH(DATA)
V
OL(DATA)
HIGH-level output voltage at pin 14 I
LOW-level output voltage at pin 14 I
= −10 µAV
DATA
= 200 µA0−0.6V
DATA
Notes
1. For f
= 868.35 MHz all values + 0.6 mA.
i(RF)
2. Crystal connected; oscillator and multiplier active.
3. Pin DEMO1 connected to pin DEMO2 via tank circuit.
4. Pin DEMO1 short circuited to ground.
5. The given values are applicable for FSK reception mode. In ASK mode pin 10 is short circuited to ground.
6. No modulation and fIF= 10.7 MHz.
2.002.242.48V
0−300mV
− 0.5 −V
CC
CC
V
1999 Jan 229
Philips SemiconductorsProduct specification
Frequency Shift Keying (FSK)/Amplitude
UAA3220TS
Shift Keying (ASK) receiver
AC CHARACTERISTICS
V
= 2.7 V; T
CC
f
= 868.35 MHz (see Table 5); f
i(RF)
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
System performance
f
i(RF)
f
IF
P
i(max)
P
SPUR
f
DATA
t
on(RX)
V
RSSI
ASK mode
Φ
i(ASK)
FSK mode
Φ
i(FSK)
∆ffrequency deviation (peak value)41075kHz
∆Φ
(FSK)(max)
G
dem
=25°C; for application diagram see Figs 9 and 10; f
amb
= 1 kHz square wave; unless otherwise specified.
mod
= 433.92 MHz (see Table 4) and
i(RF)
RF input frequency250−920MHz
IF frequency10.5610.710.84MHz
maximum input power−−3dBm
ASK mode; BER ≤ 3%;
−22−16−10dBm
notes 1 and 2
FSK mode; BER ≤ 3%;
−60+1dBm
notes 2 and 3
spurious radiationnote 4−−−57dBm
data frequencynote 5−1−kHz
receiver turn-on timenotes 6 and 7
= 433.92 MHz−610ms
f
i(RF)
f
= 868.35 MHz−37ms
i(RF)
RSSI voltage1.1−1.6V
input sensitivity directly into pin MIXINBER ≤ 3%; notes 1 and 2
f
= 433.92 MHz−−119−113dBm
i(RF)
f
= 868.35 MHz−−116−110dBm
i(RF)
input sensitivity directly into pin MIXINBER ≤ 3%; notes 2 and 3 −−103−100dBm
maximum sensitivity degradation∆f=4kHz−−3dB
demodulator gainnote 80.751.01.25
mV
--------- kHz
Mixer and post mixer amplifier
Z
IP3
G
Z
i
PMA
PMA
o(IF)
input impedance of mixerf
i(RF)
f
i(RF)
interception point (mixer + PMA)−38−30−dBm
gain (mixer + PMA)note 9404250dB
output impedance of IF amplifier280330380Ω
1999 Jan 2210
= 433.92 MHz−600−Ω
= 868.35 MHz−300−Ω
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